| version 1.31, 2004/01/23 15:05:04 | version 1.58, 2004/03/12 18:19:57 | 
| Line 1 | Line 1 | 
 | #include        "compiler.h" | #include        "compiler.h" | 
 |  | #include        "strres.h" | 
 | #include        "dosio.h" | #include        "dosio.h" | 
 | #include        "cpucore.h" | #include        "cpucore.h" | 
 | #include        "pccore.h" | #include        "pccore.h" | 
| Line 20 | Line 21 | 
 |  |  | 
 | BOOL    biosrom = FALSE; | BOOL    biosrom = FALSE; | 
 |  |  | 
 | static const char file_biosrom[] = "bios.rom"; |  | 
 |  |  | 
 | static const char neccheck[] = "Copyright (C) 1983 by NEC Corporation"; | static const char neccheck[] = "Copyright (C) 1983 by NEC Corporation"; | 
 |  |  | 
 | // 00/05/18 MS-DOS6.2 on PC-9801VX calling proc | // 00/05/18 MS-DOS6.2 on PC-9801VX calling proc | 
 | static const BYTE printmain[] = {0x90, 0x5a, 0x1f, 0xcf}; | static const BYTE printmain[] = {0x90, 0x5a, 0x1f, 0xcf}; | 
 |  |  | 
 |  | typedef struct { | 
 |  | UINT8   port; | 
 |  | UINT8   data; | 
 |  | } IODATA; | 
 |  |  | 
 |  | static const IODATA iodata[] = { | 
 |  | // DMA | 
 |  | {0x29, 0x00}, {0x29, 0x01}, {0x29, 0x02}, {0x29, 0x03}, | 
 |  | {0x27, 0x00}, {0x21, 0x00}, {0x23, 0x00}, {0x25, 0x00}, | 
 |  | {0x1b, 0x00}, {0x11, 0x40}, | 
 |  |  | 
 |  | // PIT | 
 |  | {0x77, 0x30}, {0x71, 0x00}, {0x71, 0x00}, | 
 |  | {0x77, 0x76}, {0x73, 0xcd}, {0x73, 0x04}, | 
 |  | {0x77, 0xb6}, | 
 |  |  | 
 |  | // PIC | 
 |  | {0x00, 0x11}, {0x02, 0x08}, {0x02, 0x80}, {0x02, 0x1d}, | 
 |  | {0x08, 0x11}, {0x0a, 0x10}, {0x0a, 0x07}, {0x0a, 0x09}, | 
 |  | {0x02, 0x7d}, {0x0a, 0x71}}; | 
 |  |  | 
 |  | static const UINT8 msw_default[8] = | 
 |  | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}; | 
 |  |  | 
 |  |  | 
 |  | static void bios_itfprepare(void) { | 
 |  |  | 
 |  | const IODATA    *p; | 
 |  | const IODATA    *pterm; | 
 |  |  | 
 |  | p = iodata; | 
 |  | pterm = iodata + (sizeof(iodata) / sizeof(IODATA)); | 
 |  | while(p < pterm) { | 
 |  | iocore_out8(p->port, p->data); | 
 |  | p++; | 
 |  | } | 
 |  |  | 
 |  | // GDCの初期化。 | 
 |  | // … | 
 |  | } | 
 |  |  | 
 |  | static void bios_memclear(void) { | 
 |  |  | 
 |  | ZeroMemory(mem, 0xa0000); | 
 |  | ZeroMemory(mem + 0x100000, 0x10000); | 
 |  | if (CPU_EXTMEM) { | 
 |  | ZeroMemory(CPU_EXTMEM, CPU_EXTMEMSIZE); | 
 |  | } | 
 |  | ZeroMemory(mem + VRAM0_B, 0x18000); | 
 |  | ZeroMemory(mem + VRAM0_E, 0x08000); | 
 |  | ZeroMemory(mem + VRAM1_B, 0x18000); | 
 |  | ZeroMemory(mem + VRAM1_E, 0x08000); | 
 |  | } | 
 |  |  | 
 | static void bios_reinitbyswitch(void) { | static void bios_reinitbyswitch(void) { | 
 |  |  | 
 | BYTE    prxcrt; | BYTE    prxcrt; | 
 | BYTE    prxdupd; | BYTE    prxdupd; | 
 | BYTE    biosflag; | BYTE    biosflag; | 
 | BYTE    ext_mem; |  | 
 | UINT8   boot; | UINT8   boot; | 
 |  |  | 
 | #if defined(CPUCORE_IA32) | #if defined(CPUCORE_IA32) | 
| Line 50  static void bios_reinitbyswitch(void) { | Line 101  static void bios_reinitbyswitch(void) { | 
 |  |  | 
 | if (!(np2cfg.dipsw[2] & 0x80)) { | if (!(np2cfg.dipsw[2] & 0x80)) { | 
 | #if defined(CPUCORE_IA32) | #if defined(CPUCORE_IA32) | 
| mem[MEMB_SYS_TYPE] = 0x02;              // 80386〜 | mem[MEMB_SYS_TYPE] = 0x03;              // 80386〜 | 
 | #else | #else | 
 | mem[MEMB_SYS_TYPE] = 0x01;              // 80286 | mem[MEMB_SYS_TYPE] = 0x01;              // 80286 | 
 | #endif | #endif | 
| Line 60  static void bios_reinitbyswitch(void) { | Line 111  static void bios_reinitbyswitch(void) { | 
 | } | } | 
 |  |  | 
 | mem[MEMB_BIOS_FLAG0] = 0x01; | mem[MEMB_BIOS_FLAG0] = 0x01; | 
| CPU_TYPE = 0; | prxcrt = 0x08; | 
| prxcrt = 0x48;                                                          // ver0.74 | if (!(np2cfg.dipsw[0] & 0x01)) {                        // dipsw1-1 on | 
| if (gdc.display & 2) { | prxcrt |= 0x40; | 
|  | } | 
|  | if (gdc.display & (1 << GDCDISP_ANALOG)) { | 
 | prxcrt |= 0x04;                                                 // color16 | prxcrt |= 0x04;                                                 // color16 | 
 | } | } | 
 | if (!(np2cfg.dipsw[0] & 0x80)) {                        // dipsw1-8 on | if (!(np2cfg.dipsw[0] & 0x80)) {                        // dipsw1-8 on | 
| Line 83  static void bios_reinitbyswitch(void) { | Line 136  static void bios_reinitbyswitch(void) { | 
 | mem[MEMB_PRXDUPD] = prxdupd; | mem[MEMB_PRXDUPD] = prxdupd; | 
 |  |  | 
 | biosflag = 0x20; | biosflag = 0x20; | 
| if (pccore.cpumode & CPUMODE_8MHz) { | if (pccore.cpumode & CPUMODE_8MHZ) { | 
 | biosflag |= 0x80; | biosflag |= 0x80; | 
 | } | } | 
 | biosflag |= mem[0xa3fea] & 7; | biosflag |= mem[0xa3fea] & 7; | 
| if (!(np2cfg.dipsw[2] & 0x80)) { | if (np2cfg.dipsw[2] & 0x80) { | 
| ext_mem = np2cfg.EXTMEM;                                                                        // ver0.28 |  | 
| } |  | 
| else { |  | 
| CPU_TYPE = CPUTYPE_V30; |  | 
| ext_mem = 0; |  | 
 | biosflag |= 0x40; | biosflag |= 0x40; | 
 | } | } | 
 | if (extmem_init(ext_mem)) {                                                                             // ver0.28 |  | 
 | ext_mem = 0;                                                    // メモリ確保に失敗 |  | 
 | } |  | 
 | mem[MEMB_BIOS_FLAG1] = biosflag; | mem[MEMB_BIOS_FLAG1] = biosflag; | 
| mem[MEMB_EXPMMSZ] = (BYTE)(ext_mem << 3); | mem[MEMB_EXPMMSZ] = (BYTE)(pccore.extmem << 3); | 
 | mem[MEMB_CRT_RASTER] = 0x0f; | mem[MEMB_CRT_RASTER] = 0x0f; | 
 |  |  | 
 | gdc.display &= ~4; |  | 
 | if (!(np2cfg.dipsw[0] & 0x04)) {                        // dipsw1-3 on |  | 
 | gdc.display |= 4; |  | 
 | } |  | 
 | gdcs.textdisp |= GDCSCRN_EXT; |  | 
 |  |  | 
 | if (((pccore.model & PCMODELMASK) >= PCMODEL_VX) && |  | 
 | (pccore.sound & 0x7e)) { |  | 
 | iocore_out8(0x188, 0x27); |  | 
 | iocore_out8(0x18a, 0x3f); |  | 
 | } |  | 
 |  |  | 
 | // FDD initialize | // FDD initialize | 
 | SETBIOSMEM32(MEMD_F2DD_POINTER, 0xfd801ad7); | SETBIOSMEM32(MEMD_F2DD_POINTER, 0xfd801ad7); | 
 | SETBIOSMEM32(MEMD_F2HD_POINTER, 0xfd801aaf); | SETBIOSMEM32(MEMD_F2HD_POINTER, 0xfd801aaf); | 
 | boot = mem[MEMB_MSW5] & 0xf0; | boot = mem[MEMB_MSW5] & 0xf0; | 
 | if (boot != 0x20) {             // 1MB | if (boot != 0x20) {             // 1MB | 
| fddbios_equip(DISKTYPE_2HD, TRUE); | fddbios_equip(3, TRUE); | 
 | mem[MEMB_BIOS_FLAG0] |= 0x02; | mem[MEMB_BIOS_FLAG0] |= 0x02; | 
 | } | } | 
 | else {                                  // 640KB | else {                                  // 640KB | 
| fddbios_equip(DISKTYPE_2DD, TRUE); | fddbios_equip(0, TRUE); | 
 | mem[MEMB_BIOS_FLAG0] &= ~0x02; | mem[MEMB_BIOS_FLAG0] &= ~0x02; | 
 | } | } | 
 | mem[MEMB_F2DD_MODE] = 0xff; | mem[MEMB_F2DD_MODE] = 0xff; | 
 |  |  | 
 |  | #if defined(SUPPORT_CRT31KHZ) | 
 |  | mem[MEMB_CRT_BIOS] = 0x80; | 
 |  | #endif | 
 |  | #if defined(SUPPORT_PC9821) | 
 |  | mem[0x45c] = 0x40; | 
 |  | #endif | 
 |  |  | 
 |  | // FDC | 
 |  | if (fdc.support144) { | 
 |  | mem[MEMB_F144_SUP] |= fdc.equip; | 
 |  | } | 
 |  |  | 
 | // IDE initialize | // IDE initialize | 
 | if (pccore.hddif & PCHDD_IDE) { | if (pccore.hddif & PCHDD_IDE) { | 
 | mem[MEMB_SYS_TYPE] |= 0x80;             // IDE | mem[MEMB_SYS_TYPE] |= 0x80;             // IDE | 
| Line 136  static void bios_reinitbyswitch(void) { | Line 181  static void bios_reinitbyswitch(void) { | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void bios_vectorset(void) {                                                                      // ver0.30 | static void bios_vectorset(void) { | 
 |  |  | 
 | UINT    i; | UINT    i; | 
 |  |  | 
| Line 152  static void bios_vectorset(void) { | Line 197  static void bios_vectorset(void) { | 
 |  |  | 
 | static void bios_screeninit(void) { | static void bios_screeninit(void) { | 
 |  |  | 
| UINT    ax; | REG8    al; | 
 |  |  | 
| ax = 0x0a04; | al = 4; | 
| ax += (np2cfg.dipsw[1] & 0x04) >> 1; | al += (np2cfg.dipsw[1] & 0x04) >> 1; | 
| ax += (np2cfg.dipsw[1] & 0x08) >> 3; | al += (np2cfg.dipsw[1] & 0x08) >> 3; | 
| CPU_AX = ax; | bios0x18_0a(al); | 
| bios0x18(); |  | 
 | } | } | 
 |  |  | 
 |  |  | 
| Line 174  static const UINT16 biosoffset[0x20] = { | Line 218  static const UINT16 biosoffset[0x20] = { | 
 | BIOSOFST_EOIS,  BIOSOFST_EOIS,  BIOSOFST_EOIS,  BIOSOFST_EOIS, | BIOSOFST_EOIS,  BIOSOFST_EOIS,  BIOSOFST_EOIS,  BIOSOFST_EOIS, | 
 |  |  | 
 | BIOSOFST_18,    BIOSOFST_19,    BIOSOFST_1a,    BIOSOFST_1b, | BIOSOFST_18,    BIOSOFST_19,    BIOSOFST_1a,    BIOSOFST_1b, | 
| BIOSOFST_1c,    BIOSOFST_IRET,  BIOSOFST_1e,    BIOSOFST_IRET}; | BIOSOFST_1c,    BIOSOFST_IRET,  BIOSOFST_1e,    BIOSOFST_1f}; | 
 |  |  | 
 |  |  | 
| void bios_init(void) { | void bios_initialize(void) { | 
 |  |  | 
 | char    path[MAX_PATH]; | char    path[MAX_PATH]; | 
 | FILEH   fh; | FILEH   fh; | 
| Line 188  void bios_init(void) { | Line 232  void bios_init(void) { | 
 |  |  | 
 | // まぁDISK BASIC動くようになるからいいんじゃないですか? | // まぁDISK BASIC動くようになるからいいんじゃないですか? | 
 | // BASIC BIOSは 8086コードのように見えるけど… | // BASIC BIOSは 8086コードのように見えるけど… | 
| getbiospath(path, file_biosrom, sizeof(path)); | getbiospath(path, str_biosrom, sizeof(path)); | 
 | fh = file_open_rb(path); | fh = file_open_rb(path); | 
 | if (fh != FILEH_INVALID) { | if (fh != FILEH_INVALID) { | 
 | if (file_read(fh, mem + 0x0e8000, 0x18000) == 0x18000) { | if (file_read(fh, mem + 0x0e8000, 0x18000) == 0x18000) { | 
| Line 208  void bios_init(void) { | Line 252  void bios_init(void) { | 
 | } | } | 
 | SETBIOSMEM16(BIOS_BASE + BIOSOFST_IRET, 0x50cf); | SETBIOSMEM16(BIOS_BASE + BIOSOFST_IRET, 0x50cf); | 
 | SETBIOSMEM16(BIOS_BASE + BIOSOFST_WAIT, 0xcf90); | SETBIOSMEM16(BIOS_BASE + BIOSOFST_WAIT, 0xcf90); | 
| for (i=(BIOS_BASE+BIOSOFST_EOIM); i<=(BIOS_BASE+BIOSOFST_1c); i+=2) { | for (i=(BIOS_BASE+BIOSOFST_EOIM); i<=(BIOS_BASE+BIOSOFST_1f); i+=2) { | 
 | SETBIOSMEM16(i, 0xcf90); | SETBIOSMEM16(i, 0xcf90); | 
 | } | } | 
 | CopyMemory(mem + BIOS_BASE + BIOSOFST_PRT, printmain, sizeof(printmain)); | CopyMemory(mem + BIOS_BASE + BIOSOFST_PRT, printmain, sizeof(printmain)); | 
 |  |  | 
| bios_vectorset();                                                                                               // ver0.29 | //      bios_vectorset(); | 
 | if (!biosrom) { | if (!biosrom) { | 
| lio_init(); | lio_initialize(); | 
 | } | } | 
 |  |  | 
 | SETBIOSMEM16(0xfd800, 0xcb90); | SETBIOSMEM16(0xfd800, 0xcb90); | 
| Line 240  void bios_init(void) { | Line 284  void bios_init(void) { | 
 | CopyMemory(mem + 0xf538e, itfrom + pos, 0x27); | CopyMemory(mem + 0xf538e, itfrom + pos, 0x27); | 
 | } | } | 
 |  |  | 
| bios_reinitbyswitch(); | //      bios_reinitbyswitch(); | 
| mem[MEMB_CRT_STS_FLAG] = 0x84; | //      mem[MEMB_CRT_STS_FLAG] = 0x84;          // -> bios_screeninit() | 
 | //      mem[MEMB_BIOS_FLAG0] = 0x03; | //      mem[MEMB_BIOS_FLAG0] = 0x03; | 
| //      mem[MEMB_F2DD_MODE] = 0xff;                                                                             // ver0.29 | //      mem[MEMB_F2DD_MODE] = 0xff; | 
| //      SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003);                                                  // ver0.29 | //      SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003); | 
| mem[0x005ae] |= 0x03;                                                                                   // ver0.31 | //      mem[0x005ae] |= 0x03; | 
 |  |  | 
 | CopyMemory(mem + 0x0fde00, keytable[0], 0x300); | CopyMemory(mem + 0x0fde00, keytable[0], 0x300); | 
| bios0x09_init(); | //      bios0x09_init(); | 
 |  |  | 
 | CopyMemory(mem + ITF_ADRS, itfrom, sizeof(itfrom)); | CopyMemory(mem + ITF_ADRS, itfrom, sizeof(itfrom)); | 
 | mem[ITF_ADRS + 0x7ff0] = 0xea; | mem[ITF_ADRS + 0x7ff0] = 0xea; | 
| Line 268  void bios_init(void) { | Line 312  void bios_init(void) { | 
 | file_close(fh); | file_close(fh); | 
 | TRACEOUT(("load itf.rom")); | TRACEOUT(("load itf.rom")); | 
 | } | } | 
 | extmem_init(np2cfg.EXTMEM); |  | 
 | #endif | #endif | 
 |  |  | 
 | CopyMemory(mem + 0x1c0000, mem + ITF_ADRS, 0x08000); | CopyMemory(mem + 0x1c0000, mem + ITF_ADRS, 0x08000); | 
| Line 277  void bios_init(void) { | Line 320  void bios_init(void) { | 
 |  |  | 
 | static void bios_boot(void) { | static void bios_boot(void) { | 
 |  |  | 
| if (sysport.c & 0x80) { | int             i; | 
| if (!(sysport.c & 0x20)) { |  | 
| bios_reinitbyswitch(); | if (!(sysport.c & 0x80)) { | 
| } |  | 
| CPU_CS = 0x0000; |  | 
| CPU_IP = 0x04f8; |  | 
| CPU_DS = 0x0000; |  | 
| CPU_DX = 0x43d; |  | 
| CPU_AL = 0x10; |  | 
| mem[0x004f8] = 0xee;            // out  dx, al |  | 
| mem[0x004f9] = 0xea;            // call far |  | 
| SETBIOSMEM16(0x004fa, 0x0000); |  | 
| SETBIOSMEM16(0x004fc, 0xffff); |  | 
| } |  | 
| else { |  | 
 | CPU_SP = GETBIOSMEM16(0x00404); | CPU_SP = GETBIOSMEM16(0x00404); | 
 | CPU_SS = GETBIOSMEM16(0x00406); | CPU_SS = GETBIOSMEM16(0x00406); | 
 | //              TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); | //              TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); | 
 | } | } | 
 |  | else { | 
 |  | bios_itfprepare(); | 
 |  | bios_memclear(); | 
 |  | bios_vectorset(); | 
 |  | bios0x09_init(); | 
 |  | bios_reinitbyswitch(); | 
 |  |  | 
 |  | if (!np2cfg.ITF_WORK) { | 
 |  | for (i=0; i<8; i++) { | 
 |  | mem[MEMB_MSW + (i*4)] = msw_default[i]; | 
 |  | } | 
 |  | CPU_IP = 0x0002; | 
 |  | } | 
 |  | else if (sysport.c & 0x20) { | 
 |  | CPU_CS = 0x0000; | 
 |  | CPU_IP = 0x04f8; | 
 |  | CPU_DS = 0x0000; | 
 |  | CPU_DX = 0x43d; | 
 |  | CPU_AL = 0x10; | 
 |  | mem[0x004f8] = 0xee;            // out  dx, al | 
 |  | mem[0x004f9] = 0xea;            // call far | 
 |  | SETBIOSMEM16(0x004fa, 0x0000); | 
 |  | SETBIOSMEM16(0x004fc, 0xffff); | 
 |  | } | 
 |  | else { | 
 |  | CPU_IP = 0x0002; | 
 |  | } | 
 |  | } | 
 | } | } | 
 |  |  | 
 |  | // テスト(こんなんじゃだめぽ | 
 |  | static void bios0x1f(void) { | 
 |  |  | 
 |  | BYTE    work[256]; | 
 |  | UINT32  src; | 
 |  | UINT32  dst; | 
 |  | UINT    leng; | 
 |  | UINT    l; | 
 |  |  | 
 |  | if (CPU_AH == 0x90) { | 
 |  | MEML_READSTR(CPU_ES, CPU_BX + 0x10, work, 0x10); | 
 |  | src = work[2] + (work[3] << 8) + (work[4] << 16) + CPU_SI; | 
 |  | dst = work[10] + (work[11] << 8) + (work[12] << 16) + CPU_DI; | 
 |  | leng = LOW16(CPU_CX - 1) + 1; | 
 |  | TRACEOUT(("protect bios: memmove")); | 
 |  | TRACEOUT(("%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | 
 |  | work[0], work[1], work[2], work[3], | 
 |  | work[4], work[5], work[6], work[7])); | 
 |  | TRACEOUT(("%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | 
 |  | work[8], work[9], work[10], work[11], | 
 |  | work[12], work[13], work[14], work[15])); | 
 |  | TRACEOUT(("SI=%.4x DI=%.4x CX=%.4x", CPU_SI, CPU_DI, CPU_CX)); | 
 |  | TRACEOUT(("src:%08x dst:%08x leng:%08x", src, dst, leng)); | 
 |  | do { | 
 |  | l = min(leng, 256); | 
 |  | MEML_READ(src, work, l); | 
 |  | MEML_WRITE(dst, work, l); | 
 |  | src += l; | 
 |  | dst += l; | 
 |  | leng -= l; | 
 |  | } while(leng); | 
 |  | } | 
 |  | else { | 
 |  | TRACEOUT(("unsupport protect bios AH=%.2x", CPU_AH)); | 
 |  | } | 
 |  | } | 
 |  |  | 
 | UINT MEMCALL biosfunc(UINT32 adrs) { | UINT MEMCALL biosfunc(UINT32 adrs) { | 
 |  |  | 
 | UINT16  bootseg; | UINT16  bootseg; | 
 |  |  | 
 | if ((CPU_ITFBANK) && (adrs >= 0xf8000) && (adrs < 0x100000)) { | if ((CPU_ITFBANK) && (adrs >= 0xf8000) && (adrs < 0x100000)) { | 
| #if 1                                   // for epson ITF | // for epson ITF | 
 | return(0); | return(0); | 
 | #else |  | 
 | CPU_IP--; |  | 
 | CPU_REMCLOCK = -1; |  | 
 | return(1); |  | 
 | #endif |  | 
 | } | } | 
 |  |  | 
| switch(adrs) {                                                                                                  // ver0.30 | //      TRACEOUT(("biosfunc(%x)", adrs)); | 
|  | #if defined(CPUCORE_IA32) && defined(TRACE) | 
|  | if (CPU_STAT_PAGING) { | 
|  | UINT32 pde = i286_memoryread_d(CPU_STAT_PDE_BASE); | 
|  | if (!(pde & CPU_PDE_PRESENT)) { | 
|  | TRACEOUT(("page0: PTE not present")); | 
|  | } | 
|  | else { | 
|  | UINT32 pte = i286_memoryread_d(pde & CPU_PDE_BASEADDR_MASK); | 
|  | if (!(pte & CPU_PTE_PRESENT)) { | 
|  | TRACEOUT(("page0: not present")); | 
|  | } | 
|  | else if (pte & CPU_PTE_BASEADDR_MASK) { | 
|  | TRACEOUT(("page0: physical address != 0 (pte = %.8x)", pte)); | 
|  | } | 
|  | } | 
|  | } | 
|  | #endif | 
|  |  | 
|  | switch(adrs) { | 
 | case BIOS_BASE + BIOSOFST_EOIM: | case BIOS_BASE + BIOSOFST_EOIM: | 
 | CPU_REMCLOCK -= 300; | CPU_REMCLOCK -= 300; | 
 | iocore_out8(0x00, 0x20); | iocore_out8(0x00, 0x20); | 
| Line 382  UINT MEMCALL biosfunc(UINT32 adrs) { | Line 491  UINT MEMCALL biosfunc(UINT32 adrs) { | 
 | bios0x1c(); | bios0x1c(); | 
 | return(1); | return(1); | 
 |  |  | 
 |  | case BIOS_BASE + BIOSOFST_1f: | 
 |  | CPU_REMCLOCK -= 200; | 
 |  | bios0x1f(); | 
 |  | return(1); | 
 |  |  | 
 | case BIOS_BASE + BIOSOFST_WAIT: | case BIOS_BASE + BIOSOFST_WAIT: | 
 | CPU_STI; | CPU_STI; | 
| if (fddmtr_biosbusy) {                                          // ver0.26 | if (fddmtr.busy) { | 
 | CPU_IP--; | CPU_IP--; | 
 | CPU_REMCLOCK = -1; | CPU_REMCLOCK = -1; | 
 | } | } | 
 | else { | else { | 
| switch(CTRL_FDMEDIA) { | if (fdc.chgreg & 1) { | 
| case DISKTYPE_2HD: | if (!(mem[0x0055e] & (0x01 << fdc.us))) { | 
| if (pic.pi[1].isr & PIC_INT42) { | CPU_IP--; | 
| CPU_IP--; | CPU_REMCLOCK -= 1000; | 
| CPU_REMCLOCK -= 1000; | } | 
| } | } | 
| break; | else { | 
| case DISKTYPE_2DD: | if (!(mem[0x0055f] & (0x10 << fdc.us))) { | 
| if (pic.pi[1].isr & PIC_INT41) { | CPU_IP--; | 
| CPU_IP--; | CPU_REMCLOCK -= 1000; | 
| CPU_REMCLOCK -= 1000; | } | 
| } |  | 
| break; |  | 
 | } | } | 
 | } | } | 
 | return(1); | return(1); | 
| Line 418  UINT MEMCALL biosfunc(UINT32 adrs) { | Line 530  UINT MEMCALL biosfunc(UINT32 adrs) { | 
 | bios_reinitbyswitch(); | bios_reinitbyswitch(); | 
 | bios_vectorset(); | bios_vectorset(); | 
 | bios_screeninit(); | bios_screeninit(); | 
 |  | if (((pccore.model & PCMODELMASK) >= PCMODEL_VX) && | 
 |  | (pccore.sound & 0x7e)) { | 
 |  | iocore_out8(0x188, 0x27); | 
 |  | iocore_out8(0x18a, 0x3f); | 
 |  | } | 
 |  |  | 
 | #if 1                                                                                                                           // ver0.73 | #if 1                                                                                                                           // ver0.73 | 
 | CPU_CS = 0xfd80;                        // SASI/SCSIリセット | CPU_CS = 0xfd80;                        // SASI/SCSIリセット | 
 | CPU_IP = 0x2400; | CPU_IP = 0x2400; | 
| Line 449  UINT MEMCALL biosfunc(UINT32 adrs) { | Line 567  UINT MEMCALL biosfunc(UINT32 adrs) { | 
 | return(0); | return(0); | 
 | } | } | 
 |  |  | 
| if ((adrs >= 0xf9a00) && (adrs < 0x0f9a24)) { | if ((adrs >= 0xf9a00) && (adrs < 0x0f9a44)) { | 
| if (!(adrs & 1)) { | if (!(adrs & 3)) { | 
| bios_lio((BYTE)((adrs - 0xf9a00) >> 1)); | CPU_REMCLOCK -= 500; | 
|  | bios_lio((REG8)((adrs - 0xf9a00) >> 2)); | 
|  | } | 
|  | else { | 
|  | if (nevent_iswork(NEVENT_GDCSLAVE)) { | 
|  | CPU_IP--; | 
|  | CPU_REMCLOCK = -1; | 
|  | return(1); | 
|  | } | 
 | } | } | 
 | return(0); | return(0); | 
 | } | } |