|
|
| version 1.22, 2004/01/05 12:54:56 | version 1.33, 2004/01/25 05:41:28 |
|---|---|
| Line 5 | Line 5 |
| #include "iocore.h" | #include "iocore.h" |
| #include "bios.h" | #include "bios.h" |
| #include "biosmem.h" | #include "biosmem.h" |
| #include "sound.h" | #include "sxsibios.h" |
| #include "fmboard.h" | |
| #include "lio.h" | #include "lio.h" |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_mtr.h" | #include "fdd_mtr.h" |
| Line 15 | Line 14 |
| #include "itfrom.res" | #include "itfrom.res" |
| #include "startup.res" | #include "startup.res" |
| #include "biosboot.res" | #include "biosboot.res" |
| #include "sxsibios.res" | |
| #define BIOS_SIMULATE | #define BIOS_SIMULATE |
| Line 35 static void bios_reinitbyswitch(void) { | Line 33 static void bios_reinitbyswitch(void) { |
| BYTE prxcrt; | BYTE prxcrt; |
| BYTE prxdupd; | BYTE prxdupd; |
| BYTE biosflag; | BYTE biosflag; |
| BYTE ext_mem; | UINT8 boot; |
| CPU_TYPE = 0; | #if defined(CPUCORE_IA32) |
| prxcrt = 0xc8; | UINT16 org_cs; |
| UINT16 org_ip; | |
| org_cs = CPU_CS; | |
| org_ip = CPU_IP; | |
| CPU_SHUT(); | |
| CPU_CS = org_cs; | |
| CPU_IP = org_ip; | |
| SETBIOSMEM16(0x00486, CPU_DX); | |
| #endif | |
| if (!(np2cfg.dipsw[2] & 0x80)) { | |
| #if defined(CPUCORE_IA32) | |
| mem[MEMB_SYS_TYPE] = 0x03; // 80386〜 | |
| #else | |
| mem[MEMB_SYS_TYPE] = 0x01; // 80286 | |
| #endif | |
| } | |
| else { | |
| mem[MEMB_SYS_TYPE] = 0x00; // V30 | |
| } | |
| mem[MEMB_BIOS_FLAG0] = 0x01; | |
| prxcrt = 0x48; // ver0.74 | |
| if (gdc.display & 2) { | if (gdc.display & 2) { |
| prxcrt |= 0x04; // color16 | prxcrt |= 0x04; // color16 |
| } | } |
| Line 60 static void bios_reinitbyswitch(void) { | Line 81 static void bios_reinitbyswitch(void) { |
| mem[MEMB_PRXDUPD] = prxdupd; | mem[MEMB_PRXDUPD] = prxdupd; |
| biosflag = 0x20; | biosflag = 0x20; |
| if (pc.cpumode & CPUMODE_8MHz) { | if (pccore.cpumode & CPUMODE_8MHz) { |
| biosflag |= 0x80; | biosflag |= 0x80; |
| } | } |
| biosflag |= mem[0xa3fea] & 7; | biosflag |= mem[0xa3fea] & 7; |
| if (!(np2cfg.dipsw[2] & 0x80)) { | if (np2cfg.dipsw[2] & 0x80) { |
| ext_mem = np2cfg.EXTMEM; // ver0.28 | |
| } | |
| else { | |
| CPU_TYPE = CPUTYPE_V30; | |
| ext_mem = 0; | |
| biosflag |= 0x40; | biosflag |= 0x40; |
| } | } |
| if (extmem_init(ext_mem)) { // ver0.28 | mem[MEMB_BIOS_FLAG1] = biosflag; |
| ext_mem = 0; // メモリ確保に失敗 | mem[MEMB_EXPMMSZ] = (BYTE)(pccore.extmem << 3); |
| } | |
| mem[MEMB_BIOS_FLAG] = biosflag; | |
| mem[MEMB_EXPMMSZ] = (BYTE)(ext_mem << 3); | |
| mem[MEMB_CRT_RASTER] = 0x0f; | mem[MEMB_CRT_RASTER] = 0x0f; |
| gdc.display &= ~4; | gdc.display &= ~4; |
| Line 85 static void bios_reinitbyswitch(void) { | Line 98 static void bios_reinitbyswitch(void) { |
| } | } |
| gdcs.textdisp |= GDCSCRN_EXT; | gdcs.textdisp |= GDCSCRN_EXT; |
| if (((pc.model & PCMODELMASK) >= PCMODEL_VX) && (usesound & 0x7e)) { | // FDD initialize |
| iocore_out8(0x188, 0x27); | SETBIOSMEM32(MEMD_F2DD_POINTER, 0xfd801ad7); |
| iocore_out8(0x18a, 0x3f); | SETBIOSMEM32(MEMD_F2HD_POINTER, 0xfd801aaf); |
| boot = mem[MEMB_MSW5] & 0xf0; | |
| if (boot != 0x20) { // 1MB | |
| fddbios_equip(DISKTYPE_2HD, TRUE); | |
| mem[MEMB_BIOS_FLAG0] |= 0x02; | |
| } | |
| else { // 640KB | |
| fddbios_equip(DISKTYPE_2DD, TRUE); | |
| mem[MEMB_BIOS_FLAG0] &= ~0x02; | |
| } | |
| mem[MEMB_F2DD_MODE] = 0xff; | |
| // IDE initialize | |
| if (pccore.hddif & PCHDD_IDE) { | |
| mem[MEMB_SYS_TYPE] |= 0x80; // IDE | |
| CPU_AX = 0x8300; | |
| sasibios_operate(); | |
| } | } |
| } | } |
| Line 105 static void bios_vectorset(void) { | Line 134 static void bios_vectorset(void) { |
| SETBIOSMEM32(0x1e*4, 0xe8000000); | SETBIOSMEM32(0x1e*4, 0xe8000000); |
| } | } |
| static void bios_screeninit(void) { | |
| UINT ax; | |
| ax = 0x0a04; | |
| ax += (np2cfg.dipsw[1] & 0x04) >> 1; | |
| ax += (np2cfg.dipsw[1] & 0x08) >> 3; | |
| CPU_AX = ax; | |
| bios0x18(); | |
| } | |
| // CDSで見てる為、変更…(涙 | // CDSで見てる為、変更…(涙 |
| static const UINT16 biosoffset[0x20] = { | static const UINT16 biosoffset[0x20] = { |
| Line 167 void bios_init(void) { | Line 207 void bios_init(void) { |
| for (i=0; i<8; i+=2) { | for (i=0; i<8; i+=2) { |
| STOREINTELWORD(mem + 0xfd800 + 0x1aaf + i, 0x1ab7); | STOREINTELWORD(mem + 0xfd800 + 0x1aaf + i, 0x1ab7); |
| STOREINTELWORD(mem + 0xfd800 + 0x1ad7 + i, 0x1adf); | STOREINTELWORD(mem + 0xfd800 + 0x1ad7 + i, 0x1adf); |
| STOREINTELWORD(mem + 0xfd800 + 0x2361 + i, 0x1980); // ver0.31 | STOREINTELWORD(mem + 0xfd800 + 0x2361 + i, 0x1980); |
| } | } |
| CopyMemory(mem + 0xfd800 + 0x1ab7, fdfmt2hd, sizeof(fdfmt2hd)); | CopyMemory(mem + 0xfd800 + 0x1ab7, fdfmt2hd, sizeof(fdfmt2hd)); |
| CopyMemory(mem + 0xfd800 + 0x1adf, fdfmt2dd, sizeof(fdfmt2dd)); | CopyMemory(mem + 0xfd800 + 0x1adf, fdfmt2dd, sizeof(fdfmt2dd)); |
| CopyMemory(mem + 0xfd800 + 0x1980, fdfmt144, sizeof(fdfmt144)); // ver0.31 | CopyMemory(mem + 0xfd800 + 0x1980, fdfmt144, sizeof(fdfmt144)); |
| CopyMemory(mem + 0xfd800 + 0x2400, biosboot, sizeof(biosboot)); // ver0.73 | |
| SETBIOSMEM16(0xfffe8, 0xcb90); | SETBIOSMEM16(0xfffe8, 0xcb90); |
| SETBIOSMEM16(0xfffec, 0xcb90); | SETBIOSMEM16(0xfffec, 0xcb90); |
| mem[0xffff0] = 0xea; | mem[0xffff0] = 0xea; |
| STOREINTELDWORD(mem + 0xffff1, 0xfd800000); | STOREINTELDWORD(mem + 0xffff1, 0xfd800000); |
| if ((!biosrom) && (!(pc.model & PCMODEL_EPSON))) { | if ((!biosrom) && (!(pccore.model & PCMODEL_EPSON))) { |
| CopyMemory(mem + 0xe8dd8, neccheck, 0x25); | CopyMemory(mem + 0xe8dd8, neccheck, 0x25); |
| pos = LOADINTELWORD(itfrom + 2); | pos = LOADINTELWORD(itfrom + 2); |
| CopyMemory(mem + 0xf538e, itfrom + pos, 0x27); | CopyMemory(mem + 0xf538e, itfrom + pos, 0x27); |
| Line 187 void bios_init(void) { | Line 226 void bios_init(void) { |
| bios_reinitbyswitch(); | bios_reinitbyswitch(); |
| mem[MEMB_CRT_STS_FLAG] = 0x84; | mem[MEMB_CRT_STS_FLAG] = 0x84; |
| mem[MEMB_BIOS_FLAG0] = 0x03; // 00/05/17 beep tone | // mem[MEMB_BIOS_FLAG0] = 0x03; |
| mem[MEMB_F2DD_MODE] = 0xff; // ver0.29 | // mem[MEMB_F2DD_MODE] = 0xff; // ver0.29 |
| SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003); // ver0.29 | // SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003); // ver0.29 |
| SETBIOSMEM32(MEMD_F2DD_POINTER, 0xfd801ad7); | |
| SETBIOSMEM32(MEMD_F2HD_POINTER, 0xfd801aaf); | |
| mem[0x005ae] |= 0x03; // ver0.31 | mem[0x005ae] |= 0x03; // ver0.31 |
| CopyMemory(mem + 0x0fde00, keytable[0], 0x300); | CopyMemory(mem + 0x0fde00, keytable[0], 0x300); |
| Line 200 void bios_init(void) { | Line 237 void bios_init(void) { |
| CopyMemory(mem + ITF_ADRS, itfrom, sizeof(itfrom)); | CopyMemory(mem + ITF_ADRS, itfrom, sizeof(itfrom)); |
| mem[ITF_ADRS + 0x7ff0] = 0xea; | mem[ITF_ADRS + 0x7ff0] = 0xea; |
| STOREINTELDWORD(mem + ITF_ADRS + 0x7ff1, 0xf8000000); | STOREINTELDWORD(mem + ITF_ADRS + 0x7ff1, 0xf8000000); |
| if (pc.model & PCMODEL_EPSON) { | if (pccore.model & PCMODEL_EPSON) { |
| mem[ITF_ADRS + 0x7ff1] = 0x04; | mem[ITF_ADRS + 0x7ff1] = 0x04; |
| } | } |
| else if ((pc.model & PCMODELMASK) == PCMODEL_VM) { | else if ((pccore.model & PCMODELMASK) == PCMODEL_VM) { |
| mem[ITF_ADRS + 0x7ff1] = 0x08; | mem[ITF_ADRS + 0x7ff1] = 0x08; |
| } | } |
| CopyMemory(mem + 0xfd800 + 0x2400, biosboot, sizeof(biosboot)); | |
| #else | #else |
| fh = file_open_c("itf.rom"); | fh = file_open_c("itf.rom"); |
| if (fh != FILEH_INVALID) { | if (fh != FILEH_INVALID) { |
| file_read(fh, &mem[ITF_ADRS], 0x8000); | file_read(fh, mem + ITF_ADRS, 0x8000); |
| file_close(fh); | file_close(fh); |
| TRACEOUT(("load itf.rom")); | |
| } | } |
| extmem_init(np2cfg.EXTMEM); | |
| #endif | #endif |
| CopyMemory(mem + 0xd0000, sxsibios, sizeof(sxsibios)); | CopyMemory(mem + 0x1c0000, mem + ITF_ADRS, 0x08000); |
| CopyMemory(mem + 0x1c0000, mem + 0x1f8000, 0x08000); | |
| CopyMemory(mem + 0x1e8000, mem + 0x0e8000, 0x10000); | CopyMemory(mem + 0x1e8000, mem + 0x0e8000, 0x10000); |
| } | } |
| Line 240 static void bios_boot(void) { | Line 277 static void bios_boot(void) { |
| else { | else { |
| CPU_SP = GETBIOSMEM16(0x00404); | CPU_SP = GETBIOSMEM16(0x00404); |
| CPU_SS = GETBIOSMEM16(0x00406); | CPU_SS = GETBIOSMEM16(0x00406); |
| TRACEOUT(("Protect Disable... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); | // TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); |
| } | } |
| } | } |
| Line 250 UINT MEMCALL biosfunc(UINT32 adrs) { | Line 287 UINT MEMCALL biosfunc(UINT32 adrs) { |
| UINT16 bootseg; | UINT16 bootseg; |
| if ((CPU_ITFBANK) && (adrs >= 0xf8000) && (adrs < 0x100000)) { | if ((CPU_ITFBANK) && (adrs >= 0xf8000) && (adrs < 0x100000)) { |
| #if 1 // for epson ITF | |
| return(0); | |
| #else | |
| CPU_IP--; | CPU_IP--; |
| CPU_REMCLOCK = -1; | CPU_REMCLOCK = -1; |
| return(1); | return(1); |
| #endif | |
| } | } |
| switch(adrs) { // ver0.30 | switch(adrs) { // ver0.30 |
| Line 314 UINT MEMCALL biosfunc(UINT32 adrs) { | Line 355 UINT MEMCALL biosfunc(UINT32 adrs) { |
| return(1); | return(1); |
| case BIOS_BASE + BIOSOFST_1b: | case BIOS_BASE + BIOSOFST_1b: |
| CPU_STI; | |
| CPU_REMCLOCK -= 200; | CPU_REMCLOCK -= 200; |
| bios0x1b(); | bios0x1b(); |
| return(1); | return(1); |
| Line 358 UINT MEMCALL biosfunc(UINT32 adrs) { | Line 400 UINT MEMCALL biosfunc(UINT32 adrs) { |
| case 0xfd802: // ブート | case 0xfd802: // ブート |
| bios_reinitbyswitch(); | bios_reinitbyswitch(); |
| bios_vectorset(); | bios_vectorset(); |
| bios_screeninit(); | |
| if (((pccore.model & PCMODELMASK) >= PCMODEL_VX) && | |
| (pccore.sound & 0x7e)) { | |
| iocore_out8(0x188, 0x27); | |
| iocore_out8(0x18a, 0x3f); | |
| } | |
| #if 1 // ver0.73 | #if 1 // ver0.73 |
| CPU_CS = 0xfd80; | CPU_CS = 0xfd80; // SASI/SCSIリセット |
| CPU_IP = 0x2400; | CPU_IP = 0x2400; |
| #else | #else |
| bootseg = bootstrapload(); | bootseg = bootstrapload(); |