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| version 1.50, 2004/02/29 07:36:56 | version 1.57, 2004/03/09 16:31:18 |
|---|---|
| Line 26 static const char neccheck[] = "Copyrigh | Line 26 static const char neccheck[] = "Copyrigh |
| // 00/05/18 MS-DOS6.2 on PC-9801VX calling proc | // 00/05/18 MS-DOS6.2 on PC-9801VX calling proc |
| static const BYTE printmain[] = {0x90, 0x5a, 0x1f, 0xcf}; | static const BYTE printmain[] = {0x90, 0x5a, 0x1f, 0xcf}; |
| typedef struct { | |
| UINT8 port; | |
| UINT8 data; | |
| } IODATA; | |
| static const IODATA iodata[] = { | |
| // DMA | |
| {0x29, 0x00}, {0x29, 0x01}, {0x29, 0x02}, {0x29, 0x03}, | |
| {0x27, 0x00}, {0x21, 0x00}, {0x23, 0x00}, {0x25, 0x00}, | |
| {0x1b, 0x00}, {0x11, 0x40}, | |
| // PIT | |
| {0x77, 0x30}, {0x71, 0x00}, {0x71, 0x00}, | |
| {0x77, 0x76}, {0x73, 0xcd}, {0x73, 0x04}, | |
| {0x77, 0xb6}, | |
| // PIC | |
| {0x00, 0x11}, {0x02, 0x08}, {0x02, 0x80}, {0x02, 0x1d}, | |
| {0x08, 0x11}, {0x0a, 0x10}, {0x0a, 0x07}, {0x0a, 0x09}, | |
| {0x02, 0x7d}, {0x0a, 0x71}}; | |
| static const UINT8 msw_default[8] = | |
| {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}; | |
| static void bios_itfprepare(void) { | |
| const IODATA *p; | |
| const IODATA *pterm; | |
| p = iodata; | |
| pterm = iodata + (sizeof(iodata) / sizeof(IODATA)); | |
| while(p < pterm) { | |
| iocore_out8(p->port, p->data); | |
| p++; | |
| } | |
| // GDCの初期化。 | |
| // … | |
| } | |
| static void bios_memclear(void) { | |
| ZeroMemory(mem, 0xa0000); | |
| ZeroMemory(mem + 0x100000, 0x10000); | |
| if (CPU_EXTMEM) { | |
| ZeroMemory(CPU_EXTMEM, CPU_EXTMEMSIZE); | |
| } | |
| ZeroMemory(mem + VRAM0_B, 0x18000); | |
| ZeroMemory(mem + VRAM0_E, 0x08000); | |
| ZeroMemory(mem + VRAM1_B, 0x18000); | |
| ZeroMemory(mem + VRAM1_E, 0x08000); | |
| } | |
| static void bios_reinitbyswitch(void) { | static void bios_reinitbyswitch(void) { |
| Line 115 static void bios_reinitbyswitch(void) { | Line 168 static void bios_reinitbyswitch(void) { |
| mem[0x45c] = 0x40; | mem[0x45c] = 0x40; |
| #endif | #endif |
| // FDC | |
| if (fdc.support144) { | |
| mem[MEMB_F144_SUP] |= fdc.equip; | |
| } | |
| // IDE initialize | // IDE initialize |
| if (pccore.hddif & PCHDD_IDE) { | if (pccore.hddif & PCHDD_IDE) { |
| mem[MEMB_SYS_TYPE] |= 0x80; // IDE | mem[MEMB_SYS_TYPE] |= 0x80; // IDE |
| Line 123 static void bios_reinitbyswitch(void) { | Line 181 static void bios_reinitbyswitch(void) { |
| } | } |
| } | } |
| static void bios_memclear(void) { | |
| ZeroMemory(mem, 0xa0000); | |
| ZeroMemory(mem + VRAM1_B, 0x18000); | |
| ZeroMemory(mem + VRAM1_E, 0x08000); | |
| } | |
| static void bios_vectorset(void) { | static void bios_vectorset(void) { |
| UINT i; | UINT i; |
| Line 238 void bios_initialize(void) { | Line 289 void bios_initialize(void) { |
| // mem[MEMB_BIOS_FLAG0] = 0x03; | // mem[MEMB_BIOS_FLAG0] = 0x03; |
| // mem[MEMB_F2DD_MODE] = 0xff; | // mem[MEMB_F2DD_MODE] = 0xff; |
| // SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003); | // SETBIOSMEM16(MEMW_DISK_EQUIP, 0x0003); |
| mem[0x005ae] |= 0x03; // ver0.31 | // mem[0x005ae] |= 0x03; |
| CopyMemory(mem + 0x0fde00, keytable[0], 0x300); | CopyMemory(mem + 0x0fde00, keytable[0], 0x300); |
| // bios0x09_init(); | // bios0x09_init(); |
| Line 269 void bios_initialize(void) { | Line 320 void bios_initialize(void) { |
| static void bios_boot(void) { | static void bios_boot(void) { |
| int i; | |
| if (!(sysport.c & 0x80)) { | if (!(sysport.c & 0x80)) { |
| CPU_SP = GETBIOSMEM16(0x00404); | CPU_SP = GETBIOSMEM16(0x00404); |
| CPU_SS = GETBIOSMEM16(0x00406); | CPU_SS = GETBIOSMEM16(0x00406); |
| // TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); | // TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP)); |
| } | } |
| else { | else { |
| bios_itfprepare(); | |
| bios_memclear(); | bios_memclear(); |
| bios_vectorset(); | bios_vectorset(); |
| bios0x09_init(); | bios0x09_init(); |
| bios_reinitbyswitch(); | bios_reinitbyswitch(); |
| if (sysport.c & 0x20) { | if (!np2cfg.ITF_WORK) { |
| for (i=0; i<8; i++) { | |
| mem[MEMB_MSW + (i*4)] = msw_default[i]; | |
| } | |
| CPU_IP = 0x0002; | |
| } | |
| else if (sysport.c & 0x20) { | |
| CPU_CS = 0x0000; | CPU_CS = 0x0000; |
| CPU_IP = 0x04f8; | CPU_IP = 0x04f8; |
| CPU_DS = 0x0000; | CPU_DS = 0x0000; |
| Line 307 static void bios0x1f(void) { | Line 367 static void bios0x1f(void) { |
| UINT l; | UINT l; |
| if (CPU_AH == 0x90) { | if (CPU_AH == 0x90) { |
| i286_memstr_read(CPU_ES, CPU_BX + 0x10, work, 0x10); | MEML_READSTR(CPU_ES, CPU_BX + 0x10, work, 0x10); |
| src = work[2] + (work[3] << 8) + (work[4] << 16) + CPU_SI; | src = work[2] + (work[3] << 8) + (work[4] << 16) + CPU_SI; |
| dst = work[10] + (work[11] << 8) + (work[12] << 16) + CPU_DI; | dst = work[10] + (work[11] << 8) + (work[12] << 16) + CPU_DI; |
| leng = LOW16(CPU_CX - 1) + 1; | leng = LOW16(CPU_CX - 1) + 1; |
| Line 322 static void bios0x1f(void) { | Line 382 static void bios0x1f(void) { |
| TRACEOUT(("src:%08x dst:%08x leng:%08x", src, dst, leng)); | TRACEOUT(("src:%08x dst:%08x leng:%08x", src, dst, leng)); |
| do { | do { |
| l = min(leng, 256); | l = min(leng, 256); |
| i286_memx_read(src, work, l); | MEML_READ(src, work, l); |
| i286_memx_write(dst, work, l); | MEML_WRITE(dst, work, l); |
| src += l; | src += l; |
| dst += l; | dst += l; |
| leng -= l; | leng -= l; |
| Line 343 UINT MEMCALL biosfunc(UINT32 adrs) { | Line 403 UINT MEMCALL biosfunc(UINT32 adrs) { |
| return(0); | return(0); |
| } | } |
| #if defined(CPUCORE_IA32) && defined(TRACE) | |
| if (CPU_STAT_PAGING) { | |
| UINT32 pde = i286_memoryread_d(CPU_STAT_PDE_BASE); | |
| if (!(pde & CPU_PDE_PRESENT)) { | |
| TRACEOUT(("page0: PTE not present")); | |
| } | |
| else { | |
| UINT32 pte = i286_memoryread_d(pde & CPU_PDE_BASEADDR_MASK); | |
| if (!(pte & CPU_PTE_PRESENT)) { | |
| TRACEOUT(("page0: not present")); | |
| } | |
| else if (pte & CPU_PTE_BASEADDR_MASK) { | |
| TRACEOUT(("page0: physical address != 0 (pte = %.8x)", pte)); | |
| } | |
| } | |
| } | |
| #endif | |
| switch(adrs) { | switch(adrs) { |
| case BIOS_BASE + BIOSOFST_EOIM: | case BIOS_BASE + BIOSOFST_EOIM: |
| CPU_REMCLOCK -= 300; | CPU_REMCLOCK -= 300; |