--- np2/bios/bios.c	2004/02/29 03:10:02	1.49
+++ np2/bios/bios.c	2004/03/04 17:36:05	1.53
@@ -108,7 +108,7 @@ static void bios_reinitbyswitch(void) {
 	}
 	mem[MEMB_F2DD_MODE] = 0xff;
 
-#if defined(SUPPORT_31KHZ)
+#if defined(SUPPORT_CRT31KHZ)
 	mem[MEMB_CRT_BIOS] = 0x80;
 #endif
 #if defined(SUPPORT_PC9821)
@@ -275,7 +275,7 @@ static void bios_boot(void) {
 //		TRACEOUT(("CPU Reset... SS:SP = %.4x:%.4x", CPU_SS, CPU_SP));
 	}
 	else {
-		bios_memclear();
+//		bios_memclear();
 		bios_vectorset();
 		bios0x09_init();
 		bios_reinitbyswitch();
@@ -307,7 +307,7 @@ static void bios0x1f(void) {
 	UINT	l;
 
 	if (CPU_AH == 0x90) {
-		i286_memstr_read(CPU_ES, CPU_BX + 0x10, work, 0x10);
+		MEML_READSTR(CPU_ES, CPU_BX + 0x10, work, 0x10);
 		src = work[2] + (work[3] << 8) + (work[4] << 16) + CPU_SI;
 		dst = work[10] + (work[11] << 8) + (work[12] << 16) + CPU_DI;
 		leng = LOW16(CPU_CX - 1) + 1;
@@ -322,8 +322,8 @@ static void bios0x1f(void) {
 		TRACEOUT(("src:%08x dst:%08x leng:%08x", src, dst, leng));
 		do {
 			l = min(leng, 256);
-			i286_memx_read(src, work, l);
-			i286_memx_write(dst, work, l);
+			MEML_READ(src, work, l);
+			MEML_WRITE(dst, work, l);
 			src += l;
 			dst += l;
 			leng -= l;