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| version 1.6, 2005/02/07 14:46:07 | version 1.7, 2011/01/15 18:04:42 |
|---|---|
| Line 10 | Line 10 |
| void bios0x12(void) { | void bios0x12(void) { |
| UINT8 stat; | UINT8 status; |
| UINT8 result; | UINT8 result; |
| UINT8 *p; | UINT8 *p; |
| UINT8 drv; | UINT8 drv; |
| Line 22 void bios0x12(void) { | Line 22 void bios0x12(void) { |
| iocore_out8(0x00, 0x20); | iocore_out8(0x00, 0x20); |
| } | } |
| stat = iocore_inp8(baseport); | status = iocore_inp8(baseport); |
| while(1) { | while(1) { |
| if (!(stat & FDCSTAT_CB)) { | if (!(status & FDCSTAT_CB)) { |
| if ((stat & (FDCSTAT_RQM | FDCSTAT_DIO)) != FDCSTAT_RQM) { | if ((status & (FDCSTAT_RQM | FDCSTAT_DIO)) != FDCSTAT_RQM) { |
| break; | break; |
| } | } |
| iocore_out8(baseport+2, 0x08); | iocore_out8(baseport+2, 0x08); |
| stat = iocore_inp8(baseport); | status = iocore_inp8(baseport); |
| } | } |
| if ((stat & (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) | if ((status & (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) |
| != (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) { | != (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) { |
| break; | break; |
| } | } |
| Line 52 void bios0x12(void) { | Line 52 void bios0x12(void) { |
| } | } |
| while(1) { | while(1) { |
| *p++ = result; | *p++ = result; |
| stat = iocore_inp8(baseport); | status = iocore_inp8(baseport); |
| if ((stat & (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) | if ((status & (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) |
| != (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) { | != (FDCSTAT_RQM | FDCSTAT_DIO | FDCSTAT_CB)) { |
| break; | break; |
| } | } |