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| version 1.11, 2004/01/23 12:04:07 | version 1.12, 2004/02/07 21:23:21 |
|---|---|
| Line 30 typedef struct { | Line 30 typedef struct { |
| BYTE GBFILL; | BYTE GBFILL; |
| } UCWTBL; | } UCWTBL; |
| #if 0 | |
| typedef struct { | typedef struct { |
| BYTE raster; | UINT8 raster; |
| BYTE cfi; | UINT8 pl; |
| BYTE pl; | UINT8 bl; |
| BYTE bl; | UINT8 cl; |
| BYTE cl; | |
| BYTE ssl; | |
| BYTE padding[2]; | |
| } CRTDATA; | } CRTDATA; |
| static const CRTDATA crtdata[] = { | static const CRTDATA crtdata[4] = { |
| {0x07, 0x3b, 0x00, 0x07, 0x08, 0x00}, | {0x07, 0x00, 0x07, 0x08}, |
| {0x09, 0x4b, 0x1f, 0x08, 0x08, 0x00}, | {0x09, 0x1f, 0x08, 0x08}, |
| {0x0f, 0x7b, 0x00, 0x0f, 0x10, 0x00}, | {0x0f, 0x00, 0x0f, 0x10}, |
| {0x13, 0x9b, 0x1e, 0x11, 0x10, 0x00}}; | {0x13, 0x1e, 0x11, 0x10}}; |
| #endif | |
| typedef struct { | |
| UINT8 lr; | |
| UINT8 cfi; | |
| } CSRFORM; | |
| static const CSRFORM csrform[4] = { | |
| {0x07, 0x3b}, {0x09, 0x4b}, | |
| {0x0f, 0x7b}, {0x13, 0x9b}}; | |
| static UINT16 keyget(void) { | static UINT16 keyget(void) { |
| Line 67 static UINT16 keyget(void) { | Line 71 static UINT16 keyget(void) { |
| return(0xffff); | return(0xffff); |
| } | } |
| static void bios0x18_10(REG8 curdel) { | |
| UINT8 sts; | |
| UINT pos; | |
| sts = mem[MEMB_CRT_STS_FLAG]; | |
| mem[MEMB_CRT_STS_FLAG] = sts & (~0x40); | |
| pos = sts & 0x01; | |
| if (sts & 0x80) { | |
| pos += 2; | |
| } | |
| mem[MEMB_CRT_CNT] = (curdel << 5); | |
| gdc.m.para[GDC_CSRFORM + 0] = csrform[pos].lr; | |
| gdc.m.para[GDC_CSRFORM + 1] = curdel << 5; | |
| gdc.m.para[GDC_CSRFORM + 2] = csrform[pos].cfi; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; | |
| } | |
| void bios0x18_16(BYTE chr, BYTE atr) { | void bios0x18_16(BYTE chr, BYTE atr) { |
| UINT32 i; | UINT32 i; |
| Line 198 static void bios18_47(void) { | Line 220 static void bios18_47(void) { |
| void bios0x18(void) { | void bios0x18(void) { |
| union { | |
| BOOL b; | |
| UINT16 w; | |
| UINT32 d; | |
| const CRTDATA *crt; | |
| } tmp; | |
| UINT pos; | UINT pos; |
| BYTE buf[34]; | BYTE buf[34]; |
| BYTE *p; | BYTE *p; |
| int i; | int i; |
| UINT16 tmp; | |
| UINT32 pal; | |
| #if 0 | #if 0 |
| TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, | TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, |
| Line 236 void bios0x18(void) { | Line 263 void bios0x18(void) { |
| case 0x01: // キー・バッファ状態のセンス | case 0x01: // キー・バッファ状態のセンス |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| pos = GETBIOSMEM16(MEMW_KB_BUF_HEAD); | tmp.d = GETBIOSMEM16(MEMW_KB_BUF_HEAD); |
| CPU_AX = GETBIOSMEM16(pos); | CPU_AX = GETBIOSMEM16(tmp.d); |
| CPU_BH = 1; | CPU_BH = 1; |
| } | } |
| else { | else { |
| Line 268 void bios0x18(void) { | Line 295 void bios0x18(void) { |
| break; | break; |
| case 0x0a: // CRTモードの設定 | case 0x0a: // CRTモードの設定 |
| mem[MEMB_CRT_STS_FLAG] = 0x80 | (CPU_AL & 0x0f); | |
| // GDCバッファを空に | // GDCバッファを空に |
| if (gdc.m.cnt) { | if (gdc.m.cnt) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| gdc.mode1 &= ~(0x25); | gdc.mode1 &= ~(0x2d); |
| gdc.mode1 |= 0x08; | mem[MEMB_CRT_STS_FLAG] = CPU_AL; |
| tmp.crt = crtdata; | |
| if (!(np2cfg.dipsw[0] & 1)) { | |
| mem[MEMB_CRT_STS_FLAG] |= 0x80; | |
| gdc.mode1 |= 0x08; | |
| tmp.crt += 2; | |
| } | |
| if (CPU_AL & 0x01) { | |
| tmp.crt += 1; // 20行 | |
| } | |
| if (CPU_AL & 0x02) { | if (CPU_AL & 0x02) { |
| gdc.mode1 |= 0x04; // 40桁 | gdc.mode1 |= 0x04; // 40桁 |
| } | } |
| Line 286 void bios0x18(void) { | Line 321 void bios0x18(void) { |
| if (CPU_AL & 0x08) { | if (CPU_AL & 0x08) { |
| gdc.mode1 |= 0x20; // コードアクセス | gdc.mode1 |= 0x20; // コードアクセス |
| } | } |
| if (CPU_AL & 0x01) { // 20行 | mem[MEMB_CRT_RASTER] = tmp.crt->raster; |
| mem[MEMB_CRT_RASTER] = 0x13; | crtc.reg.pl = tmp.crt->pl; |
| gdc.m.para[GDC_CSRFORM + 0] = 0x13; | crtc.reg.bl = tmp.crt->bl; |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | crtc.reg.cl = tmp.crt->cl; |
| gdc.m.para[GDC_CSRFORM + 2] = 0x9b; | crtc.reg.ssl = 0; |
| crtc.reg.pl = 0x1e; | |
| crtc.reg.bl = 0x11; | |
| } | |
| else { // 25行 | |
| mem[MEMB_CRT_RASTER] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 0] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | |
| gdc.m.para[GDC_CSRFORM + 2] = 0x7b; | |
| crtc.reg.pl = 0x00; | |
| crtc.reg.bl = 0x0f; | |
| } | |
| crtc.reg.cl = 0x10; | |
| crtc.reg.ssl = 0x00; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | |
| gdc_restorekacmode(); | gdc_restorekacmode(); |
| bios0x18_10(0); | |
| break; | break; |
| case 0x0b: // CRTモードのセンス | case 0x0b: // CRTモードのセンス |
| Line 334 void bios0x18(void) { | Line 356 void bios0x18(void) { |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); | ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); |
| tmp = CPU_DX >> 1; | tmp.w = CPU_DX >> 1; |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL, tmp); | STOREINTELWORD(mem + MEMW_CRT_W_VRAMADR, tmp.w); |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 0, tmp.w); | |
| tmp.w = 200 << 4; | |
| if (mem[MEMB_CRT_STS_FLAG] & 0x80) { | |
| tmp.w <<= 1; | |
| } | |
| STOREINTELWORD(mem + MEMW_CRT_W_RASTER, tmp.w); | |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 2, tmp.w); | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | gdcs.textdisp |= GDCSCRN_ALLDRAW2; |
| screenupdate |= 2; | screenupdate |= 2; |
| break; | break; |
| Line 355 void bios0x18(void) { | Line 384 void bios0x18(void) { |
| t >>= 1; | t >>= 1; |
| STOREINTELWORD(p, t); | STOREINTELWORD(p, t); |
| t = i286_memword_read(CPU_BX, pos + 2); | t = i286_memword_read(CPU_BX, pos + 2); |
| if (!(mem[MEMB_CRT_STS_FLAG] & 1)) { // 25 | if (!(mem[MEMB_CRT_STS_FLAG] & 0x01)) { // 25 |
| t *= (16 * 16); | t *= (16 * 16); |
| } | } |
| else { // 20 | else { // 20 |
| t *= (20 * 16); | t *= (20 * 16); |
| } | } |
| if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { // ver0.29 | if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { |
| t >>= 1; | t >>= 1; |
| } | } |
| STOREINTELWORD(p + 2, t); | STOREINTELWORD(p + 2, t); |
| Line 379 void bios0x18(void) { | Line 408 void bios0x18(void) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| bios0x18_10((REG8)(CPU_AL & 1)); | |
| gdc.m.para[GDC_CSRFORM + 0] &= 0x7f; | |
| gdc.m.para[GDC_CSRFORM + 1] &= 0xdf; | |
| gdc.m.para[GDC_CSRFORM + 1] |= (CPU_AL & 1) << 5; | |
| gdcs.textdisp |= GDCSCRN_EXT; | |
| break; | break; |
| case 0x11: // カーソルの表示開始 | case 0x11: // カーソルの表示開始 |
| Line 419 void bios0x18(void) { | Line 444 void bios0x18(void) { |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| tmp = CPU_DX >> 1; | tmp.w = CPU_DX >> 1; |
| if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp) { | if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp.w) { |
| STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp); | STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp.w); |
| gdcs.textdisp |= GDCSCRN_EXT; | gdcs.textdisp |= GDCSCRN_EXT; |
| } | } |
| break; | break; |
| Line 431 void bios0x18(void) { | Line 456 void bios0x18(void) { |
| case 0x00: // 8x8 | case 0x00: // 8x8 |
| i286_memword_write(CPU_BX, CPU_CX, 0x0101); | i286_memword_write(CPU_BX, CPU_CX, 0x0101); |
| i286_memstr_write(CPU_BX, CPU_CX + 2, | i286_memstr_write(CPU_BX, CPU_CX + 2, |
| fontrom + 0x82000 + (CPU_DL << 3), 8); | fontrom + 0x82000 + (CPU_DL << 4), 8); |
| break; | break; |
| case 0x28: // 8x16 KANJI | case 0x28: // 8x16 KANJI |
| Line 552 void bios0x18(void) { | Line 577 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 |= 0x10; | tmp.b = TRUE; |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; | gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| break; | break; |
| Line 565 void bios0x18(void) { | Line 589 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 |= 0x10; | tmp.b = TRUE; |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| break; | break; |
| default: // ALL | default: // ALL |
| Line 576 void bios0x18(void) { | Line 599 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 80; | gdc.s.para[GDC_PITCH] = 80; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 &= ~(0x10); | tmp.b = FALSE; |
| gdc.s.para[GDC_CSRFORM] = 0; | |
| break; | break; |
| } | } |
| if ((!tmp.b) || (gdc.crt15khz)) { | |
| gdc.mode1 &= ~(0x10); | |
| gdc.s.para[GDC_CSRFORM] = 0; | |
| } | |
| else { | |
| gdc.mode1 |= 0x10; | |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| } | |
| gdcs.disp = (CPU_CH >> 4) & 1; | gdcs.disp = (CPU_CH >> 4) & 1; |
| gdcs.grphdisp |= GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_ALLDRAW2; |
| screenupdate |= 2; | screenupdate |= 2; |
| Line 588 void bios0x18(void) { | Line 618 void bios0x18(void) { |
| case 0x43: // パレットの設定 | case 0x43: // パレットの設定 |
| i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), | i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), |
| buf, 4); | buf, 4); |
| pal = LOADINTELDWORD(buf); | tmp.d = LOADINTELDWORD(buf); |
| for (i=8; i--;) { | for (i=8; i--;) { |
| gdc_setdegitalpal(i, (BYTE)(pal & 15)); | gdc_setdegitalpal(i, (REG8)(tmp.d & 15)); |
| pal >>= 4; | tmp.d >>= 4; |
| } | } |
| break; | break; |