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| version 1.11, 2004/01/23 12:04:07 | version 1.13, 2004/02/09 20:39:39 |
|---|---|
| Line 30 typedef struct { | Line 30 typedef struct { |
| BYTE GBFILL; | BYTE GBFILL; |
| } UCWTBL; | } UCWTBL; |
| #if 0 | |
| typedef struct { | typedef struct { |
| BYTE raster; | UINT8 raster; |
| BYTE cfi; | UINT8 pl; |
| BYTE pl; | UINT8 bl; |
| BYTE bl; | UINT8 cl; |
| BYTE cl; | |
| BYTE ssl; | |
| BYTE padding[2]; | |
| } CRTDATA; | } CRTDATA; |
| static const CRTDATA crtdata[] = { | static const CRTDATA crtdata[4] = { |
| {0x07, 0x3b, 0x00, 0x07, 0x08, 0x00}, | {0x07, 0x00, 0x07, 0x08}, |
| {0x09, 0x4b, 0x1f, 0x08, 0x08, 0x00}, | {0x09, 0x1f, 0x08, 0x08}, |
| {0x0f, 0x7b, 0x00, 0x0f, 0x10, 0x00}, | {0x0f, 0x00, 0x0f, 0x10}, |
| {0x13, 0x9b, 0x1e, 0x11, 0x10, 0x00}}; | {0x13, 0x1e, 0x11, 0x10}}; |
| #endif | |
| typedef struct { | |
| UINT8 lr; | |
| UINT8 cfi; | |
| } CSRFORM; | |
| static const CSRFORM csrform[4] = { | |
| {0x07, 0x3b}, {0x09, 0x4b}, | |
| {0x0f, 0x7b}, {0x13, 0x9b}}; | |
| static const UINT8 sync200l[8] = {0x02,0x26,0x03,0x11,0x86,0x0f,0xc8,0x84}; | |
| static const UINT8 sync200m[8] = {0x02,0x26,0x03,0x11,0x83,0x07,0x90,0x65}; | |
| static const UINT8 sync400m[8] = {0x02,0x4e,0x07,0x25,0x87,0x07,0x90,0x65}; | |
| static UINT16 keyget(void) { | static UINT16 keyget(void) { |
| Line 67 static UINT16 keyget(void) { | Line 75 static UINT16 keyget(void) { |
| return(0xffff); | return(0xffff); |
| } | } |
| static void bios0x18_10(REG8 curdel) { | |
| UINT8 sts; | |
| UINT pos; | |
| sts = mem[MEMB_CRT_STS_FLAG]; | |
| mem[MEMB_CRT_STS_FLAG] = sts & (~0x40); | |
| pos = sts & 0x01; | |
| if (sts & 0x80) { | |
| pos += 2; | |
| } | |
| mem[MEMB_CRT_CNT] = (curdel << 5); | |
| gdc.m.para[GDC_CSRFORM + 0] = csrform[pos].lr; | |
| gdc.m.para[GDC_CSRFORM + 1] = curdel << 5; | |
| gdc.m.para[GDC_CSRFORM + 2] = csrform[pos].cfi; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; | |
| } | |
| void bios0x18_16(BYTE chr, BYTE atr) { | void bios0x18_16(BYTE chr, BYTE atr) { |
| UINT32 i; | UINT32 i; |
| Line 83 void bios0x18_16(BYTE chr, BYTE atr) { | Line 109 void bios0x18_16(BYTE chr, BYTE atr) { |
| #define SWAPU16(a, b) { UINT16 tmp; tmp = (a); (a) = (b); (b) = tmp; } | #define SWAPU16(a, b) { UINT16 tmp; tmp = (a); (a) = (b); (b) = tmp; } |
| static REG8 swapbit(REG8 bit) { | |
| REG8 ret; | |
| ret = 0; | |
| while(bit) { | |
| ret = (ret << 1) + (bit & 1); | |
| bit >>= 1; | |
| } | |
| return(ret); | |
| } | |
| static void bios18_47(void) { | static void bios18_47(void) { |
| UCWTBL ucw; | UCWTBL ucw; |
| Line 95 static void bios18_47(void) { | Line 133 static void bios18_47(void) { |
| UINT32 csrw; | UINT32 csrw; |
| UINT16 data; | UINT16 data; |
| UINT16 GBMDOTI; | UINT16 GBMDOTI; |
| UINT8 ope; | |
| // GDCバッファを空に | // GDCバッファを空に |
| if (gdc.s.cnt) { | if (gdc.s.cnt) { |
| Line 103 static void bios18_47(void) { | Line 142 static void bios18_47(void) { |
| gdc_forceready(&gdc.s); | gdc_forceready(&gdc.s); |
| i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); | i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); |
| GBSX1 = LOADINTELWORD(ucw.GBSX1); | GBSX1 = LOADINTELWORD(ucw.GBSX1); |
| GBSY1 = LOADINTELWORD(ucw.GBSY1); | GBSY1 = LOADINTELWORD(ucw.GBSY1); |
| GBSX2 = LOADINTELWORD(ucw.GBSX2); | GBSX2 = LOADINTELWORD(ucw.GBSX2); |
| Line 162 static void bios18_47(void) { | Line 202 static void bios18_47(void) { |
| STOREINTELWORD(vect.D, data); | STOREINTELWORD(vect.D, data); |
| } | } |
| else { | else { |
| return; | func = gdcsub_null; |
| } | } |
| if ((CPU_CH & 0xc0) == 0x40) { | if ((CPU_CH & 0xc0) == 0x40) { |
| GBSY1 += 200; | GBSY1 += 200; |
| } | } |
| csrw = (GBSY1 * 40) + (GBSX1 >> 4); | csrw = (GBSY1 * 40) + (GBSX1 >> 4); |
| csrw += (GBSX1 & 0xf) << 20; | csrw += (GBSX1 & 0xf) << 20; |
| GBMDOTI = LOADINTELWORD(ucw.GBMDOTI); | GBMDOTI = (swapbit(ucw.GBMDOTI[0]) << 8) + swapbit(ucw.GBMDOTI[1]); |
| if ((CPU_CH & 0x30) == 0x30) { | if ((CPU_CH & 0x30) == 0x30) { |
| if (ucw.GBON_PTN & 1) { | ope = (ucw.GBON_PTN & 1)?GDCOPE_SET:GDCOPE_CLEAR; |
| func(0x04000 + csrw, &vect, GBMDOTI, GDCOPE_SET); | func(csrw + 0x4000, &vect, GBMDOTI, ope); |
| } | ope = (ucw.GBON_PTN & 2)?GDCOPE_SET:GDCOPE_CLEAR; |
| else { | func(csrw + 0x8000, &vect, GBMDOTI, ope); |
| func(0x04000 + csrw, &vect, GBMDOTI, GDCOPE_CLEAR); | ope = (ucw.GBON_PTN & 4)?GDCOPE_SET:GDCOPE_CLEAR; |
| } | csrw += 0xc000; |
| if (ucw.GBON_PTN & 2) { | func(csrw, &vect, GBMDOTI, ope); |
| func(0x08000 + csrw, &vect, GBMDOTI, GDCOPE_SET); | } |
| } | else { |
| else { | ope = ucw.GBDOTU & 3; |
| func(0x08000 + csrw, &vect, GBMDOTI, GDCOPE_CLEAR); | csrw += 0x4000 + ((CPU_CH & 0x30) << 10); |
| } | func(csrw, &vect, GBMDOTI, ope); |
| if (ucw.GBON_PTN & 4) { | } |
| func(0x0c000 + csrw, &vect, GBMDOTI, GDCOPE_SET); | |
| } | // 最後に使った奴を記憶 |
| else { | *(UINT16 *)(mem + MEMW_PRXGLS) = *(UINT16 *)(ucw.GBMDOTI); |
| func(0x0c000 + csrw, &vect, GBMDOTI, GDCOPE_CLEAR); | *(UINT16 *)(gdc.s.para + GDC_TEXTW) = *(UINT16 *)(ucw.GBMDOTI); |
| } | |
| gdc.s.para[GDC_WRITE] = ope; | |
| mem[MEMB_PRXDUPD] &= ~3; | |
| mem[MEMB_PRXDUPD] |= ope; | |
| } | |
| static void bios18_49(void) { | |
| UCWTBL ucw; | |
| UINT i; | |
| BYTE pat[8]; | |
| UINT16 tmp; | |
| GDCVECT vect; | |
| UINT16 GBSX1; | |
| UINT16 GBSY1; | |
| UINT32 csrw; | |
| UINT8 ope; | |
| // GDCバッファを空に | |
| if (gdc.s.cnt) { | |
| gdc_work(GDCWORK_SLAVE); | |
| } | |
| gdc_forceready(&gdc.s); | |
| i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); | |
| for (i=0; i<8; i++) { | |
| mem[MEMW_PRXGLS + i] = ucw.GBMDOTI[i]; | |
| pat[i] = swapbit(ucw.GBMDOTI[i]); | |
| gdc.s.para[GDC_TEXTW + i] = pat[i]; | |
| } | |
| vect.ope = 0x10 + (ucw.GBDSP & 7); | |
| if (*(UINT16 *)ucw.GBLNG1) { | |
| tmp = (LOADINTELWORD(ucw.GBLNG2) - 1) & 0x3fff; | |
| STOREINTELWORD(vect.DC, tmp); | |
| vect.D[0] = ucw.GBLNG1[0]; | |
| vect.D[1] = ucw.GBLNG1[1]; | |
| } | |
| else { | |
| STOREINTELWORD(vect.DC, 7); | |
| vect.D[0] = gdc.s.para[GDC_VECTW + 3]; | |
| vect.D[1] = gdc.s.para[GDC_VECTW + 4]; | |
| } | |
| GBSX1 = LOADINTELWORD(ucw.GBSX1); | |
| GBSY1 = LOADINTELWORD(ucw.GBSY1); | |
| if ((CPU_CH & 0xc0) == 0x40) { | |
| GBSY1 += 200; | |
| } | |
| csrw = (GBSY1 * 40) + (GBSX1 >> 4); | |
| csrw += (GBSX1 & 0xf) << 20; | |
| if ((CPU_CH & 0x30) == 0x30) { | |
| ope = (ucw.GBON_PTN & 1)?GDCOPE_SET:GDCOPE_CLEAR; | |
| gdcsub_text(csrw + 0x4000, &vect, pat, ope); | |
| ope = (ucw.GBON_PTN & 2)?GDCOPE_SET:GDCOPE_CLEAR; | |
| gdcsub_text(csrw + 0x8000, &vect, pat, ope); | |
| ope = (ucw.GBON_PTN & 4)?GDCOPE_SET:GDCOPE_CLEAR; | |
| csrw += 0xc000; | |
| gdcsub_text(csrw, &vect, pat, ope); | |
| } | } |
| else { | else { |
| func(csrw + 0x4000 + ((CPU_CH & 0x30) << 10), &vect, | ope = ucw.GBDOTU & 3; |
| GBMDOTI, ucw.GBDOTU); | csrw += 0x4000 + ((CPU_CH & 0x30) << 10); |
| gdcsub_text(csrw, &vect, pat, ope); | |
| } | } |
| // 最後に使った奴を記憶 | |
| gdc.s.para[GDC_WRITE] = ope; | |
| mem[MEMB_PRXDUPD] &= ~3; | |
| mem[MEMB_PRXDUPD] |= ope; | |
| } | } |
| // ---- | |
| void bios0x18(void) { | void bios0x18(void) { |
| union { | |
| BOOL b; | |
| UINT16 w; | |
| UINT32 d; | |
| const CRTDATA *crt; | |
| } tmp; | |
| UINT pos; | UINT pos; |
| BYTE buf[34]; | BYTE buf[34]; |
| BYTE *p; | BYTE *p; |
| int i; | int i; |
| UINT16 tmp; | |
| UINT32 pal; | |
| #if 0 | #if 0 |
| TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, | TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, |
| Line 236 void bios0x18(void) { | Line 347 void bios0x18(void) { |
| case 0x01: // キー・バッファ状態のセンス | case 0x01: // キー・バッファ状態のセンス |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| pos = GETBIOSMEM16(MEMW_KB_BUF_HEAD); | tmp.d = GETBIOSMEM16(MEMW_KB_BUF_HEAD); |
| CPU_AX = GETBIOSMEM16(pos); | CPU_AX = GETBIOSMEM16(tmp.d); |
| CPU_BH = 1; | CPU_BH = 1; |
| } | } |
| else { | else { |
| Line 268 void bios0x18(void) { | Line 379 void bios0x18(void) { |
| break; | break; |
| case 0x0a: // CRTモードの設定 | case 0x0a: // CRTモードの設定 |
| mem[MEMB_CRT_STS_FLAG] = 0x80 | (CPU_AL & 0x0f); | |
| // GDCバッファを空に | // GDCバッファを空に |
| if (gdc.m.cnt) { | if (gdc.m.cnt) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| gdc.mode1 &= ~(0x25); | gdc.mode1 &= ~(0x2d); |
| gdc.mode1 |= 0x08; | mem[MEMB_CRT_STS_FLAG] = CPU_AL; |
| tmp.crt = crtdata; | |
| if (!(np2cfg.dipsw[0] & 1)) { | |
| mem[MEMB_CRT_STS_FLAG] |= 0x80; | |
| gdc.mode1 |= 0x08; | |
| tmp.crt += 2; | |
| } | |
| if (CPU_AL & 0x01) { | |
| tmp.crt += 1; // 20行 | |
| } | |
| if (CPU_AL & 0x02) { | if (CPU_AL & 0x02) { |
| gdc.mode1 |= 0x04; // 40桁 | gdc.mode1 |= 0x04; // 40桁 |
| } | } |
| Line 286 void bios0x18(void) { | Line 405 void bios0x18(void) { |
| if (CPU_AL & 0x08) { | if (CPU_AL & 0x08) { |
| gdc.mode1 |= 0x20; // コードアクセス | gdc.mode1 |= 0x20; // コードアクセス |
| } | } |
| if (CPU_AL & 0x01) { // 20行 | mem[MEMB_CRT_RASTER] = tmp.crt->raster; |
| mem[MEMB_CRT_RASTER] = 0x13; | crtc.reg.pl = tmp.crt->pl; |
| gdc.m.para[GDC_CSRFORM + 0] = 0x13; | crtc.reg.bl = tmp.crt->bl; |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | crtc.reg.cl = tmp.crt->cl; |
| gdc.m.para[GDC_CSRFORM + 2] = 0x9b; | crtc.reg.ssl = 0; |
| crtc.reg.pl = 0x1e; | |
| crtc.reg.bl = 0x11; | |
| } | |
| else { // 25行 | |
| mem[MEMB_CRT_RASTER] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 0] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | |
| gdc.m.para[GDC_CSRFORM + 2] = 0x7b; | |
| crtc.reg.pl = 0x00; | |
| crtc.reg.bl = 0x0f; | |
| } | |
| crtc.reg.cl = 0x10; | |
| crtc.reg.ssl = 0x00; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | |
| gdc_restorekacmode(); | gdc_restorekacmode(); |
| bios0x18_10(0); | |
| break; | break; |
| case 0x0b: // CRTモードのセンス | case 0x0b: // CRTモードのセンス |
| Line 334 void bios0x18(void) { | Line 440 void bios0x18(void) { |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); | ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); |
| tmp = CPU_DX >> 1; | tmp.w = CPU_DX >> 1; |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL, tmp); | SETBIOSMEM16(MEMW_CRT_W_VRAMADR, tmp.w); |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 0, tmp.w); | |
| tmp.w = 200 << 4; | |
| if (mem[MEMB_CRT_STS_FLAG] & 0x80) { | |
| tmp.w <<= 1; | |
| } | |
| SETBIOSMEM16(MEMW_CRT_W_RASTER, tmp.w); | |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 2, tmp.w); | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | gdcs.textdisp |= GDCSCRN_ALLDRAW2; |
| screenupdate |= 2; | screenupdate |= 2; |
| break; | break; |
| Line 355 void bios0x18(void) { | Line 468 void bios0x18(void) { |
| t >>= 1; | t >>= 1; |
| STOREINTELWORD(p, t); | STOREINTELWORD(p, t); |
| t = i286_memword_read(CPU_BX, pos + 2); | t = i286_memword_read(CPU_BX, pos + 2); |
| if (!(mem[MEMB_CRT_STS_FLAG] & 1)) { // 25 | if (!(mem[MEMB_CRT_STS_FLAG] & 0x01)) { // 25 |
| t *= (16 * 16); | t *= (16 * 16); |
| } | } |
| else { // 20 | else { // 20 |
| t *= (20 * 16); | t *= (20 * 16); |
| } | } |
| if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { // ver0.29 | if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { |
| t >>= 1; | t >>= 1; |
| } | } |
| STOREINTELWORD(p + 2, t); | STOREINTELWORD(p + 2, t); |
| Line 379 void bios0x18(void) { | Line 492 void bios0x18(void) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| bios0x18_10((REG8)(CPU_AL & 1)); | |
| gdc.m.para[GDC_CSRFORM + 0] &= 0x7f; | |
| gdc.m.para[GDC_CSRFORM + 1] &= 0xdf; | |
| gdc.m.para[GDC_CSRFORM + 1] |= (CPU_AL & 1) << 5; | |
| gdcs.textdisp |= GDCSCRN_EXT; | |
| break; | break; |
| case 0x11: // カーソルの表示開始 | case 0x11: // カーソルの表示開始 |
| Line 419 void bios0x18(void) { | Line 528 void bios0x18(void) { |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| tmp = CPU_DX >> 1; | tmp.w = CPU_DX >> 1; |
| if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp) { | if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp.w) { |
| STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp); | STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp.w); |
| gdcs.textdisp |= GDCSCRN_EXT; | gdcs.textdisp |= GDCSCRN_EXT; |
| } | } |
| break; | break; |
| Line 431 void bios0x18(void) { | Line 540 void bios0x18(void) { |
| case 0x00: // 8x8 | case 0x00: // 8x8 |
| i286_memword_write(CPU_BX, CPU_CX, 0x0101); | i286_memword_write(CPU_BX, CPU_CX, 0x0101); |
| i286_memstr_write(CPU_BX, CPU_CX + 2, | i286_memstr_write(CPU_BX, CPU_CX + 2, |
| fontrom + 0x82000 + (CPU_DL << 3), 8); | fontrom + 0x82000 + (CPU_DL << 4), 8); |
| break; | break; |
| case 0x28: // 8x16 KANJI | case 0x28: // 8x16 KANJI |
| Line 544 void bios0x18(void) { | Line 653 void bios0x18(void) { |
| gdc_forceready(&gdc.s); | gdc_forceready(&gdc.s); |
| ZeroMemory(&gdc.s.para[GDC_SCROLL], 8); | ZeroMemory(&gdc.s.para[GDC_SCROLL], 8); |
| switch(CPU_CH & 0xc0) { | if ((CPU_CH & 0xc0) == 0xc0) { // ALL |
| case 0x40: // UPPER | tmp.b = FALSE; |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { | if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { |
| mem[MEMB_PRXDUPD] ^= 4; | mem[MEMB_PRXDUPD] ^= 4; |
| gdc.clock &= ~3; | gdc.clock |= 3; |
| gdc.s.para[GDC_PITCH] = 40; | CopyMemory(gdc.s.para + GDC_SYNC, sync400m, 8); |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdc.s.para[GDC_PITCH] = 80; |
| } | gdcs.grphdisp |= GDCSCRN_EXT; |
| gdc.mode1 |= 0x10; | mem[MEMB_PRXDUPD] |= 0x08; |
| gdc.s.para[GDC_CSRFORM] = 1; | } |
| } | |
| else { | |
| tmp.b = TRUE; | |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { | |
| mem[MEMB_PRXDUPD] ^= 4; | |
| gdc.clock &= ~3; | |
| CopyMemory(gdc.s.para + GDC_SYNC, | |
| (mem[MEMB_PRXCRT] & 0x40)?sync200m:sync200l, 8); | |
| gdc.s.para[GDC_PITCH] = 40; | |
| gdcs.grphdisp |= GDCSCRN_EXT; | |
| mem[MEMB_PRXDUPD] |= 0x08; | |
| } | |
| if (CPU_CH & 0x40) { // UPPER | |
| gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; | gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| break; | } |
| } | |
| case 0x80: // LOWER | if ((!tmp.b) || (!(mem[MEMB_PRXCRT] & 0x40))) { |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { | gdc.mode1 &= ~(0x10); |
| mem[MEMB_PRXDUPD] ^= 4; | gdc.s.para[GDC_CSRFORM] = 0; |
| gdc.clock &= ~3; | } |
| gdc.s.para[GDC_PITCH] = 40; | else { |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdc.mode1 |= 0x10; |
| } | gdc.s.para[GDC_CSRFORM] = 1; |
| gdc.mode1 |= 0x10; | |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| break; | |
| default: // ALL | |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { | |
| mem[MEMB_PRXDUPD] ^= 4; | |
| gdc.clock |= 3; | |
| gdc.s.para[GDC_PITCH] = 80; | |
| gdcs.grphdisp |= GDCSCRN_EXT; | |
| } | |
| gdc.mode1 &= ~(0x10); | |
| gdc.s.para[GDC_CSRFORM] = 0; | |
| break; | |
| } | } |
| gdcs.disp = (CPU_CH >> 4) & 1; | gdcs.disp = (CPU_CH >> 4) & 1; |
| gdcs.grphdisp |= GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_ALLDRAW2; |
| Line 588 void bios0x18(void) { | Line 696 void bios0x18(void) { |
| case 0x43: // パレットの設定 | case 0x43: // パレットの設定 |
| i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), | i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), |
| buf, 4); | buf, 4); |
| pal = LOADINTELDWORD(buf); | tmp.d = LOADINTELDWORD(buf); |
| for (i=8; i--;) { | for (i=8; i--;) { |
| gdc_setdegitalpal(i, (BYTE)(pal & 15)); | gdc_setdegitalpal(i, (REG8)(tmp.d & 15)); |
| pal >>= 4; | tmp.d >>= 4; |
| } | } |
| break; | break; |
| case 0x44: // ボーダカラー | |
| // if (!(mem[MEMB_PRXCRT] & 0x40)) { | |
| // color = i286_membyte_read(CPU_DS, CPU_BX + 1); | |
| // } | |
| break; | |
| case 0x47: // 直線、矩形の描画 | case 0x47: // 直線、矩形の描画 |
| case 0x48: | |
| bios18_47(); | bios18_47(); |
| break; | break; |
| case 0x49: // | |
| bios18_49(); | |
| break; | |
| case 0x4a: // | |
| if (!(mem[MEMB_PRXCRT] & 0x01)) { | |
| gdc.s.para[GDC_SYNC] = CPU_CH; | |
| gdcs.grphdisp |= GDCSCRN_EXT; | |
| if (CPU_CH & 0x10) { | |
| mem[MEMB_PRXDUPD] &= ~0x08; | |
| } | |
| else { | |
| mem[MEMB_PRXDUPD] |= 0x08; | |
| } | |
| } | |
| break; | |
| } | } |
| } | } |