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| version 1.2, 2003/10/19 14:56:15 | version 1.12, 2004/02/07 21:23:21 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "i286.h" | #include "cpucore.h" |
| #include "memory.h" | |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "font.h" | |
| #include "bios.h" | #include "bios.h" |
| #include "biosmem.h" | #include "biosmem.h" |
| #include "font.h" | |
| static int sti_waiting = 0; | static int sti_waiting = 0; |
| Line 31 typedef struct { | Line 30 typedef struct { |
| BYTE GBFILL; | BYTE GBFILL; |
| } UCWTBL; | } UCWTBL; |
| #if 0 | |
| typedef struct { | typedef struct { |
| BYTE raster; | UINT8 raster; |
| BYTE cfi; | UINT8 pl; |
| BYTE pl; | UINT8 bl; |
| BYTE bl; | UINT8 cl; |
| BYTE cl; | |
| BYTE ssl; | |
| BYTE padding[2]; | |
| } CRTDATA; | } CRTDATA; |
| static const CRTDATA crtdata[] = { | static const CRTDATA crtdata[4] = { |
| {0x07, 0x3b, 0x00, 0x07, 0x08, 0x00}, | {0x07, 0x00, 0x07, 0x08}, |
| {0x09, 0x4b, 0x1f, 0x08, 0x08, 0x00}, | {0x09, 0x1f, 0x08, 0x08}, |
| {0x0f, 0x7b, 0x00, 0x0f, 0x10, 0x00}, | {0x0f, 0x00, 0x0f, 0x10}, |
| {0x13, 0x9b, 0x1e, 0x11, 0x10, 0x00}}; | {0x13, 0x1e, 0x11, 0x10}}; |
| #endif | |
| typedef struct { | |
| UINT8 lr; | |
| UINT8 cfi; | |
| } CSRFORM; | |
| static const CSRFORM csrform[4] = { | |
| {0x07, 0x3b}, {0x09, 0x4b}, | |
| {0x0f, 0x7b}, {0x13, 0x9b}}; | |
| static UINT16 keyget(void) { | static UINT16 keyget(void) { |
| Line 68 static UINT16 keyget(void) { | Line 71 static UINT16 keyget(void) { |
| return(0xffff); | return(0xffff); |
| } | } |
| static void bios0x18_10(REG8 curdel) { | |
| UINT8 sts; | |
| UINT pos; | |
| sts = mem[MEMB_CRT_STS_FLAG]; | |
| mem[MEMB_CRT_STS_FLAG] = sts & (~0x40); | |
| pos = sts & 0x01; | |
| if (sts & 0x80) { | |
| pos += 2; | |
| } | |
| mem[MEMB_CRT_CNT] = (curdel << 5); | |
| gdc.m.para[GDC_CSRFORM + 0] = csrform[pos].lr; | |
| gdc.m.para[GDC_CSRFORM + 1] = curdel << 5; | |
| gdc.m.para[GDC_CSRFORM + 2] = csrform[pos].cfi; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; | |
| } | |
| void bios0x18_16(BYTE chr, BYTE atr) { | void bios0x18_16(BYTE chr, BYTE atr) { |
| UINT32 i; | UINT32 i; |
| Line 103 static void bios18_47(void) { | Line 124 static void bios18_47(void) { |
| } | } |
| gdc_forceready(&gdc.s); | gdc_forceready(&gdc.s); |
| i286_memstr_read(I286_DS, I286_BX, &ucw, sizeof(ucw)); | i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); |
| GBSX1 = LOADINTELWORD(ucw.GBSX1); | GBSX1 = LOADINTELWORD(ucw.GBSX1); |
| GBSY1 = LOADINTELWORD(ucw.GBSY1); | GBSY1 = LOADINTELWORD(ucw.GBSY1); |
| GBSX2 = LOADINTELWORD(ucw.GBSX2); | GBSX2 = LOADINTELWORD(ucw.GBSX2); |
| Line 165 static void bios18_47(void) { | Line 186 static void bios18_47(void) { |
| else { | else { |
| return; | return; |
| } | } |
| if ((I286_CH & 0xc0) == 0x40) { | if ((CPU_CH & 0xc0) == 0x40) { |
| GBSY1 += 200; | GBSY1 += 200; |
| } | } |
| csrw = (GBSY1 * 40) + (GBSX1 >> 4); | csrw = (GBSY1 * 40) + (GBSX1 >> 4); |
| csrw += (GBSX1 & 0xf) << 20; | csrw += (GBSX1 & 0xf) << 20; |
| GBMDOTI = LOADINTELWORD(ucw.GBMDOTI); | GBMDOTI = LOADINTELWORD(ucw.GBMDOTI); |
| if ((I286_CH & 0x30) == 0x30) { | if ((CPU_CH & 0x30) == 0x30) { |
| if (ucw.GBON_PTN & 1) { | if (ucw.GBON_PTN & 1) { |
| func(0x04000 + csrw, &vect, GBMDOTI, GDCOPE_SET); | func(0x04000 + csrw, &vect, GBMDOTI, GDCOPE_SET); |
| } | } |
| Line 192 static void bios18_47(void) { | Line 213 static void bios18_47(void) { |
| } | } |
| } | } |
| else { | else { |
| func(csrw + 0x4000 + ((I286_CH & 0x30) << 10), &vect, | func(csrw + 0x4000 + ((CPU_CH & 0x30) << 10), &vect, |
| GBMDOTI, ucw.GBDOTU); | GBMDOTI, ucw.GBDOTU); |
| } | } |
| } | } |
| void bios0x18(void) { | void bios0x18(void) { |
| union { | |
| BOOL b; | |
| UINT16 w; | |
| UINT32 d; | |
| const CRTDATA *crt; | |
| } tmp; | |
| UINT pos; | UINT pos; |
| BYTE buf[34]; | BYTE buf[34]; |
| BYTE *p; | BYTE *p; |
| int i; | int i; |
| UINT16 tmp; | |
| UINT32 pal; | |
| // TRACE_("int18", I286_AH); | #if 0 |
| TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, | |
| i286_memword_read(CPU_SS, CPU_SP+2), | |
| i286_memword_read(CPU_SS, CPU_SP))); | |
| #endif | |
| sti_waiting ^= 1; | sti_waiting ^= 1; |
| if (!sti_waiting) { // 割込み許可の遊び | if (sti_waiting) { // 割込み許可の遊び |
| I286_IP--; | CPU_STI; |
| I286_STI; | if (PICEXISTINTR) { |
| nevent_forceexit(); | CPU_IP--; |
| return; | nevent_forceexit(); |
| return; | |
| } | |
| } | } |
| sti_waiting = 0; | |
| switch(I286_AH) { | switch(CPU_AH) { |
| case 0x00: // キー・データの読みだし | case 0x00: // キー・データの読みだし |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| I286_AX = keyget(); | CPU_AX = keyget(); |
| } | } |
| else { | else { |
| I286_IP--; | CPU_IP--; |
| I286_REMCLOCK = -1; | CPU_REMCLOCK = -1; |
| break; | break; |
| } | } |
| break; | break; |
| case 0x01: // キー・バッファ状態のセンス | case 0x01: // キー・バッファ状態のセンス |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| pos = GETBIOSMEM16(MEMW_KB_BUF_HEAD); | tmp.d = GETBIOSMEM16(MEMW_KB_BUF_HEAD); |
| I286_AX = GETBIOSMEM16(pos); | CPU_AX = GETBIOSMEM16(tmp.d); |
| I286_BH = 1; | CPU_BH = 1; |
| } | } |
| else { | else { |
| I286_BH = 0; | CPU_BH = 0; |
| } | } |
| break; | break; |
| case 0x02: // シフト・キー状態のセンス | case 0x02: // シフト・キー状態のセンス |
| I286_AL = mem[MEMB_SHIFT_STS]; | CPU_AL = mem[MEMB_SHIFT_STS]; |
| break; | break; |
| case 0x03: // キーボード・インタフェイスの初期化 | case 0x03: // キーボード・インタフェイスの初期化 |
| Line 248 void bios0x18(void) { | Line 281 void bios0x18(void) { |
| break; | break; |
| case 0x04: // キー入力状態のセンス | case 0x04: // キー入力状態のセンス |
| I286_AH = mem[0x00052a + (I286_AL & 0x0f)]; | CPU_AH = mem[0x00052a + (CPU_AL & 0x0f)]; |
| break; | break; |
| case 0x05: // キー入力センス | case 0x05: // キー入力センス |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| I286_AX = keyget(); | CPU_AX = keyget(); |
| I286_BH = 1; | CPU_BH = 1; |
| } | } |
| else { | else { |
| I286_BH = 0; | CPU_BH = 0; |
| } | } |
| break; | break; |
| case 0x0a: // CRTモードの設定 | case 0x0a: // CRTモードの設定 |
| #if 1 | |
| mem[MEMB_CRT_STS_FLAG] = 0x80 | (I286_AL & 0x0f); | |
| // GDCバッファを空に | // GDCバッファを空に |
| if (gdc.m.cnt) { | if (gdc.m.cnt) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| gdc.mode1 &= ~(0x25); | gdc.mode1 &= ~(0x2d); |
| gdc.mode1 |= 0x08; | mem[MEMB_CRT_STS_FLAG] = CPU_AL; |
| if (I286_AL & 0x02) { | tmp.crt = crtdata; |
| if (!(np2cfg.dipsw[0] & 1)) { | |
| mem[MEMB_CRT_STS_FLAG] |= 0x80; | |
| gdc.mode1 |= 0x08; | |
| tmp.crt += 2; | |
| } | |
| if (CPU_AL & 0x01) { | |
| tmp.crt += 1; // 20行 | |
| } | |
| if (CPU_AL & 0x02) { | |
| gdc.mode1 |= 0x04; // 40桁 | gdc.mode1 |= 0x04; // 40桁 |
| } | } |
| if (I286_AL & 0x04) { | if (CPU_AL & 0x04) { |
| gdc.mode1 |= 0x01; // アトリビュート | gdc.mode1 |= 0x01; // アトリビュート |
| } | } |
| if (I286_AL & 0x08) { | if (CPU_AL & 0x08) { |
| gdc.mode1 |= 0x20; // コードアクセス | gdc.mode1 |= 0x20; // コードアクセス |
| } | } |
| if (I286_AL & 0x01) { // 20行 | mem[MEMB_CRT_RASTER] = tmp.crt->raster; |
| mem[MEMB_CRT_RASTER] = 0x13; | crtc.reg.pl = tmp.crt->pl; |
| gdc.m.para[GDC_CSRFORM + 0] = 0x13; | crtc.reg.bl = tmp.crt->bl; |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | crtc.reg.cl = tmp.crt->cl; |
| gdc.m.para[GDC_CSRFORM + 2] = 0x9b; | crtc.reg.ssl = 0; |
| crtc.reg.pl = 0x1e; | |
| crtc.reg.bl = 0x11; | |
| } | |
| else { // 25行 | |
| mem[MEMB_CRT_RASTER] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 0] = 0x0f; | |
| gdc.m.para[GDC_CSRFORM + 1] = 0x00; | |
| gdc.m.para[GDC_CSRFORM + 2] = 0x7b; | |
| crtc.reg.pl = 0x00; | |
| crtc.reg.bl = 0x0f; | |
| } | |
| crtc.reg.cl = 0x10; | |
| crtc.reg.ssl = 0x00; | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | |
| gdc_restorekacmode(); | gdc_restorekacmode(); |
| bios0x18_10(0); | |
| break; | break; |
| #else | |
| // GDCバッファを空に | |
| if (gdc.m.cnt) { | |
| gdc_work(GDCWORK_MASTER); | |
| } | |
| gdc_forceready(&gdc.m); | |
| mem[MEMB_CRT_STS_FLAG] = I286_AL; | |
| if (systemport_r(0x33) & 0x08) { | |
| mem[MEMB_CRT_STS_FLAG] |= 0x80; | |
| } | |
| #endif | |
| case 0x0b: // CRTモードのセンス | case 0x0b: // CRTモードのセンス |
| I286_AL = mem[MEMB_CRT_STS_FLAG]; | CPU_AL = mem[MEMB_CRT_STS_FLAG]; |
| break; | break; |
| case 0x0c: // テキスト画面の表示開始 | case 0x0c: // テキスト画面の表示開始 |
| Line 341 void bios0x18(void) { | Line 356 void bios0x18(void) { |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); | ZeroMemory(&gdc.m.para[GDC_SCROLL], 16); |
| tmp = I286_DX >> 1; | tmp.w = CPU_DX >> 1; |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL, tmp); | STOREINTELWORD(mem + MEMW_CRT_W_VRAMADR, tmp.w); |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 0, tmp.w); | |
| tmp.w = 200 << 4; | |
| if (mem[MEMB_CRT_STS_FLAG] & 0x80) { | |
| tmp.w <<= 1; | |
| } | |
| STOREINTELWORD(mem + MEMW_CRT_W_RASTER, tmp.w); | |
| STOREINTELWORD(gdc.m.para + GDC_SCROLL + 2, tmp.w); | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW2; | gdcs.textdisp |= GDCSCRN_ALLDRAW2; |
| screenupdate |= 2; | screenupdate |= 2; |
| break; | break; |
| case 0x0f: // 複数の表示領域の設定 | case 0x0f: // 複数の表示領域の設定 |
| SETBIOSMEM16(0x0053e, I286_CX); | SETBIOSMEM16(0x0053e, CPU_CX); |
| SETBIOSMEM16(0x00540, I286_BX); | SETBIOSMEM16(0x00540, CPU_BX); |
| mem[0x00547] = I286_DH; | mem[0x00547] = CPU_DH; |
| mem[0x0053D] = I286_DL; | mem[0x0053D] = CPU_DL; |
| // wait sync int | // wait sync int |
| if ((i = I286_DL) > 0) { | if ((i = CPU_DL) > 0) { |
| pos = I286_CX; | pos = CPU_CX; |
| p = gdc.m.para + GDC_SCROLL + (I286_DH << 2); | p = gdc.m.para + GDC_SCROLL + (CPU_DH << 2); |
| while((i--) && (p < (gdc.m.para + GDC_SCROLL + 0x10))) { | while((i--) && (p < (gdc.m.para + GDC_SCROLL + 0x10))) { |
| tmp = i286_memword_read(I286_BX, pos); | REG16 t; |
| tmp >>= 1; | t = i286_memword_read(CPU_BX, pos); |
| STOREINTELWORD(p, tmp); | t >>= 1; |
| tmp = i286_memword_read(I286_BX, pos + 2); | STOREINTELWORD(p, t); |
| if (!(mem[MEMB_CRT_STS_FLAG] & 1)) { // 25 | t = i286_memword_read(CPU_BX, pos + 2); |
| tmp *= (16 * 16); | if (!(mem[MEMB_CRT_STS_FLAG] & 0x01)) { // 25 |
| t *= (16 * 16); | |
| } | } |
| else { // 20 | else { // 20 |
| tmp *= (20 * 16); | t *= (20 * 16); |
| } | } |
| if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { // ver0.29 | if (!(mem[MEMB_CRT_STS_FLAG] & 0x80)) { |
| tmp >>= 1; | t >>= 1; |
| } | } |
| STOREINTELWORD(p + 2, tmp); | STOREINTELWORD(p + 2, t); |
| pos += 4; | pos += 4; |
| p += 4; | p += 4; |
| } | } |
| Line 385 void bios0x18(void) { | Line 408 void bios0x18(void) { |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| bios0x18_10((REG8)(CPU_AL & 1)); | |
| gdc.m.para[GDC_CSRFORM + 0] &= 0x7f; | |
| gdc.m.para[GDC_CSRFORM + 1] &= 0xdf; | |
| gdc.m.para[GDC_CSRFORM + 1] |= (I286_AL & 1) << 5; | |
| gdcs.textdisp |= GDCSCRN_EXT; | |
| break; | break; |
| case 0x11: // カーソルの表示開始 | case 0x11: // カーソルの表示開始 |
| Line 425 void bios0x18(void) { | Line 444 void bios0x18(void) { |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| tmp = I286_DX >> 1; | tmp.w = CPU_DX >> 1; |
| if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp) { | if (LOADINTELWORD(gdc.m.para + GDC_CSRW) != tmp.w) { |
| STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp); | STOREINTELWORD(gdc.m.para + GDC_CSRW, tmp.w); |
| gdcs.textdisp |= GDCSCRN_EXT; | gdcs.textdisp |= GDCSCRN_EXT; |
| } | } |
| break; | break; |
| case 0x14: // フォントパターンの読み出し | case 0x14: // フォントパターンの読み出し |
| switch(I286_DH) { | switch(CPU_DH) { |
| case 0x00: // 8x8 | case 0x00: // 8x8 |
| i286_memword_write(I286_BX, I286_CX, 0x0101); | i286_memword_write(CPU_BX, CPU_CX, 0x0101); |
| i286_memstr_write(I286_BX, I286_CX+2, | i286_memstr_write(CPU_BX, CPU_CX + 2, |
| &font[0x82000 + (I286_DL << 3)], 8); | fontrom + 0x82000 + (CPU_DL << 4), 8); |
| break; | break; |
| case 0x28: // 8x16 KANJI | case 0x28: // 8x16 KANJI |
| case 0x29: | case 0x29: |
| case 0x2a: | case 0x2a: |
| case 0x2b: | case 0x2b: |
| i286_memword_write(I286_BX, I286_CX, 0x0102); | i286_memword_write(CPU_BX, CPU_CX, 0x0102); |
| i286_memstr_write(I286_BX, I286_CX+2, | i286_memstr_write(CPU_BX, CPU_CX + 2, |
| &font[((I286_DL & 0x7f) << 12) | fontrom + ((CPU_DL & 0x7f) << 12) |
| + ((I286_DH - 0x20) << 4)], 16); | + ((CPU_DH - 0x20) << 4), 16); |
| break; | break; |
| case 0x80: // 8x16 ANK | case 0x80: // 8x16 ANK |
| i286_memword_write(I286_BX, I286_CX, 0x0102); | i286_memword_write(CPU_BX, CPU_CX, 0x0102); |
| i286_memstr_write(I286_BX, I286_CX+2, | i286_memstr_write(CPU_BX, CPU_CX + 2, |
| &font[0x80000 + (I286_DL << 4)], 16); | fontrom + 0x80000 + (CPU_DL << 4), 16); |
| break; | break; |
| default: | default: |
| buf[0] = 0x02; | buf[0] = 0x02; |
| buf[1] = 0x02; | buf[1] = 0x02; |
| p = &font[((I286_DL & 0x7f) << 12) | p = fontrom + ((CPU_DL & 0x7f) << 12) |
| + (((I286_DH - 0x20) & 0x7f) << 4)]; | + (((CPU_DH - 0x20) & 0x7f) << 4); |
| for (i=1; i<17; i++, p++) { | for (i=1; i<17; i++, p++) { |
| buf[i*2+0] = *p; | buf[i*2+0] = *p; |
| buf[i*2+1] = *(p+0x800); | buf[i*2+1] = *(p+0x800); |
| } | } |
| i286_memstr_write(I286_BX, I286_CX, buf, 34); | i286_memstr_write(CPU_BX, CPU_CX, buf, 34); |
| break; | break; |
| } | } |
| break; | break; |
| Line 474 void bios0x18(void) { | Line 493 void bios0x18(void) { |
| break; | break; |
| case 0x16: // テキストVRAMの初期化 | case 0x16: // テキストVRAMの初期化 |
| bios0x18_16(I286_DL, I286_DH); | bios0x18_16(CPU_DL, CPU_DH); |
| break; | break; |
| case 0x17: // ブザーの起呼 | case 0x17: // ブザーの起呼 |
| Line 489 void bios0x18(void) { | Line 508 void bios0x18(void) { |
| break; | break; |
| case 0x1a: // ユーザー文字の定義 | case 0x1a: // ユーザー文字の定義 |
| if ((I286_DH & 0x7e) == 0x76) { | if ((CPU_DH & 0x7e) == 0x76) { |
| i286_memstr_read(I286_BX, I286_CX+2, buf, 32); | i286_memstr_read(CPU_BX, CPU_CX + 2, buf, 32); |
| p = &font[((I286_DL & 0x7f) << 12) | p = fontrom + ((CPU_DL & 0x7f) << 12) |
| + (((I286_DH - 0x20) & 0x7f) << 4)]; | + (((CPU_DH - 0x20) & 0x7f) << 4); |
| for (i=0; i<16; i++, p++) { | for (i=0; i<16; i++, p++) { |
| *p = buf[i*2+0]; | *p = buf[i*2+0]; |
| *(p+0x800) = buf[i*2+1]; | *(p+0x800) = buf[i*2+1]; |
| Line 502 void bios0x18(void) { | Line 521 void bios0x18(void) { |
| break; | break; |
| case 0x1b: // KCGアクセスモードの設定 | case 0x1b: // KCGアクセスモードの設定 |
| switch(I286_AL) { // 実装し忘れ // ver0.28 | switch(CPU_AL) { |
| case 0: | case 0: |
| mem[MEMB_CRT_STS_FLAG] &= ~0x08; | mem[MEMB_CRT_STS_FLAG] &= ~0x08; |
| gdc.mode1 &= ~0x20; | gdc.mode1 &= ~0x20; |
| Line 518 void bios0x18(void) { | Line 537 void bios0x18(void) { |
| break; | break; |
| case 0x40: // グラフィック画面の表示開始 | case 0x40: // グラフィック画面の表示開始 |
| // GDCバッファを空に | |
| if (gdc.s.cnt) { | |
| gdc_work(GDCWORK_SLAVE); | |
| } | |
| if (!(gdcs.grphdisp & GDCSCRN_ENABLE)) { | if (!(gdcs.grphdisp & GDCSCRN_ENABLE)) { |
| gdcs.grphdisp |= GDCSCRN_ENABLE; | gdcs.grphdisp |= GDCSCRN_ENABLE; |
| screenupdate |= 2; | screenupdate |= 2; |
| } | } |
| mem[MEMB_PRXCRT] |= 0x80; | |
| break; | break; |
| case 0x41: // グラフィック画面の表示終了 | case 0x41: // グラフィック画面の表示終了 |
| // GDCバッファを空に | |
| if (gdc.s.cnt) { | |
| gdc_work(GDCWORK_SLAVE); | |
| } | |
| gdc_forceready(&gdc.s); | |
| if (gdcs.grphdisp & GDCSCRN_ENABLE) { | if (gdcs.grphdisp & GDCSCRN_ENABLE) { |
| gdcs.grphdisp &= ~(GDCSCRN_ENABLE); | gdcs.grphdisp &= ~(GDCSCRN_ENABLE); |
| screenupdate |= 2; | screenupdate |= 2; |
| } | } |
| mem[MEMB_PRXCRT] &= 0x7f; | |
| break; | break; |
| case 0x42: // 表示領域の設定 | case 0x42: // 表示領域の設定 |
| Line 539 void bios0x18(void) { | Line 569 void bios0x18(void) { |
| gdc_forceready(&gdc.s); | gdc_forceready(&gdc.s); |
| ZeroMemory(&gdc.s.para[GDC_SCROLL], 8); | ZeroMemory(&gdc.s.para[GDC_SCROLL], 8); |
| switch(I286_CH & 0xc0) { | switch(CPU_CH & 0xc0) { |
| case 0x40: // UPPER | case 0x40: // UPPER |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { | if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { |
| mem[MEMB_PRXDUPD] ^= 4; | mem[MEMB_PRXDUPD] ^= 4; |
| Line 547 void bios0x18(void) { | Line 577 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 |= 0x10; | tmp.b = TRUE; |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; | gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| break; | break; |
| Line 560 void bios0x18(void) { | Line 589 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 |= 0x10; | tmp.b = TRUE; |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| break; | break; |
| default: // ALL | default: // ALL |
| Line 571 void bios0x18(void) { | Line 599 void bios0x18(void) { |
| gdc.s.para[GDC_PITCH] = 80; | gdc.s.para[GDC_PITCH] = 80; |
| gdcs.grphdisp |= GDCSCRN_EXT; | gdcs.grphdisp |= GDCSCRN_EXT; |
| } | } |
| gdc.mode1 &= ~(0x10); | tmp.b = FALSE; |
| gdc.s.para[GDC_CSRFORM] = 0; | |
| break; | break; |
| } | } |
| gdcs.disp = (I286_CH >> 4) & 1; // 00/05/23 | if ((!tmp.b) || (gdc.crt15khz)) { |
| gdc.mode1 &= ~(0x10); | |
| gdc.s.para[GDC_CSRFORM] = 0; | |
| } | |
| else { | |
| gdc.mode1 |= 0x10; | |
| gdc.s.para[GDC_CSRFORM] = 1; | |
| } | |
| gdcs.disp = (CPU_CH >> 4) & 1; | |
| gdcs.grphdisp |= GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_ALLDRAW2; |
| screenupdate |= 2; | screenupdate |= 2; |
| break; | break; |
| case 0x43: // パレットの設定 | case 0x43: // パレットの設定 |
| i286_memstr_read(I286_DS, I286_BX + offsetof(UCWTBL, GBCPC), | i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), |
| buf, 4); | buf, 4); |
| pal = LOADINTELDWORD(buf); | tmp.d = LOADINTELDWORD(buf); |
| for (i=8; i--;) { | for (i=8; i--;) { |
| gdc_setdegitalpal(i, (BYTE)(pal & 15)); | gdc_setdegitalpal(i, (REG8)(tmp.d & 15)); |
| pal >>= 4; | tmp.d >>= 4; |
| } | } |
| break; | break; |