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| version 1.14, 2004/02/11 04:22:18 | version 1.15, 2004/02/11 17:39:59 |
|---|---|
| Line 52 static const CSRFORM csrform[4] = { | Line 52 static const CSRFORM csrform[4] = { |
| {0x07, 0x3b}, {0x09, 0x4b}, | {0x07, 0x3b}, {0x09, 0x4b}, |
| {0x0f, 0x7b}, {0x13, 0x9b}}; | {0x0f, 0x7b}, {0x13, 0x9b}}; |
| static const UINT8 sync200l[8] = {0x02,0x26,0x03,0x11,0x86,0x0f,0xc8,0x84}; | static const UINT8 sync200l[8] = {0x02,0x26,0x03,0x11,0x86,0x0f,0xc8,0x94}; |
| static const UINT8 sync200m[8] = {0x02,0x26,0x03,0x11,0x83,0x07,0x90,0x65}; | static const UINT8 sync200m[8] = {0x02,0x26,0x03,0x11,0x83,0x07,0x90,0x65}; |
| static const UINT8 sync400m[8] = {0x02,0x4e,0x07,0x25,0x87,0x07,0x90,0x65}; | static const UINT8 sync400m[8] = {0x02,0x4e,0x07,0x25,0x87,0x07,0x90,0x65}; |
| Line 121 static REG8 swapbit(REG8 bit) { | Line 121 static REG8 swapbit(REG8 bit) { |
| return(ret); | return(ret); |
| } | } |
| static void setbiosgdc(UINT32 csrw, const GDCVECT *vect, UINT vcnt, | |
| UINT8 ope) { | |
| gdc.s.para[GDC_CSRW + 0] = (BYTE)csrw; | |
| gdc.s.para[GDC_CSRW + 1] = (BYTE)(csrw >> 8); | |
| gdc.s.para[GDC_CSRW + 2] = (BYTE)(csrw >> 16); | |
| vcnt = min(vcnt, 11); | |
| if (vcnt) { | |
| CopyMemory(gdc.s.para + GDC_VECTW, vect, vcnt); | |
| } | |
| gdc.s.para[GDC_WRITE] = ope; | |
| mem[MEMB_PRXDUPD] &= ~3; | |
| mem[MEMB_PRXDUPD] |= ope; | |
| } | |
| static void bios18_47(void) { | static void bios18_47(void) { |
| UCWTBL ucw; | UCWTBL ucw; |
| Line 269 static void bios18_47(void) { | Line 287 static void bios18_47(void) { |
| // 最後に使った奴を記憶 | // 最後に使った奴を記憶 |
| *(UINT16 *)(mem + MEMW_PRXGLS) = *(UINT16 *)(ucw.GBMDOTI); | *(UINT16 *)(mem + MEMW_PRXGLS) = *(UINT16 *)(ucw.GBMDOTI); |
| *(UINT16 *)(gdc.s.para + GDC_TEXTW) = *(UINT16 *)(ucw.GBMDOTI); | *(UINT16 *)(gdc.s.para + GDC_TEXTW) = *(UINT16 *)(ucw.GBMDOTI); |
| setbiosgdc(csrw, &vect, (ucw.GBDTYP != 0x01)?11:9, ope); | |
| gdc.s.para[GDC_WRITE] = ope; | |
| mem[MEMB_PRXDUPD] &= ~3; | |
| mem[MEMB_PRXDUPD] |= ope; | |
| } | } |
| static void bios18_49(void) { | static void bios18_49(void) { |
| Line 335 static void bios18_49(void) { | Line 350 static void bios18_49(void) { |
| } | } |
| // 最後に使った奴を記憶 | // 最後に使った奴を記憶 |
| gdc.s.para[GDC_WRITE] = ope; | setbiosgdc(csrw, &vect, 5, ope); |
| mem[MEMB_PRXDUPD] &= ~3; | |
| mem[MEMB_PRXDUPD] |= ope; | |
| } | } |
| Line 533 const CRTDATA *crt; | Line 546 const CRTDATA *crt; |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| bios0x18_10((REG8)(CPU_AL & 1)); | bios0x18_10((REG8)(CPU_AL & 1)); |
| break; | break; |
| Line 542 const CRTDATA *crt; | Line 556 const CRTDATA *crt; |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| // 00/08/02 | |
| if (gdc.m.para[GDC_CSRFORM] != (mem[MEMB_CRT_RASTER] | 0x80)) { | if (gdc.m.para[GDC_CSRFORM] != (mem[MEMB_CRT_RASTER] | 0x80)) { |
| gdc.m.para[GDC_CSRFORM] = mem[MEMB_CRT_RASTER] | 0x80; | gdc.m.para[GDC_CSRFORM] = mem[MEMB_CRT_RASTER] | 0x80; |
| } | } |
| Line 555 const CRTDATA *crt; | Line 569 const CRTDATA *crt; |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| gdc_forceready(&gdc.m); | gdc_forceready(&gdc.m); |
| // 00/08/02 | |
| if (gdc.m.para[GDC_CSRFORM] != mem[MEMB_CRT_RASTER]) { | if (gdc.m.para[GDC_CSRFORM] != mem[MEMB_CRT_RASTER]) { |
| gdc.m.para[GDC_CSRFORM] = mem[MEMB_CRT_RASTER]; | gdc.m.para[GDC_CSRFORM] = mem[MEMB_CRT_RASTER]; |
| gdcs.textdisp |= GDCSCRN_ALLDRAW | GDCSCRN_EXT; | gdcs.textdisp |= GDCSCRN_ALLDRAW | GDCSCRN_EXT; |
| Line 771 const CRTDATA *crt; | Line 785 const CRTDATA *crt; |
| } | } |
| } | } |
| break; | break; |
| } | } |
| } | } |