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| version 1.26, 2004/02/29 00:57:06 | version 1.27, 2004/02/29 03:10:02 |
|---|---|
| Line 295 const CRTDATA *p; | Line 295 const CRTDATA *p; |
| return(1); | return(1); |
| } | } |
| if ((scrn & 0x30) == 0x30) { // 640x480 | if ((scrn & 0x30) == 0x30) { // 640x480 |
| #if defined(SUPPORT_PC9821) | |
| if (mode & 4) { | |
| gdc_analogext(TRUE); | |
| mem[MEMB_PRXDUPD] |= 0x80; | |
| crt = 4; | |
| master = 3; | |
| slave = 1; | |
| gdc.display |= 0x10; | |
| } | |
| else | |
| #endif | |
| return(1); | return(1); |
| } | } |
| else { | else { |
| Line 319 const CRTDATA *p; | Line 330 const CRTDATA *p; |
| if ((scrn & 0x20) && (mem[MEMB_PRXDUPD] & 0x04)) { | if ((scrn & 0x20) && (mem[MEMB_PRXDUPD] & 0x04)) { |
| slave += 1; | slave += 1; |
| } | } |
| #if defined(SUPPORT_PC9821) | |
| else { | |
| gdc_analogext(FALSE); | |
| mem[MEMB_PRXDUPD] &= ~0x80; | |
| } | |
| #endif | |
| } | } |
| crt += (scrn & 3); | crt += (scrn & 3); |
| master += (scrn & 3); | master += (scrn & 3); |
| Line 516 static void setbiosgdc(UINT32 csrw, cons | Line 533 static void setbiosgdc(UINT32 csrw, cons |
| mem[MEMB_PRXDUPD] |= ope; | mem[MEMB_PRXDUPD] |= ope; |
| } | } |
| static void bios0x18_47(void) { | static void bios0x18_47(void) { |
| UCWTBL ucw; | UCWTBL ucw; |
| Line 691 static void bios0x18_49(void) { | Line 707 static void bios0x18_49(void) { |
| } | } |
| // ---- PC-9821 | |
| #if defined(SUPPORT_PC9821) | |
| static void bios0x18_4d(REG8 mode) { | |
| if ((mem[0x45c] & 0x40) && | |
| ((mem[MEMB_CRT_BIOS] & 3) == 2)) { | |
| if (mode == 0) { | |
| gdc_analogext(FALSE); | |
| mem[MEMB_PRXDUPD] &= ~0x7f; | |
| mem[MEMB_PRXDUPD] |= 0x04; | |
| } | |
| else if (mode == 1) { | |
| gdc_analogext(TRUE); | |
| mem[MEMB_PRXDUPD] |= 0x80; | |
| } | |
| else { | |
| mem[MEMB_PRXDUPD] |= 0x04; | |
| } | |
| } | |
| } | |
| #endif | |
| // ---- | // ---- |
| void bios0x18(void) { | void bios0x18(void) { |
| Line 803 void bios0x18(void) { | Line 843 void bios0x18(void) { |
| // screenupdate |= 2; | // screenupdate |= 2; |
| break; | break; |
| case 0x0f: // 複数の表示領域の設定(15/24khz) | case 0x0f: // 複数の表示領域の設定 |
| gdc_forceready(GDCWORK_MASTER); | gdc_forceready(GDCWORK_MASTER); |
| bios0x18_0f(CPU_BX, CPU_CX, CPU_DH, CPU_DL); | bios0x18_0f(CPU_BX, CPU_CX, CPU_DH, CPU_DL); |
| break; | break; |
| Line 948 void bios0x18(void) { | Line 988 void bios0x18(void) { |
| } | } |
| } | } |
| break; | break; |
| #if defined(SUPPORT_PC9821) | |
| case 0x4d: | |
| bios0x18_4d(CPU_CH); | |
| break; | |
| #endif | |
| } | } |
| } | } |