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| version 1.31, 2004/03/04 17:36:05 | version 1.39, 2004/07/22 11:31:32 |
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| Line 8 | Line 8 |
| #include "font.h" | #include "font.h" |
| static int sti_waiting = 0; | |
| typedef struct { | typedef struct { |
| BYTE GBON_PTN; | BYTE GBON_PTN; |
| BYTE GBBCC; | BYTE GBBCC; |
| Line 41 typedef struct { | Line 39 typedef struct { |
| static const UINT8 modenum[4] = {3, 1, 0, 2}; | static const UINT8 modenum[4] = {3, 1, 0, 2}; |
| static const CRTDATA crtdata[7] = { | static const CRTDATA crtdata[7] = { |
| {0x07, 0x00, 0x07, 0x08}, // 200-20 | {0x09, 0x1f, 0x08, 0x08}, // 200-20 |
| {0x09, 0x1f, 0x08, 0x08}, // 200-25 | {0x07, 0x00, 0x07, 0x08}, // 200-25 |
| {0x0f, 0x00, 0x0f, 0x10}, // 400-20 | {0x13, 0x1e, 0x11, 0x10}, // 400-20 |
| {0x13, 0x1e, 0x11, 0x10}, // 400-25 | {0x0f, 0x00, 0x0f, 0x10}, // 400-25 |
| {0x17, 0x1c, 0x13, 0x10}, // 480-20 | {0x17, 0x1c, 0x13, 0x10}, // 480-20 |
| {0x12, 0x1f, 0x11, 0x10}, // 480-25 | {0x12, 0x1f, 0x11, 0x10}, // 480-25 |
| {0x0f, 0x00, 0x0f, 0x10}}; // 480-30 | {0x0f, 0x00, 0x0f, 0x10}}; // 480-30 |
| Line 114 const CRTDATA *crt; | Line 112 const CRTDATA *crt; |
| gdc.mode1 |= 0x08; | gdc.mode1 |= 0x08; |
| crt += 2; | crt += 2; |
| } | } |
| if (mode & 0x01) { | if (!(mode & 0x01)) { |
| crt += 1; // 20行 | crt += 1; // 25行 |
| } | } |
| if (mode & 0x02) { | if (mode & 0x02) { |
| gdc.mode1 |= 0x04; // 40桁 | gdc.mode1 |= 0x04; // 40桁 |
| Line 135 const CRTDATA *crt; | Line 133 const CRTDATA *crt; |
| bios0x18_10(0); | bios0x18_10(0); |
| } | } |
| void bios0x18_0c(void) { | |
| if (!(gdcs.textdisp & GDCSCRN_ENABLE)) { | |
| gdcs.textdisp |= GDCSCRN_ENABLE; | |
| screenupdate |= 2; | |
| } | |
| } | |
| static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) { | static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) { |
| BYTE *p; | BYTE *p; |
| Line 167 static void bios0x18_0f(UINT seg, UINT o | Line 173 static void bios0x18_0f(UINT seg, UINT o |
| #endif | #endif |
| while((cnt--) && (p < (gdc.m.para + GDC_SCROLL + 0x10))) { | while((cnt--) && (p < (gdc.m.para + GDC_SCROLL + 0x10))) { |
| t = i286_memword_read(seg, off); | t = MEML_READ16(seg, off); |
| t >>= 1; | t >>= 1; |
| STOREINTELWORD(p, t); | STOREINTELWORD(p, t); |
| t = i286_memword_read(seg, off + 2); | t = MEML_READ16(seg, off + 2); |
| t *= raster; | t *= raster; |
| STOREINTELWORD(p + 2, t); | STOREINTELWORD(p + 2, t); |
| off += 4; | off += 4; |
| Line 208 const BYTE *p; | Line 214 const BYTE *p; |
| switch(code >> 8) { | switch(code >> 8) { |
| case 0x00: // 8x8 | case 0x00: // 8x8 |
| size = 0x0101; | size = 0x0101; |
| i286_memword_write(seg, off, 0x0101); | MEML_WRITE16(seg, off, 0x0101); |
| p = fontrom + 0x82000 + ((code & 0xff) << 4); | p = fontrom + 0x82000 + ((code & 0xff) << 4); |
| MEML_WRITESTR(seg, off + 2, p, 8); | MEML_WRITESTR(seg, off + 2, p, 8); |
| break; | break; |
| case 0x28: // 8x16 KANJI | // case 0x28: |
| case 0x29: | case 0x29: // 8x16 KANJI |
| case 0x2a: | case 0x2a: |
| case 0x2b: | case 0x2b: |
| size = 0x0102; | size = 0x0102; |
| i286_memword_write(seg, off, 0x0102); | MEML_WRITE16(seg, off, 0x0102); |
| p = fontrom; | p = fontrom; |
| p += (code & 0x7f) << 12; | p += (code & 0x7f) << 12; |
| p += (((code >> 8) - 0x20) & 0x7f) << 4; | p += (((code >> 8) - 0x20) & 0x7f) << 4; |
| Line 243 const BYTE *p; | Line 249 const BYTE *p; |
| MEML_WRITESTR(seg, off + 2, buf, 32); | MEML_WRITESTR(seg, off + 2, buf, 32); |
| break; | break; |
| } | } |
| i286_memword_write(seg, off, size); | MEML_WRITE16(seg, off, size); |
| return(size); | return(size); |
| } | } |
| Line 348 const CRTDATA *p; | Line 354 const CRTDATA *p; |
| } | } |
| CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); | CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); |
| ZeroMemory(gdc.m.para + GDC_SCROLL, 8); | ZeroMemory(gdc.m.para + GDC_SCROLL, 4); |
| gdc.m.para[GDC_PITCH] = 80; | gdc.m.para[GDC_PITCH] = 80; |
| p = crtdata + crt; | p = crtdata + crt; |
| Line 363 const CRTDATA *p; | Line 369 const CRTDATA *p; |
| crtc.reg.sdr = 0; | crtc.reg.sdr = 0; |
| CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); | CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (slave & 1) { | if (slave & 1) { |
| gdc.s.para[GDC_PITCH] = 80; | gdc.s.para[GDC_PITCH] = 80; |
| gdc.clock |= 3; | gdc.clock |= 3; |
| mem[MEMB_PRXDUPD] |= 0x04; | mem[MEMB_PRXDUPD] |= 0x04; |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | } |
| else { | else { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| Line 468 void bios0x18_42(REG8 mode) { | Line 475 void bios0x18_42(REG8 mode) { |
| scrn = bios0x18_31bh(); | scrn = bios0x18_31bh(); |
| if ((mem[MEMB_CRT_BIOS] & 0x80) && | if ((mem[MEMB_CRT_BIOS] & 0x80) && |
| (((scrn & 0x30) == 0x30) || (crtmode == 3))) { | (((scrn & 0x30) == 0x30) || (crtmode == 3))) { |
| bios0x18_30(rate, (crtmode << 4) + 1); | bios0x18_30(rate, (REG8)((crtmode << 4) + 1)); |
| } | } |
| else { | else { |
| #endif | #endif |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (crtmode == 2) { // ALL | if (crtmode == 2) { // ALL |
| crtmode = 2; | crtmode = 2; |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { | if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { |
| Line 503 void bios0x18_42(REG8 mode) { | Line 510 void bios0x18_42(REG8 mode) { |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| } | } |
| } | } |
| if (mem[MEMB_PRXDUPD] & 4) { | |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | |
| if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { | if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { |
| gdc.mode1 &= ~(0x10); | gdc.mode1 &= ~(0x10); |
| gdc.s.para[GDC_CSRFORM] = 0; | gdc.s.para[GDC_CSRFORM] = 0; |
| Line 620 static void bios0x18_47(void) { | Line 630 static void bios0x18_47(void) { |
| vect.ope = 0x20 + (ucw.GBDSP & 7); | vect.ope = 0x20 + (ucw.GBDSP & 7); |
| vect.DC[0] = ucw.GBLNG1[0]; | vect.DC[0] = ucw.GBLNG1[0]; |
| vect.DC[1] = ucw.GBLNG1[1]; | vect.DC[1] = ucw.GBLNG1[1]; |
| data = LOADINTELWORD(ucw.GBLNG2) - 1; | // data = LOADINTELWORD(ucw.GBLNG2) - 1; |
| data = LOADINTELWORD(ucw.GBCIR) - 1; | |
| STOREINTELWORD(vect.D, data); | STOREINTELWORD(vect.D, data); |
| data >>= 1; | data >>= 1; |
| STOREINTELWORD(vect.D2, data); | STOREINTELWORD(vect.D2, data); |
| Line 756 void bios0x18(void) { | Line 767 void bios0x18(void) { |
| #if 0 | #if 0 |
| TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, | TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, |
| i286_memword_read(CPU_SS, CPU_SP+2), | MEML_READ16(CPU_SS, CPU_SP+2), |
| i286_memword_read(CPU_SS, CPU_SP))); | MEML_READ16(CPU_SS, CPU_SP))); |
| #endif | #endif |
| sti_waiting ^= 1; | |
| if (sti_waiting) { // 割込み許可の遊び | |
| CPU_STI; | |
| if (PICEXISTINTR) { | |
| CPU_IP--; | |
| nevent_forceexit(); | |
| return; | |
| } | |
| } | |
| sti_waiting = 0; | |
| switch(CPU_AH) { | switch(CPU_AH) { |
| case 0x00: // キー・データの読みだし | case 0x00: // キー・データの読みだし |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| Line 803 void bios0x18(void) { | Line 803 void bios0x18(void) { |
| break; | break; |
| case 0x04: // キー入力状態のセンス | case 0x04: // キー入力状態のセンス |
| CPU_AH = mem[0x00052a + (CPU_AL & 0x0f)]; | CPU_AH = mem[MEMX_KB_KY_STS + (CPU_AL & 0x0f)]; |
| break; | break; |
| case 0x05: // キー入力センス | case 0x05: // キー入力センス |
| Line 825 void bios0x18(void) { | Line 825 void bios0x18(void) { |
| break; | break; |
| case 0x0c: // テキスト画面の表示開始 | case 0x0c: // テキスト画面の表示開始 |
| if (!(gdcs.textdisp & GDCSCRN_ENABLE)) { | bios0x18_0c(); |
| gdcs.textdisp |= GDCSCRN_ENABLE; | |
| screenupdate |= 2; | |
| } | |
| break; | break; |
| case 0x0d: // テキスト画面の表示終了 | case 0x0d: // テキスト画面の表示終了 |
| Line 940 void bios0x18(void) { | Line 937 void bios0x18(void) { |
| if (tmp.r8 == 0x05) { | if (tmp.r8 == 0x05) { |
| CPU_AL = 0; | CPU_AL = 0; |
| CPU_BH = 0; | CPU_BH = 0; |
| TRACEOUT(("success")); | |
| } | } |
| else { | else { |
| CPU_AL = 1; | CPU_AL = 1; |
| CPU_BH = 1; | CPU_BH = 1; |
| TRACEOUT(("failure")); | |
| } | } |
| } | } |
| break; | break; |
| Line 980 void bios0x18(void) { | Line 975 void bios0x18(void) { |
| case 0x44: // ボーダカラーの設定 | case 0x44: // ボーダカラーの設定 |
| // if (!(mem[MEMB_PRXCRT] & 0x40)) { | // if (!(mem[MEMB_PRXCRT] & 0x40)) { |
| // color = i286_membyte_read(CPU_DS, CPU_BX + 1); | // color = MEML_READ8(CPU_DS, CPU_BX + 1); |
| // } | // } |
| break; | break; |