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| version 1.33, 2004/03/14 23:45:43 | version 1.36, 2004/06/02 11:02:53 |
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| Line 8 | Line 8 |
| #include "font.h" | #include "font.h" |
| static int sti_waiting = 0; | |
| typedef struct { | typedef struct { |
| BYTE GBON_PTN; | BYTE GBON_PTN; |
| BYTE GBBCC; | BYTE GBBCC; |
| Line 476 void bios0x18_42(REG8 mode) { | Line 474 void bios0x18_42(REG8 mode) { |
| scrn = bios0x18_31bh(); | scrn = bios0x18_31bh(); |
| if ((mem[MEMB_CRT_BIOS] & 0x80) && | if ((mem[MEMB_CRT_BIOS] & 0x80) && |
| (((scrn & 0x30) == 0x30) || (crtmode == 3))) { | (((scrn & 0x30) == 0x30) || (crtmode == 3))) { |
| bios0x18_30(rate, (crtmode << 4) + 1); | bios0x18_30(rate, (REG8)((crtmode << 4) + 1)); |
| } | } |
| else { | else { |
| #endif | #endif |
| Line 628 static void bios0x18_47(void) { | Line 626 static void bios0x18_47(void) { |
| vect.ope = 0x20 + (ucw.GBDSP & 7); | vect.ope = 0x20 + (ucw.GBDSP & 7); |
| vect.DC[0] = ucw.GBLNG1[0]; | vect.DC[0] = ucw.GBLNG1[0]; |
| vect.DC[1] = ucw.GBLNG1[1]; | vect.DC[1] = ucw.GBLNG1[1]; |
| data = LOADINTELWORD(ucw.GBLNG2) - 1; | // data = LOADINTELWORD(ucw.GBLNG2) - 1; |
| data = LOADINTELWORD(ucw.GBCIR) - 1; | |
| STOREINTELWORD(vect.D, data); | STOREINTELWORD(vect.D, data); |
| data >>= 1; | data >>= 1; |
| STOREINTELWORD(vect.D2, data); | STOREINTELWORD(vect.D2, data); |
| Line 768 void bios0x18(void) { | Line 767 void bios0x18(void) { |
| MEML_READ16(CPU_SS, CPU_SP))); | MEML_READ16(CPU_SS, CPU_SP))); |
| #endif | #endif |
| sti_waiting ^= 1; | |
| if (sti_waiting) { // 割込み許可の遊び | |
| CPU_STI; | |
| if (PICEXISTINTR) { | |
| CPU_IP--; | |
| nevent_forceexit(); | |
| return; | |
| } | |
| } | |
| sti_waiting = 0; | |
| switch(CPU_AH) { | switch(CPU_AH) { |
| case 0x00: // キー・データの読みだし | case 0x00: // キー・データの読みだし |
| if (mem[MEMB_KB_COUNT]) { | if (mem[MEMB_KB_COUNT]) { |
| Line 945 void bios0x18(void) { | Line 933 void bios0x18(void) { |
| if (tmp.r8 == 0x05) { | if (tmp.r8 == 0x05) { |
| CPU_AL = 0; | CPU_AL = 0; |
| CPU_BH = 0; | CPU_BH = 0; |
| TRACEOUT(("success")); | |
| } | } |
| else { | else { |
| CPU_AL = 1; | CPU_AL = 1; |
| CPU_BH = 1; | CPU_BH = 1; |
| TRACEOUT(("failure")); | |
| } | } |
| } | } |
| break; | break; |