|
|
| version 1.38, 2004/06/18 07:42:13 | version 1.39, 2004/07/22 11:31:32 |
|---|---|
| Line 354 const CRTDATA *p; | Line 354 const CRTDATA *p; |
| } | } |
| CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); | CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); |
| ZeroMemory(gdc.m.para + GDC_SCROLL, 8); | ZeroMemory(gdc.m.para + GDC_SCROLL, 4); |
| gdc.m.para[GDC_PITCH] = 80; | gdc.m.para[GDC_PITCH] = 80; |
| p = crtdata + crt; | p = crtdata + crt; |
| Line 369 const CRTDATA *p; | Line 369 const CRTDATA *p; |
| crtc.reg.sdr = 0; | crtc.reg.sdr = 0; |
| CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); | CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (slave & 1) { | if (slave & 1) { |
| gdc.s.para[GDC_PITCH] = 80; | gdc.s.para[GDC_PITCH] = 80; |
| gdc.clock |= 3; | gdc.clock |= 3; |
| mem[MEMB_PRXDUPD] |= 0x04; | mem[MEMB_PRXDUPD] |= 0x04; |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | } |
| else { | else { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| Line 478 void bios0x18_42(REG8 mode) { | Line 479 void bios0x18_42(REG8 mode) { |
| } | } |
| else { | else { |
| #endif | #endif |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (crtmode == 2) { // ALL | if (crtmode == 2) { // ALL |
| crtmode = 2; | crtmode = 2; |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { | if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { |
| Line 509 void bios0x18_42(REG8 mode) { | Line 510 void bios0x18_42(REG8 mode) { |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| } | } |
| } | } |
| if (mem[MEMB_PRXDUPD] & 4) { | |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | |
| if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { | if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { |
| gdc.mode1 &= ~(0x10); | gdc.mode1 &= ~(0x10); |
| gdc.s.para[GDC_CSRFORM] = 0; | gdc.s.para[GDC_CSRFORM] = 0; |