|
|
| version 1.37, 2004/06/03 16:20:52 | version 1.40, 2005/02/07 14:46:07 |
|---|---|
| Line 9 | Line 9 |
| typedef struct { | typedef struct { |
| BYTE GBON_PTN; | UINT8 GBON_PTN; |
| BYTE GBBCC; | UINT8 GBBCC; |
| BYTE GBDOTU; | UINT8 GBDOTU; |
| BYTE GBDSP; | UINT8 GBDSP; |
| BYTE GBCPC[4]; | UINT8 GBCPC[4]; |
| BYTE GBSX1[2]; | UINT8 GBSX1[2]; |
| BYTE GBSY1[2]; | UINT8 GBSY1[2]; |
| BYTE GBLNG1[2]; | UINT8 GBLNG1[2]; |
| BYTE GBWDPA[2]; | UINT8 GBWDPA[2]; |
| BYTE GBRBUF[2][3]; | UINT8 GBRBUF[2][3]; |
| BYTE GBSX2[2]; | UINT8 GBSX2[2]; |
| BYTE GBSY2[2]; | UINT8 GBSY2[2]; |
| BYTE GBMDOT[2]; | UINT8 GBMDOT[2]; |
| BYTE GBCIR[2]; | UINT8 GBCIR[2]; |
| BYTE GBLNG2[2]; | UINT8 GBLNG2[2]; |
| BYTE GBMDOTI[8]; | UINT8 GBMDOTI[8]; |
| BYTE GBDTYP; | UINT8 GBDTYP; |
| BYTE GBFILL; | UINT8 GBFILL; |
| } UCWTBL; | } UCWTBL; |
| typedef struct { | typedef struct { |
| Line 143 void bios0x18_0c(void) { | Line 143 void bios0x18_0c(void) { |
| static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) { | static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) { |
| BYTE *p; | UINT8 *p; |
| UINT raster; | UINT raster; |
| UINT t; | UINT t; |
| Line 207 void bios0x18_10(REG8 curdel) { | Line 207 void bios0x18_10(REG8 curdel) { |
| REG16 bios0x18_14(REG16 seg, REG16 off, REG16 code) { | REG16 bios0x18_14(REG16 seg, REG16 off, REG16 code) { |
| UINT16 size; | UINT16 size; |
| const BYTE *p; | const UINT8 *p; |
| BYTE buf[32]; | UINT8 buf[32]; |
| UINT i; | UINT i; |
| switch(code >> 8) { | switch(code >> 8) { |
| Line 255 const BYTE *p; | Line 255 const BYTE *p; |
| static void bios0x18_1a(REG16 seg, REG16 off, REG16 code) { | static void bios0x18_1a(REG16 seg, REG16 off, REG16 code) { |
| BYTE *p; | UINT8 *p; |
| BYTE buf[32]; | UINT8 buf[32]; |
| UINT i; | UINT i; |
| if (((code >> 8) & 0x7e) == 0x76) { | if (((code >> 8) & 0x7e) == 0x76) { |
| Line 354 const CRTDATA *p; | Line 354 const CRTDATA *p; |
| } | } |
| CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); | CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8); |
| ZeroMemory(gdc.m.para + GDC_SCROLL, 8); | ZeroMemory(gdc.m.para + GDC_SCROLL, 4); |
| gdc.m.para[GDC_PITCH] = 80; | gdc.m.para[GDC_PITCH] = 80; |
| p = crtdata + crt; | p = crtdata + crt; |
| Line 369 const CRTDATA *p; | Line 369 const CRTDATA *p; |
| crtc.reg.sdr = 0; | crtc.reg.sdr = 0; |
| CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); | CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (slave & 1) { | if (slave & 1) { |
| gdc.s.para[GDC_PITCH] = 80; | gdc.s.para[GDC_PITCH] = 80; |
| gdc.clock |= 3; | gdc.clock |= 3; |
| mem[MEMB_PRXDUPD] |= 0x04; | mem[MEMB_PRXDUPD] |= 0x04; |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | } |
| else { | else { |
| gdc.s.para[GDC_PITCH] = 40; | gdc.s.para[GDC_PITCH] = 40; |
| Line 478 void bios0x18_42(REG8 mode) { | Line 479 void bios0x18_42(REG8 mode) { |
| } | } |
| else { | else { |
| #endif | #endif |
| ZeroMemory(gdc.s.para + GDC_SCROLL, 8); | ZeroMemory(gdc.s.para + GDC_SCROLL, 4); |
| if (crtmode == 2) { // ALL | if (crtmode == 2) { // ALL |
| crtmode = 2; | crtmode = 2; |
| if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { | if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { |
| Line 509 void bios0x18_42(REG8 mode) { | Line 510 void bios0x18_42(REG8 mode) { |
| gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; | gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; |
| } | } |
| } | } |
| if (mem[MEMB_PRXDUPD] & 4) { | |
| gdc.s.para[GDC_SCROLL+3] = 0x40; | |
| } | |
| if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { | if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) { |
| gdc.mode1 &= ~(0x10); | gdc.mode1 &= ~(0x10); |
| gdc.s.para[GDC_CSRFORM] = 0; | gdc.s.para[GDC_CSRFORM] = 0; |
| Line 537 void bios0x18_42(REG8 mode) { | Line 541 void bios0x18_42(REG8 mode) { |
| static void setbiosgdc(UINT32 csrw, const GDCVECT *vect, UINT8 ope) { | static void setbiosgdc(UINT32 csrw, const GDCVECT *vect, UINT8 ope) { |
| gdc.s.para[GDC_CSRW + 0] = (BYTE)csrw; | gdc.s.para[GDC_CSRW + 0] = (UINT8)csrw; |
| gdc.s.para[GDC_CSRW + 1] = (BYTE)(csrw >> 8); | gdc.s.para[GDC_CSRW + 1] = (UINT8)(csrw >> 8); |
| gdc.s.para[GDC_CSRW + 2] = (BYTE)(csrw >> 16); | gdc.s.para[GDC_CSRW + 2] = (UINT8)(csrw >> 16); |
| gdc.s.para[GDC_VECTW] = vect->ope; | gdc.s.para[GDC_VECTW] = vect->ope; |
| gdc_vectreset(&gdc.s); | gdc_vectreset(&gdc.s); |
| Line 669 static void bios0x18_49(void) { | Line 673 static void bios0x18_49(void) { |
| UCWTBL ucw; | UCWTBL ucw; |
| UINT i; | UINT i; |
| BYTE pat[8]; | UINT8 pat[8]; |
| UINT16 tmp; | UINT16 tmp; |
| GDCVECT vect; | GDCVECT vect; |
| UINT16 GBSX1; | UINT16 GBSX1; |
| Line 799 void bios0x18(void) { | Line 803 void bios0x18(void) { |
| break; | break; |
| case 0x04: // キー入力状態のセンス | case 0x04: // キー入力状態のセンス |
| CPU_AH = mem[0x00052a + (CPU_AL & 0x0f)]; | CPU_AH = mem[MEMX_KB_KY_STS + (CPU_AL & 0x0f)]; |
| break; | break; |
| case 0x05: // キー入力センス | case 0x05: // キー入力センス |