--- np2/bios/bios18.c 2004/02/29 00:57:06 1.26 +++ np2/bios/bios18.c 2004/06/03 16:20:52 1.37 @@ -8,8 +8,6 @@ #include "font.h" -static int sti_waiting = 0; - typedef struct { BYTE GBON_PTN; BYTE GBBCC; @@ -41,10 +39,10 @@ typedef struct { static const UINT8 modenum[4] = {3, 1, 0, 2}; static const CRTDATA crtdata[7] = { - {0x07, 0x00, 0x07, 0x08}, // 200-20 - {0x09, 0x1f, 0x08, 0x08}, // 200-25 - {0x0f, 0x00, 0x0f, 0x10}, // 400-20 - {0x13, 0x1e, 0x11, 0x10}, // 400-25 + {0x09, 0x1f, 0x08, 0x08}, // 200-20 + {0x07, 0x00, 0x07, 0x08}, // 200-25 + {0x13, 0x1e, 0x11, 0x10}, // 400-20 + {0x0f, 0x00, 0x0f, 0x10}, // 400-25 {0x17, 0x1c, 0x13, 0x10}, // 480-20 {0x12, 0x1f, 0x11, 0x10}, // 480-25 {0x0f, 0x00, 0x0f, 0x10}}; // 480-30 @@ -114,8 +112,8 @@ const CRTDATA *crt; gdc.mode1 |= 0x08; crt += 2; } - if (mode & 0x01) { - crt += 1; // 20行 + if (!(mode & 0x01)) { + crt += 1; // 25行 } if (mode & 0x02) { gdc.mode1 |= 0x04; // 40桁 @@ -135,6 +133,14 @@ const CRTDATA *crt; bios0x18_10(0); } +void bios0x18_0c(void) { + + if (!(gdcs.textdisp & GDCSCRN_ENABLE)) { + gdcs.textdisp |= GDCSCRN_ENABLE; + screenupdate |= 2; + } +} + static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) { BYTE *p; @@ -167,10 +173,10 @@ static void bios0x18_0f(UINT seg, UINT o #endif while((cnt--) && (p < (gdc.m.para + GDC_SCROLL + 0x10))) { - t = i286_memword_read(seg, off); + t = MEML_READ16(seg, off); t >>= 1; STOREINTELWORD(p, t); - t = i286_memword_read(seg, off + 2); + t = MEML_READ16(seg, off + 2); t *= raster; STOREINTELWORD(p + 2, t); off += 4; @@ -208,27 +214,27 @@ const BYTE *p; switch(code >> 8) { case 0x00: // 8x8 size = 0x0101; - i286_memword_write(seg, off, 0x0101); + MEML_WRITE16(seg, off, 0x0101); p = fontrom + 0x82000 + ((code & 0xff) << 4); - i286_memstr_write(seg, off + 2, p, 8); + MEML_WRITESTR(seg, off + 2, p, 8); break; - case 0x28: // 8x16 KANJI - case 0x29: +// case 0x28: + case 0x29: // 8x16 KANJI case 0x2a: case 0x2b: size = 0x0102; - i286_memword_write(seg, off, 0x0102); + MEML_WRITE16(seg, off, 0x0102); p = fontrom; p += (code & 0x7f) << 12; p += (((code >> 8) - 0x20) & 0x7f) << 4; - i286_memstr_write(seg, off + 2, p, 16); + MEML_WRITESTR(seg, off + 2, p, 16); break; case 0x80: // 8x16 ANK size = 0x0102; p = fontrom + 0x80000 + ((code & 0xff) << 4); - i286_memstr_write(seg, off + 2, p, 16); + MEML_WRITESTR(seg, off + 2, p, 16); break; default: @@ -240,10 +246,10 @@ const BYTE *p; buf[i*2+0] = *p; buf[i*2+1] = *(p+0x800); } - i286_memstr_write(seg, off + 2, buf, 32); + MEML_WRITESTR(seg, off + 2, buf, 32); break; } - i286_memword_write(seg, off, size); + MEML_WRITE16(seg, off, size); return(size); } @@ -254,7 +260,7 @@ static void bios0x18_1a(REG16 seg, REG16 UINT i; if (((code >> 8) & 0x7e) == 0x76) { - i286_memstr_read(seg, off + 2, buf, 32); + MEML_READSTR(seg, off + 2, buf, 32); p = fontrom; p += (code & 0x7f) << 12; p += (((code >> 8) - 0x20) & 0x7f) << 4; @@ -284,24 +290,35 @@ void bios0x18_16(REG8 chr, REG8 atr) { // ---- 31khz #if defined(SUPPORT_CRT31KHZ) -static REG8 bios0x18_30(REG8 mode, REG8 scrn) { +static REG8 bios0x18_30(REG8 rate, REG8 scrn) { int crt; int master; int slave; const CRTDATA *p; - if (((mode & 0xf8) != 0x08) || (scrn & (~0x33)) || ((scrn & 3) == 3)) { - return(1); + if (((rate & 0xf8) != 0x08) || (scrn & (~0x33)) || ((scrn & 3) == 3)) { + return(0); } if ((scrn & 0x30) == 0x30) { // 640x480 - return(1); +#if defined(SUPPORT_PC9821) + if (rate & 4) { + gdc_analogext(TRUE); + mem[MEMB_PRXDUPD] |= 0x80; + crt = 4; + master = 3 + (scrn & 3); + slave = 1; + gdc.analog |= (1 << GDCANALOG_256E); + } + else +#endif + return(0); } else { if ((scrn & 3) >= 2) { - return(1); + return(0); } - if (mode & 4) { // 31khz + if (rate & 4) { // 31khz crt = 2; master = 2; slave = 4; @@ -319,11 +336,17 @@ const CRTDATA *p; if ((scrn & 0x20) && (mem[MEMB_PRXDUPD] & 0x04)) { slave += 1; } +#if defined(SUPPORT_PC9821) + else { + gdc_analogext(FALSE); + mem[MEMB_PRXDUPD] &= ~0x80; + } + gdc.analog &= ~(1 << (GDCANALOG_256E)); +#endif } crt += (scrn & 3); - master += (scrn & 3); - if (mode & 4) { + if (rate & 4) { gdc.display |= (1 << GDCDISP_31); } else { @@ -372,7 +395,6 @@ const CRTDATA *p; gdcs.textdisp &= ~GDCSCRN_ENABLE; gdcs.textdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; - gdcs.grphdisp &= ~GDCSCRN_ENABLE; gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; screenupdate |= 2; @@ -385,15 +407,15 @@ const CRTDATA *p; if (scrn & 2) { mem[MEMB_CRT_STS_FLAG] |= 0x10; } - return(0); + return(5); // 最後にGDCへ送ったデータ… } static REG8 bios0x18_31al(void) { - UINT8 mode; + UINT8 rate; - mode = 0x08 + ((gdc.display >> (GDCDISP_31 - 5)) & 4); - return(mode); + rate = 0x08 + ((gdc.display >> (GDCDISP_31 - 5)) & 4); + return(rate); } static REG8 bios0x18_31bh(void) { @@ -437,18 +459,24 @@ void bios0x18_41(void) { void bios0x18_42(REG8 mode) { UINT8 crtmode; +#if defined(SUPPORT_CRT31KHZ) + UINT8 rate; + UINT8 scrn; +#endif + int slave; gdc_forceready(GDCWORK_MASTER); gdc_forceready(GDCWORK_SLAVE); crtmode = modenum[mode >> 6]; #if defined(SUPPORT_CRT31KHZ) - if (mem[MEMB_CRT_BIOS] & 0x80) { - bios0x18_30(bios0x18_31al(), (crtmode << 4) + (bios0x18_31bh() & 3)); + rate = bios0x18_31al(); + scrn = bios0x18_31bh(); + if ((mem[MEMB_CRT_BIOS] & 0x80) && + (((scrn & 0x30) == 0x30) || (crtmode == 3))) { + bios0x18_30(rate, (REG8)((crtmode << 4) + 1)); } else { - mem[MEMB_CRT_BIOS] &= ~3; - mem[MEMB_CRT_BIOS] |= crtmode; #endif ZeroMemory(gdc.s.para + GDC_SCROLL, 8); if (crtmode == 2) { // ALL @@ -456,24 +484,27 @@ void bios0x18_42(REG8 mode) { if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) { mem[MEMB_PRXDUPD] ^= 4; gdc.clock |= 3; - CopyMemory(gdc.s.para + GDC_SYNC, sync400m, 8); + CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[3], 8); gdc.s.para[GDC_PITCH] = 80; gdcs.grphdisp |= GDCSCRN_EXT; mem[MEMB_PRXDUPD] |= 0x08; } } else { - crtmode &= 1; if ((mem[MEMB_PRXDUPD] & 0x24) == 0x24) { mem[MEMB_PRXDUPD] ^= 4; gdc.clock &= ~3; - CopyMemory(gdc.s.para + GDC_SYNC, - (mem[MEMB_PRXCRT] & 0x40)?sync200m:sync200l, 8); +#if defined(SUPPORT_CRT31KHZ) + if (rate & 4) slave = 4; + else +#endif + slave = (mem[MEMB_PRXCRT] & 0x40)?2:0; + CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8); gdc.s.para[GDC_PITCH] = 40; gdcs.grphdisp |= GDCSCRN_EXT; mem[MEMB_PRXDUPD] |= 0x08; } - if (crtmode == 1) { // UPPER + if (crtmode & 1) { // UPPER gdc.s.para[GDC_SCROLL+0] = (200*40) & 0xff; gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8; } @@ -487,6 +518,8 @@ void bios0x18_42(REG8 mode) { gdc.s.para[GDC_CSRFORM] = 1; } #if defined(SUPPORT_CRT31KHZ) + mem[MEMB_CRT_BIOS] &= ~3; + mem[MEMB_CRT_BIOS] |= crtmode; } #endif if (crtmode != 3) { @@ -516,7 +549,6 @@ static void setbiosgdc(UINT32 csrw, cons mem[MEMB_PRXDUPD] |= ope; } - static void bios0x18_47(void) { UCWTBL ucw; @@ -535,7 +567,7 @@ static void bios0x18_47(void) { SINT16 dy; gdc_forceready(GDCWORK_SLAVE); - i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); + MEML_READSTR(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); GBSX1 = LOADINTELWORD(ucw.GBSX1); GBSY1 = LOADINTELWORD(ucw.GBSY1); GBSX2 = LOADINTELWORD(ucw.GBSX2); @@ -594,7 +626,8 @@ static void bios0x18_47(void) { vect.ope = 0x20 + (ucw.GBDSP & 7); vect.DC[0] = ucw.GBLNG1[0]; vect.DC[1] = ucw.GBLNG1[1]; - data = LOADINTELWORD(ucw.GBLNG2) - 1; +// data = LOADINTELWORD(ucw.GBLNG2) - 1; + data = LOADINTELWORD(ucw.GBCIR) - 1; STOREINTELWORD(vect.D, data); data >>= 1; STOREINTELWORD(vect.D2, data); @@ -646,7 +679,7 @@ static void bios0x18_49(void) { gdc_forceready(GDCWORK_SLAVE); - i286_memstr_read(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); + MEML_READSTR(CPU_DS, CPU_BX, &ucw, sizeof(ucw)); for (i=0; i<8; i++) { mem[MEMW_PRXGLS + i] = ucw.GBMDOTI[i]; pat[i] = GDCPATREVERSE(ucw.GBMDOTI[i]); @@ -691,12 +724,37 @@ static void bios0x18_49(void) { } +// ---- PC-9821 + +#if defined(SUPPORT_PC9821) +static void bios0x18_4d(REG8 mode) { + + if ((mem[0x45c] & 0x40) && + ((mem[MEMB_CRT_BIOS] & 3) == 2)) { + if (mode == 0) { + gdc_analogext(FALSE); + mem[MEMB_PRXDUPD] &= ~0x7f; + mem[MEMB_PRXDUPD] |= 0x04; + } + else if (mode == 1) { + gdc_analogext(TRUE); + mem[MEMB_PRXDUPD] |= 0x80; + } + else { + mem[MEMB_PRXDUPD] |= 0x04; + } + } +} +#endif + + // ---- void bios0x18(void) { union { BOOL b; + REG8 r8; UINT16 w; UINT32 d; UINT8 col[4]; @@ -705,21 +763,10 @@ void bios0x18(void) { #if 0 TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX, - i286_memword_read(CPU_SS, CPU_SP+2), - i286_memword_read(CPU_SS, CPU_SP))); + MEML_READ16(CPU_SS, CPU_SP+2), + MEML_READ16(CPU_SS, CPU_SP))); #endif - sti_waiting ^= 1; - if (sti_waiting) { // 割込み許可の遊び - CPU_STI; - if (PICEXISTINTR) { - CPU_IP--; - nevent_forceexit(); - return; - } - } - sti_waiting = 0; - switch(CPU_AH) { case 0x00: // キー・データの読みだし if (mem[MEMB_KB_COUNT]) { @@ -774,10 +821,7 @@ void bios0x18(void) { break; case 0x0c: // テキスト画面の表示開始 - if (!(gdcs.textdisp & GDCSCRN_ENABLE)) { - gdcs.textdisp |= GDCSCRN_ENABLE; - screenupdate |= 2; - } + bios0x18_0c(); break; case 0x0d: // テキスト画面の表示終了 @@ -803,7 +847,7 @@ void bios0x18(void) { // screenupdate |= 2; break; - case 0x0f: // 複数の表示領域の設定(15/24khz) + case 0x0f: // 複数の表示領域の設定 gdc_forceready(GDCWORK_MASTER); bios0x18_0f(CPU_BX, CPU_CX, CPU_DH, CPU_DL); break; @@ -884,7 +928,16 @@ void bios0x18(void) { if (mem[MEMB_CRT_BIOS] & 0x80) { gdc_forceready(GDCWORK_MASTER); gdc_forceready(GDCWORK_SLAVE); - CPU_AL = bios0x18_30(CPU_AL, CPU_BH); + tmp.r8 = bios0x18_30(CPU_AL, CPU_BH); + CPU_AH = tmp.r8; + if (tmp.r8 == 0x05) { + CPU_AL = 0; + CPU_BH = 0; + } + else { + CPU_AL = 1; + CPU_BH = 1; + } } break; @@ -908,7 +961,7 @@ void bios0x18(void) { break; case 0x43: // パレットの設定 - i286_memstr_read(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), + MEML_READSTR(CPU_DS, CPU_BX + offsetof(UCWTBL, GBCPC), tmp.col, 4); for (i=0; i<4; i++) { gdc_setdegitalpal(6 - (i*2), (REG8)(tmp.col[i] >> 4)); @@ -918,7 +971,7 @@ void bios0x18(void) { case 0x44: // ボーダカラーの設定 // if (!(mem[MEMB_PRXCRT] & 0x40)) { -// color = i286_membyte_read(CPU_DS, CPU_BX + 1); +// color = MEML_READ8(CPU_DS, CPU_BX + 1); // } break; @@ -948,6 +1001,11 @@ void bios0x18(void) { } } break; +#if defined(SUPPORT_PC9821) + case 0x4d: + bios0x18_4d(CPU_CH); + break; +#endif } }