--- np2/bios/bios18.c	2004/04/06 18:41:00	1.34
+++ np2/bios/bios18.c	2005/03/16 09:33:53	1.41
@@ -9,24 +9,24 @@
 
 
 typedef struct {
-	BYTE	GBON_PTN;
-	BYTE	GBBCC;
-	BYTE	GBDOTU;
-	BYTE	GBDSP;
-	BYTE	GBCPC[4];
-	BYTE	GBSX1[2];
-	BYTE	GBSY1[2];
-	BYTE	GBLNG1[2];
-	BYTE	GBWDPA[2];
-	BYTE	GBRBUF[2][3];
-	BYTE	GBSX2[2];
-	BYTE	GBSY2[2];
-	BYTE	GBMDOT[2];
-	BYTE	GBCIR[2];
-	BYTE	GBLNG2[2];
-	BYTE	GBMDOTI[8];
-	BYTE	GBDTYP;
-	BYTE	GBFILL;
+	UINT8	GBON_PTN;
+	UINT8	GBBCC;
+	UINT8	GBDOTU;
+	UINT8	GBDSP;
+	UINT8	GBCPC[4];
+	UINT8	GBSX1[2];
+	UINT8	GBSY1[2];
+	UINT8	GBLNG1[2];
+	UINT8	GBWDPA[2];
+	UINT8	GBRBUF[2][3];
+	UINT8	GBSX2[2];
+	UINT8	GBSY2[2];
+	UINT8	GBMDOT[2];
+	UINT8	GBCIR[2];
+	UINT8	GBLNG2[2];
+	UINT8	GBMDOTI[8];
+	UINT8	GBDTYP;
+	UINT8	GBFILL;
 } UCWTBL;
 
 typedef struct {
@@ -143,7 +143,7 @@ void bios0x18_0c(void) {
 
 static void bios0x18_0f(UINT seg, UINT off, REG8 num, REG8 cnt) {
 
-	BYTE	*p;
+	UINT8	*p;
 	UINT	raster;
 	UINT	t;
 
@@ -207,8 +207,8 @@ void bios0x18_10(REG8 curdel) {
 REG16 bios0x18_14(REG16 seg, REG16 off, REG16 code) {
 
 	UINT16	size;
-const BYTE	*p;
-	BYTE	buf[32];
+const UINT8	*p;
+	UINT8	buf[32];
 	UINT	i;
 
 	switch(code >> 8) {
@@ -219,8 +219,8 @@ const BYTE	*p;
 			MEML_WRITESTR(seg, off + 2, p, 8);
 			break;
 
-		case 0x28:			// 8x16 KANJI
-		case 0x29:
+//		case 0x28:
+		case 0x29:			// 8x16 KANJI
 		case 0x2a:
 		case 0x2b:
 			size = 0x0102;
@@ -255,8 +255,8 @@ const BYTE	*p;
 
 static void bios0x18_1a(REG16 seg, REG16 off, REG16 code) {
 
-	BYTE	*p;
-	BYTE	buf[32];
+	UINT8	*p;
+	UINT8	buf[32];
 	UINT	i;
 
 	if (((code >> 8) & 0x7e) == 0x76) {
@@ -354,7 +354,7 @@ const CRTDATA	*p;
 	}
 
 	CopyMemory(gdc.m.para + GDC_SYNC, gdcmastersync[master], 8);
-	ZeroMemory(gdc.m.para + GDC_SCROLL, 8);
+	ZeroMemory(gdc.m.para + GDC_SCROLL, 4);
 	gdc.m.para[GDC_PITCH] = 80;
 
 	p = crtdata + crt;
@@ -369,11 +369,12 @@ const CRTDATA	*p;
 	crtc.reg.sdr = 0;
 
 	CopyMemory(gdc.s.para + GDC_SYNC, gdcslavesync[slave], 8);
-	ZeroMemory(gdc.s.para + GDC_SCROLL, 8);
+	ZeroMemory(gdc.s.para + GDC_SCROLL, 4);
 	if (slave & 1) {
 		gdc.s.para[GDC_PITCH] = 80;
 		gdc.clock |= 3;
 		mem[MEMB_PRXDUPD] |= 0x04;
+		gdc.s.para[GDC_SCROLL+3] = 0x40;
 	}
 	else {
 		gdc.s.para[GDC_PITCH] = 40;
@@ -474,11 +475,11 @@ void bios0x18_42(REG8 mode) {
 	scrn = bios0x18_31bh();
 	if ((mem[MEMB_CRT_BIOS] & 0x80) &&
 		(((scrn & 0x30) == 0x30) || (crtmode == 3))) {
-		bios0x18_30(rate, (crtmode << 4) + 1);
+		bios0x18_30(rate, (REG8)((crtmode << 4) + 1));
 	}
 	else {
 #endif
-		ZeroMemory(gdc.s.para + GDC_SCROLL, 8);
+		ZeroMemory(gdc.s.para + GDC_SCROLL, 4);
 		if (crtmode == 2) {							// ALL
 			crtmode = 2;
 			if ((mem[MEMB_PRXDUPD] & 0x24) == 0x20) {
@@ -509,6 +510,9 @@ void bios0x18_42(REG8 mode) {
 				gdc.s.para[GDC_SCROLL+1] = (200*40) >> 8;
 			}
 		}
+		if (mem[MEMB_PRXDUPD] & 4) {
+			gdc.s.para[GDC_SCROLL+3] = 0x40;
+		}
 		if ((crtmode == 2) || (!(mem[MEMB_PRXCRT] & 0x40))) {
 			gdc.mode1 &= ~(0x10);
 			gdc.s.para[GDC_CSRFORM] = 0;
@@ -526,20 +530,21 @@ void bios0x18_42(REG8 mode) {
 		gdcs.disp = (mode >> 4) & 1;
 	}
 	if (!(mode & 0x20)) {
-		gdc.mode1 &= ~0x04;
+		gdc.mode2 &= ~0x04;
 	}
 	else {
 		gdc.mode2 |= 0x04;
 	}
+	gdcs.mode2 = gdc.mode2;
 	gdcs.grphdisp |= GDCSCRN_ALLDRAW2;
 	screenupdate |= 2;
 }
 
 static void setbiosgdc(UINT32 csrw, const GDCVECT *vect, UINT8 ope) {
 
-	gdc.s.para[GDC_CSRW + 0] = (BYTE)csrw;
-	gdc.s.para[GDC_CSRW + 1] = (BYTE)(csrw >> 8);
-	gdc.s.para[GDC_CSRW + 2] = (BYTE)(csrw >> 16);
+	gdc.s.para[GDC_CSRW + 0] = (UINT8)csrw;
+	gdc.s.para[GDC_CSRW + 1] = (UINT8)(csrw >> 8);
+	gdc.s.para[GDC_CSRW + 2] = (UINT8)(csrw >> 16);
 
 	gdc.s.para[GDC_VECTW] = vect->ope;
 	gdc_vectreset(&gdc.s);
@@ -626,7 +631,8 @@ static void bios0x18_47(void) {
 		vect.ope = 0x20 + (ucw.GBDSP & 7);
 		vect.DC[0] = ucw.GBLNG1[0];
 		vect.DC[1] = ucw.GBLNG1[1];
-		data = LOADINTELWORD(ucw.GBLNG2) - 1;
+//		data = LOADINTELWORD(ucw.GBLNG2) - 1;
+		data = LOADINTELWORD(ucw.GBCIR) - 1;
 		STOREINTELWORD(vect.D, data);
 		data >>= 1;
 		STOREINTELWORD(vect.D2, data);
@@ -668,7 +674,7 @@ static void bios0x18_49(void) {
 
 	UCWTBL		ucw;
 	UINT		i;
-	BYTE		pat[8];
+	UINT8		pat[8];
 	UINT16		tmp;
 	GDCVECT		vect;
 	UINT16		GBSX1;
@@ -760,7 +766,7 @@ void bios0x18(void) {
 	}		tmp;
 	int		i;
 
-#if 0
+#if 1
 	TRACEOUT(("int18 AX=%.4x %.4x:%.4x", CPU_AX,
 							MEML_READ16(CPU_SS, CPU_SP+2),
 							MEML_READ16(CPU_SS, CPU_SP)));
@@ -798,7 +804,7 @@ void bios0x18(void) {
 			break;
 
    		case 0x04:						// キー入力状態のセンス
-			CPU_AH = mem[0x00052a + (CPU_AL & 0x0f)];
+			CPU_AH = mem[MEMX_KB_KY_STS + (CPU_AL & 0x0f)];
  			break;
 
    		case 0x05:						// キー入力センス