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| version 1.11, 2004/01/22 01:10:03 | version 1.22, 2004/03/04 17:36:05 |
|---|---|
| Line 2 | Line 2 |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "scsicmd.h" | |
| #include "bios.h" | #include "bios.h" |
| #include "biosmem.h" | #include "biosmem.h" |
| #include "sxsibios.h" | #include "sxsibios.h" |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_mtr.h" | #include "fdd_mtr.h" |
| #include "sxsi.h" | #include "sxsi.h" |
| #include "scsicmd.h" | |
| #include "timing.h" | |
| enum { | enum { |
| Line 18 enum { | Line 17 enum { |
| }; | }; |
| // static UINT8 fdmode = 0; | // ---- FDD |
| static BYTE work[65536]; | |
| static BYTE mtr_c = 0; | |
| static UINT mtr_r = 0; | |
| static BOOL setfdcmode(REG8 drv, REG8 type, REG8 rpm) { | |
| // ---- FDD | if (drv >= 4) { |
| return(FAILURE); | |
| } | |
| if ((rpm) && (!fdc.support144)) { | |
| return(FAILURE); | |
| } | |
| fdc.chgreg = type; | |
| fdc.rpm[drv] = rpm; | |
| if (type & 2) { | |
| CTRL_FDMEDIA = DISKTYPE_2HD; | |
| } | |
| else { | |
| CTRL_FDMEDIA = DISKTYPE_2DD; | |
| } | |
| return(SUCCESS); | |
| } | |
| void fddbios_equip(REG8 type, BOOL clear) { | void fddbios_equip(REG8 type, BOOL clear) { |
| Line 34 void fddbios_equip(REG8 type, BOOL clear | Line 46 void fddbios_equip(REG8 type, BOOL clear |
| if (clear) { | if (clear) { |
| diskequip &= 0x0f00; | diskequip &= 0x0f00; |
| } | } |
| if (type == DISKTYPE_2HD) { | if (type & 1) { |
| diskequip |= 0x0003; | diskequip &= 0xfff0; |
| diskequip |= (fdc.equip & 0x0f); | |
| } | } |
| if (type == DISKTYPE_2DD) { | else { |
| diskequip |= 0x0300; | diskequip &= 0x0fff; |
| diskequip |= (fdc.equip & 0x0f) << 12; | |
| } | } |
| SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); | SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); |
| } | } |
| Line 68 static void biosfd_resultout(UINT32 resu | Line 82 static void biosfd_resultout(UINT32 resu |
| } | } |
| #endif | #endif |
| static BOOL biosfd_seek(BYTE track, BOOL ndensity) { | static BOOL biosfd_seek(REG8 track, BOOL ndensity) { |
| if (ndensity) { | if (ndensity) { |
| if (track < 42) { | if (track < 42) { |
| Line 79 static BOOL biosfd_seek(BYTE track, BOOL | Line 93 static BOOL biosfd_seek(BYTE track, BOOL |
| } | } |
| } | } |
| fdc.ncn = track; | fdc.ncn = track; |
| mtr_c = track; | |
| if (fdd_seek()) { | if (fdd_seek()) { |
| return(FAILURE); | return(FAILURE); |
| } | } |
| return(SUCCESS); | return(SUCCESS); |
| } | } |
| static UINT16 fdfmt_biospara(BYTE fmt, BYTE rpm) { // ver0.31 | static UINT16 fdfmt_biospara(REG8 type, REG8 rpm, REG8 fmt) { |
| UINT seg; | UINT seg; |
| UINT off; | UINT off; |
| Line 96 static UINT16 fdfmt_biospara(BYTE fmt, B | Line 109 static UINT16 fdfmt_biospara(BYTE fmt, B |
| if (n >= 4) { | if (n >= 4) { |
| n = 3; | n = 3; |
| } | } |
| if (CTRL_FDMEDIA == DISKTYPE_2HD) { | if (type & 2) { |
| seg = GETBIOSMEM16(MEMW_F2HD_P_SEG); | seg = GETBIOSMEM16(MEMW_F2HD_P_SEG); |
| off = GETBIOSMEM16(MEMW_F2HD_P_OFF); | off = GETBIOSMEM16(MEMW_F2HD_P_OFF); |
| } | } |
| Line 116 static UINT16 fdfmt_biospara(BYTE fmt, B | Line 129 static UINT16 fdfmt_biospara(BYTE fmt, B |
| if (fmt) { | if (fmt) { |
| off += 2; | off += 2; |
| } | } |
| return(i286_memword_read(seg, LOW16(off))); | return(i286_memword_read(seg, off)); |
| } | } |
| static void change_rpm(BYTE rpm) { // ver0.31 | |
| if (np2cfg.usefd144) { | |
| fdc.rpm = rpm; | |
| } | |
| } | |
| enum { | enum { |
| FDCBIOS_NORESULT, | FDCBIOS_NORESULT, |
| Line 155 static void fdd_int(int result) { | Line 160 static void fdd_int(int result) { |
| case 0x0a: // READ ID | case 0x0a: // READ ID |
| case 0x0d: // フォーマット | case 0x0d: // フォーマット |
| break; | break; |
| default: | default: |
| return; | return; |
| } | } |
| Line 191 static void fdd_int(int result) { | Line 197 static void fdd_int(int result) { |
| fdc.stat[fdc.us] |= FDCRLT_IC0 | FDCRLT_NW; | fdc.stat[fdc.us] |= FDCRLT_IC0 | FDCRLT_NW; |
| fdcsend_error7(); | fdcsend_error7(); |
| break; | break; |
| default: | |
| return; | |
| } | } |
| if (fdc.chgreg & 1) { | |
| mem[0x0055e] &= ~(0x01 << fdc.us); | |
| } | |
| else { | |
| mem[0x0055f] &= ~(0x10 << fdc.us); | |
| } | |
| CPU_IP = BIOSOFST_WAIT; | |
| } | } |
| #if 1 | #if 1 |
| Line 264 static void b0clr(void) { | Line 280 static void b0clr(void) { |
| } | } |
| #endif | #endif |
| static BYTE fdd_operate(BYTE type, BOOL ndensity, BYTE rpm) { // ver0.31 | static REG8 fdd_operate(REG8 type, REG8 rpm, BOOL ndensity) { |
| BYTE ret_ah = 0x60; | REG8 ret_ah = 0x60; |
| UINT16 size; | UINT16 size; |
| UINT16 pos; | UINT16 pos; |
| UINT16 accesssize; | UINT16 accesssize; |
| Line 277 static BYTE fdd_operate(BYTE type, BOOL | Line 293 static BYTE fdd_operate(BYTE type, BOOL |
| BYTE hd; | BYTE hd; |
| int result = FDCBIOS_NORESULT; | int result = FDCBIOS_NORESULT; |
| UINT32 addr; | UINT32 addr; |
| UINT8 mtr_c; | |
| UINT mtr_r; | |
| mtr_c = 0xff; | mtr_c = fdc.ncn; |
| mtr_r = 0; | mtr_r = 0; |
| // とりあえずBIOSの時は無視する | // とりあえずBIOSの時は無視する |
| fdc.mf = 0xff; // ver0.29 | fdc.mf = 0xff; // ver0.29 |
| // TRACE_("int 1Bh", CPU_AH); | // TRACE_("int 1Bh", CPU_AH); |
| change_rpm(rpm); // ver0.31 | if (setfdcmode((REG8)(CPU_AL & 3), type, rpm) != SUCCESS) { |
| return(0x40); | |
| } | |
| if ((CPU_AH & 0x0f) != 0x0a) { | if ((CPU_AH & 0x0f) != 0x0a) { |
| fdc.crcn = 0; | fdc.crcn = 0; |
| } | } |
| if ((CPU_AH & 0x0f) != 0x03) { | if ((CPU_AH & 0x0f) != 0x03) { |
| CTRL_FDMEDIA = type; | if (type & 2) { |
| switch(type) { | if (pic.pi[1].imr & PIC_INT42) { |
| case DISKTYPE_2HD: | return(0x40); |
| if (pic.pi[1].imr & PIC_INT42) { | } |
| return(0xd0); | } |
| } | else { |
| break; | if (pic.pi[1].imr & PIC_INT41) { |
| case DISKTYPE_2DD: | return(0x40); |
| if (pic.pi[1].imr & PIC_INT41) { | } |
| return(0xd0); | |
| } | |
| break; | |
| } | } |
| if (fdc.us != (CPU_AL & 0x03)) { | if (fdc.us != (CPU_AL & 0x03)) { |
| fdc.us = CPU_AL & 0x03; | fdc.us = CPU_AL & 0x03; |
| Line 320 static BYTE fdd_operate(BYTE type, BOOL | Line 337 static BYTE fdd_operate(BYTE type, BOOL |
| return(0x68); // 新センスは 両用ドライブ情報も | return(0x68); // 新センスは 両用ドライブ情報も |
| } | } |
| if (CPU_AH == 0xc4) { // ver0.31 | if (CPU_AH == 0xc4) { // ver0.31 |
| if (np2cfg.usefd144) { | if (fdc.support144) { |
| return(0x6c); | return(0x6c); |
| } | } |
| return(0x68); | return(0x68); |
| Line 361 static BYTE fdd_operate(BYTE type, BOOL | Line 378 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| } | } |
| biosfd_setchrn(); | biosfd_setchrn(); |
| para = fdfmt_biospara(0, rpm); | para = fdfmt_biospara(type, rpm, 0); |
| if (!para) { | if (!para) { |
| ret_ah = 0xd0; | ret_ah = 0xd0; |
| break; | break; |
| Line 385 static BYTE fdd_operate(BYTE type, BOOL | Line 402 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if ((fdc.R++ == (BYTE)para) && (CPU_AH & 0x80) && (!fdc.hd)) { | if ((fdc.R++ == (UINT8)para) && |
| (CPU_AH & 0x80) && (!fdc.hd)) { | |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| fdc.R = 1; | fdc.R = 1; |
| Line 430 static BYTE fdd_operate(BYTE type, BOOL | Line 448 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| if (CPU_AH & 0x80) { // ver0.30 | if (CPU_AH & 0x80) { // ver0.30 |
| ret_ah |= 8; // 1MB/640KB両用ドライブ | ret_ah |= 8; // 1MB/640KB両用ドライブ |
| if ((CPU_AH & 0x40) && | if ((CPU_AH & 0x40) && (fdc.support144)) { |
| (np2cfg.usefd144)) { // ver0.31 | |
| ret_ah |= 4; // 1.44対応ドライブ | ret_ah |= 4; // 1.44対応ドライブ |
| } | } |
| } | } |
| Line 449 static BYTE fdd_operate(BYTE type, BOOL | Line 466 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| } | } |
| biosfd_setchrn(); | biosfd_setchrn(); |
| para = fdfmt_biospara(0, rpm); | para = fdfmt_biospara(type, rpm, 0); |
| if (!para) { | if (!para) { |
| ret_ah = 0xd0; | ret_ah = 0xd0; |
| break; | break; |
| Line 474 static BYTE fdd_operate(BYTE type, BOOL | Line 491 static BYTE fdd_operate(BYTE type, BOOL |
| else { | else { |
| accesssize = size; | accesssize = size; |
| } | } |
| i286_memx_read(addr, fdc.buf, accesssize); | MEML_READ(addr, fdc.buf, accesssize); |
| if (fdd_write()) { | if (fdd_write()) { |
| break; | break; |
| } | } |
| addr += accesssize; | addr += accesssize; |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if ((fdc.R++ == (BYTE)para) && (CPU_AH & 0x80) && (!fdc.hd)) { | if ((fdc.R++ == (UINT8)para) && |
| (CPU_AH & 0x80) && (!fdc.hd)) { | |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| fdc.R = 1; | fdc.R = 1; |
| Line 513 static BYTE fdd_operate(BYTE type, BOOL | Line 531 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| } | } |
| biosfd_setchrn(); | biosfd_setchrn(); |
| para = fdfmt_biospara(0, rpm); | para = fdfmt_biospara(type, rpm, 0); |
| if (!para) { | if (!para) { |
| ret_ah = 0xd0; | ret_ah = 0xd0; |
| break; | break; |
| Line 542 static BYTE fdd_operate(BYTE type, BOOL | Line 560 static BYTE fdd_operate(BYTE type, BOOL |
| if (fdd_read()) { | if (fdd_read()) { |
| break; | break; |
| } | } |
| i286_memx_write(addr, fdc.buf, accesssize); | MEML_WRITE(addr, fdc.buf, accesssize); |
| addr += accesssize; | addr += accesssize; |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if (fdc.R++ == (BYTE)para) { | if (fdc.R++ == (UINT8)para) { |
| if ((CPU_AH & 0x80) && (!fdc.hd)) { | if ((CPU_AH & 0x80) && (!fdc.hd)) { |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| Line 634 static BYTE fdd_operate(BYTE type, BOOL | Line 652 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| fdc.d = CPU_DL; | fdc.d = CPU_DL; |
| fdc.N = CPU_CH; | fdc.N = CPU_CH; |
| para = fdfmt_biospara(1, rpm); | para = fdfmt_biospara(type, rpm, 1); |
| if (!para) { | if (!para) { |
| ret_ah = 0xd0; | ret_ah = 0xd0; |
| break; | break; |
| } | } |
| fdc.sc = (BYTE)para; | fdc.sc = (UINT8)para; |
| fdd_formatinit(); | fdd_formatinit(); |
| pos = CPU_BP; | pos = CPU_BP; |
| for (s=0; s<fdc.sc; s++) { | for (s=0; s<fdc.sc; s++) { |
| i286_memstr_read(CPU_ES, pos, ID, 4); | MEML_READSTR(CPU_ES, pos, ID, 4); |
| fdd_formating(ID); | fdd_formating(ID); |
| pos += 4; | pos += 4; |
| if (ID[3] < 8) { | |
| mtr_r += 128 << ID[3]; | |
| } | |
| else { | |
| mtr_r += 128 << 8; | |
| } | |
| } | } |
| ret_ah = 0x00; | ret_ah = 0x00; |
| break; | break; |
| } | } |
| fdd_int(result); | fdd_int(result); |
| fddmtr_seek(fdc.us, mtr_c, mtr_r); | if (mtr_c != fdc.ncn) { |
| CPU_IP = BIOSOFST_WAIT; // ver0.30 | fddmtr_seek(fdc.us, mtr_c, mtr_r); |
| return(ret_ah); | |
| } | |
| // ---- SASI | |
| static void init_sasi_equip(void) { | |
| UINT16 diskequip; | |
| UINT8 i; | |
| UINT16 bit; | |
| SXSIDEV sxsi; | |
| diskequip = GETBIOSMEM16(MEMW_DISK_EQUIP); | |
| diskequip &= 0xf0ff; | |
| for (i=0x00, bit=0x0100; i<0x02; i++, bit<<=1) { | |
| sxsi = sxsi_getptr(i); | |
| if ((sxsi) && (sxsi->fname[0])) { | |
| diskequip |= bit; | |
| } | |
| } | |
| SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); | |
| } | |
| static void init_scsi_equip(void) { | |
| UINT8 i; | |
| UINT8 bit; | |
| SXSIDEV sxsi; | |
| UINT16 w; | |
| mem[MEMB_DISK_EQUIPS] = 0; | |
| ZeroMemory(&mem[0x00460], 0x20); | |
| for (i=0, bit=1; i<4; i++, bit<<=1) { | |
| sxsi = sxsi_getptr((REG8)(0x20 + i)); | |
| if ((sxsi) && (sxsi->fname[0])) { | |
| mem[MEMB_DISK_EQUIPS] |= bit; | |
| mem[0x00460+i*4] = sxsi->sectors; | |
| mem[0x00461+i*4] = sxsi->surfaces; | |
| switch(sxsi->size) { | |
| case 256: | |
| w = 0 << 12; | |
| break; | |
| case 512: | |
| w = 1 << 12; | |
| break; | |
| default: | |
| w = 2 << 12; | |
| break; | |
| } | |
| w |= 0xc000; | |
| w |= sxsi->cylinders; | |
| SETBIOSMEM16(0x00462+i*4, w); | |
| } | |
| } | |
| } | |
| static BYTE sxsi_pos(long *pos) { | |
| SXSIDEV sxsi; | |
| *pos = 0; | |
| sxsi = sxsi_getptr(CPU_AL); | |
| if (sxsi == NULL) { | |
| return(0x60); | |
| } | |
| if (CPU_AL & 0x80) { | |
| if ((CPU_DL >= sxsi->sectors) || | |
| (CPU_DH >= sxsi->surfaces) || | |
| (CPU_CX >= sxsi->cylinders)) { | |
| return(0xd0); | |
| } | |
| *pos = ((CPU_CX * sxsi->surfaces) + CPU_DH) * sxsi->sectors | |
| + CPU_DL; | |
| } | |
| else { | |
| *pos = (CPU_DL << 16) | CPU_CX; | |
| if (!(CPU_AL & 0x20)) { | |
| (*pos) &= 0x1fffff; | |
| } | |
| if ((*pos) >= sxsi->totals) { | |
| return(0xd0); | |
| } | |
| } | |
| return(0x00); | |
| } | |
| static REG8 sxsidev_format(REG8 drv, SXSIDEV sxsi) { | |
| UINT count; | |
| REG8 ret; | |
| long trk; | |
| long trkmax; | |
| count = timing_getcount(); // 時間を止める | |
| ret = 0; | |
| trk = 0; | |
| trkmax = sxsi->surfaces * sxsi->cylinders; | |
| while(trk < trkmax) { | |
| ret = sxsi_format(drv, trk * sxsi->sectors); | |
| if (ret) { | |
| break; | |
| } | |
| trk++; | |
| } | |
| timing_setcount(count); // 再開 | |
| return(ret); | |
| } | |
| REG8 sxsi_operate(REG8 type) { | |
| SXSIDEV sxsi; | |
| REG8 ret_ah; | |
| long pos; | |
| sxsi = sxsi_getptr(CPU_AL); | |
| if (sxsi == NULL) { | |
| return(0x60); | |
| } | |
| ret_ah = 0x00; | |
| switch(CPU_AH & 0x0f) { | |
| case 0x01: // ベリファイ | |
| case 0x07: // リトラクト | |
| case 0x0f: // リトラクト | |
| break; | |
| case 0x03: // イニシャライズ | |
| if (type == BIOS1B_SASI) { | |
| init_sasi_equip(); | |
| } | |
| else if (type == BIOS1B_SCSI) { | |
| init_scsi_equip(); | |
| } | |
| break; | |
| case 0x04: // センス | |
| ret_ah = 0x00; | |
| if ((CPU_AH == 0x04) && (type == BIOS1B_SASI)) { | |
| ret_ah = 0x04; | |
| } | |
| else if ((CPU_AH == 0x44) && (type == BIOS1B_SCSI)) { | |
| CPU_BX = 1; | |
| } | |
| else if (CPU_AH == 0x84) { | |
| CPU_BX = sxsi->size; | |
| CPU_CX = sxsi->cylinders; | |
| CPU_DH = sxsi->surfaces; | |
| CPU_DL = sxsi->sectors; | |
| } | |
| break; | |
| case 0x05: // データの書き込み | |
| i286_memx_read(ES_BASE + CPU_BP, work, CPU_BX); | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_write(CPU_AL, pos, work, CPU_BX); | |
| } | |
| break; | |
| case 0x06: // データの読み込み | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_read(CPU_AL, pos, work, CPU_BX); | |
| if (ret_ah < 0x20) { | |
| i286_memx_write(ES_BASE + CPU_BP, work, CPU_BX); | |
| } | |
| } | |
| break; | |
| case 0x0a: // セクタ長設定 | |
| if ((type == BIOS1B_SCSI) && | |
| (sxsi->size == (128 << (CPU_BH & 3)))) { | |
| ret_ah = 0x00; | |
| } | |
| else { | |
| ret_ah = 0x40; | |
| } | |
| break; | |
| case 0x0c: // 代替情報取得 | |
| if (type == BIOS1B_SCSI) { | |
| ret_ah = 0x00; | |
| CPU_CX = 0; | |
| } | |
| else { | |
| ret_ah = 0x40; | |
| } | |
| break; | |
| case 0x0d: // フォーマット | |
| if (CPU_AH & 0x80) { | |
| ret_ah = sxsidev_format(CPU_AL, sxsi); | |
| } | |
| else { | |
| if (CPU_DL) { | |
| ret_ah = 0x30; | |
| break; | |
| } | |
| i286_memstr_read(CPU_ES, CPU_BP, work, CPU_BX); | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_format(CPU_AL, pos); | |
| } | |
| } | |
| break; | |
| default: | |
| ret_ah = 0x40; | |
| break; | |
| } | } |
| return(ret_ah); | return(ret_ah); |
| } | } |
| Line 875 REG8 sxsi_operate(REG8 type) { | Line 684 REG8 sxsi_operate(REG8 type) { |
| // -------------------------------------------------------------------- BIOS | // -------------------------------------------------------------------- BIOS |
| static UINT16 boot_fd1(BYTE rpm) { // ver0.31 | static UINT16 boot_fd1(REG8 type, REG8 rpm) { |
| UINT remain; | UINT remain; |
| UINT size; | UINT size; |
| UINT32 pos; | UINT32 pos; |
| UINT16 bootseg; | UINT16 bootseg; |
| change_rpm(rpm); // ver0.31 | if (setfdcmode(fdc.us, type, rpm) != SUCCESS) { |
| return(0); | |
| } | |
| if (biosfd_seek(0, 0)) { | if (biosfd_seek(0, 0)) { |
| return(0); | return(0); |
| } | } |
| Line 926 static UINT16 boot_fd1(BYTE rpm) { | Line 737 static UINT16 boot_fd1(BYTE rpm) { |
| return(bootseg); | return(bootseg); |
| } | } |
| static UINT16 boot_fd(BYTE drv, BYTE type) { // ver0.27 | static UINT16 boot_fd(REG8 drv, REG8 type) { // ver0.27 |
| UINT16 bootseg; | UINT16 bootseg; |
| if (drv >= 4) { | if (drv >= 4) { |
| return(0); | return(0); |
| } | } |
| fdc.us = drv & 3; | fdc.us = drv; |
| if (!fdd_diskready(fdc.us)) { | if (!fdd_diskready(fdc.us)) { |
| return(0); | return(0); |
| } | } |
| // 2HD | // 2HD |
| if (type & 1) { | if (type & 1) { |
| CTRL_FDMEDIA = DISKTYPE_2HD; | |
| // 1.25MB | // 1.25MB |
| bootseg = boot_fd1(0); | bootseg = boot_fd1(3, 0); |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (UINT8)(0x90 + drv); | mem[MEMB_DISK_BOOT] = (UINT8)(0x90 + drv); |
| fddbios_equip(DISKTYPE_2HD, TRUE); | fddbios_equip(3, TRUE); |
| return(bootseg); | return(bootseg); |
| } | } |
| // 1.44MB | // 1.44MB |
| bootseg = boot_fd1(1); | bootseg = boot_fd1(3, 1); |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (UINT8)(0x30 + drv); | mem[MEMB_DISK_BOOT] = (UINT8)(0x30 + drv); |
| fddbios_equip(DISKTYPE_2HD, TRUE); | fddbios_equip(3, TRUE); |
| return(bootseg); | return(bootseg); |
| } | } |
| } | } |
| if (type & 2) { // ver0.29 | if (type & 2) { // ver0.29 |
| // 2DD | // 2DD |
| CTRL_FDMEDIA = DISKTYPE_2DD; | bootseg = boot_fd1(0, 0); |
| bootseg = boot_fd1(0); | |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (BYTE)(0x70 + drv); | mem[MEMB_DISK_BOOT] = (BYTE)(0x70 + drv); |
| fddbios_equip(DISKTYPE_2DD, TRUE); | fddbios_equip(0, TRUE); |
| return(bootseg); | return(bootseg); |
| } | } |
| } | } |
| Line 971 static UINT16 boot_fd(BYTE drv, BYTE typ | Line 780 static UINT16 boot_fd(BYTE drv, BYTE typ |
| static REG16 boot_hd(REG8 drv) { | static REG16 boot_hd(REG8 drv) { |
| BYTE ret; | REG8 ret; |
| ret = sxsi_read(drv, 0, mem + 0x1fc00, 0x400); | ret = sxsi_read(drv, 0, mem + 0x1fc00, 0x400); |
| if (ret < 0x20) { | if (ret < 0x20) { |
| Line 1039 REG16 bootstrapload(void) { | Line 848 REG16 bootstrapload(void) { |
| for (i=0; (i<4) && (!bootseg); i++) { | for (i=0; (i<4) && (!bootseg); i++) { |
| bootseg = boot_hd((REG8)(0xa0 + i)); | bootseg = boot_hd((REG8)(0xa0 + i)); |
| } | } |
| // init_fdd_equip(); | |
| // init_sasi_equip(); | |
| // init_scsi_equip(); | |
| return(bootseg); | return(bootseg); |
| } | } |
| // -------------------------------------------------------------------------- | // -------------------------------------------------------------------------- |
| void bios0x1b(void) { | void bios0x1b(void) { |
| BYTE ret_ah; | REG8 ret_ah; |
| REG8 flag; | REG8 flag; |
| #if defined(SUPPORT_SCSI) | #if defined(SUPPORT_SCSI) |
| Line 1084 void bios0x1b(void) { | Line 890 void bios0x1b(void) { |
| i286_memword_write(CPU_SS, sp - 14, CPU_CX); // +4 | i286_memword_write(CPU_SS, sp - 14, CPU_CX); // +4 |
| i286_memword_write(CPU_SS, sp - 16, CPU_BX); // +2 | i286_memword_write(CPU_SS, sp - 16, CPU_BX); // +2 |
| i286_memword_write(CPU_SS, sp - 18, CPU_AX); // +0 | i286_memword_write(CPU_SS, sp - 18, CPU_AX); // +0 |
| #if 0 | |
| TRACEOUT(("bypass to %.4x:0018", seg << 8)); | TRACEOUT(("bypass to %.4x:0018", seg << 8)); |
| TRACEOUT(("AX=%04x BX=%04x %02x:%02x:%02x:%02x ES=%04x BP=%04x", | TRACEOUT(("AX=%04x BX=%04x %02x:%02x:%02x:%02x ES=%04x BP=%04x", |
| CPU_AX, CPU_BX, CPU_CL, CPU_DH, CPU_DL, CPU_CH, | CPU_AX, CPU_BX, CPU_CL, CPU_DH, CPU_DL, CPU_CH, |
| CPU_ES, CPU_BP)); | CPU_ES, CPU_BP)); |
| #endif | |
| sp -= 18; | sp -= 18; |
| CPU_SP = sp; | CPU_SP = sp; |
| CPU_BP = sp; | CPU_BP = sp; |
| Line 1103 void bios0x1b(void) { | Line 911 void bios0x1b(void) { |
| switch(CPU_AL & 0xf0) { | switch(CPU_AL & 0xf0) { |
| case 0x90: | case 0x90: |
| ret_ah = fdd_operate(DISKTYPE_2HD, 0, 0); | ret_ah = fdd_operate(3, 0, 0); |
| break; | break; |
| case 0x30: | case 0x30: |
| case 0xb0: | case 0xb0: |
| ret_ah = fdd_operate(DISKTYPE_2HD, 0, 1); | ret_ah = fdd_operate(3, 1, 0); |
| break; | break; |
| case 0x10: | case 0x10: |
| ret_ah = fdd_operate(1, 0, 0); | |
| break; | |
| case 0x70: | case 0x70: |
| case 0xf0: | case 0xf0: |
| ret_ah = fdd_operate(DISKTYPE_2DD, 0, 0); | ret_ah = fdd_operate(0, 0, 0); |
| break; | break; |
| case 0x50: | case 0x50: |
| ret_ah = fdd_operate(DISKTYPE_2DD, 1, 0); | ret_ah = fdd_operate(0, 0, 1); |
| break; | break; |
| case 0x00: | case 0x00: |
| case 0x80: | case 0x80: |
| // ret_ah = sxsi_operate(BIOS1B_SASI); | |
| ret_ah = sasibios_operate(); | ret_ah = sasibios_operate(); |
| break; | break; |
| #if defined(SUPPORT_SCSI) | #if defined(SUPPORT_SCSI) |
| case 0x20: | case 0x20: |
| case 0xa0: | case 0xa0: |
| // ret_ah = sxsi_operate(BIOS1B_SCSI); | |
| ret_ah = scsibios_operate(); | ret_ah = scsibios_operate(); |
| break; | break; |
| #endif | #endif |
| Line 1140 void bios0x1b(void) { | Line 949 void bios0x1b(void) { |
| break; | break; |
| } | } |
| #if 0 | #if 0 |
| { | |
| static BYTE p = 0; | |
| if ((CPU_CL == 0x4d) && (ret_ah == 0xe0)) { | |
| if (!p) { | |
| trace_sw = 1; | |
| p++; | |
| debug_status(); | |
| memorydump(); | |
| } | |
| } | |
| } | |
| #endif | |
| #if 1 | |
| TRACEOUT(("%04x:%04x AX=%04x BX=%04x %02x:%02x:%02x:%02x\n" \ | TRACEOUT(("%04x:%04x AX=%04x BX=%04x %02x:%02x:%02x:%02x\n" \ |
| "ES=%04x BP=%04x \nret=%02x", | "ES=%04x BP=%04x \nret=%02x", |
| i286_memword_read(CPU_SS, CPU_SP+2), | i286_memword_read(CPU_SS, CPU_SP+2), |