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| version 1.31, 2005/02/07 14:46:07 | version 1.32, 2005/02/27 15:07:36 |
|---|---|
| Line 873 void bios0x1b(void) { | Line 873 void bios0x1b(void) { |
| REG8 ret_ah; | REG8 ret_ah; |
| REG8 flag; | REG8 flag; |
| #if defined(SUPPORT_SCSI) | |
| if ((CPU_AL & 0xf0) == 0xc0) { | |
| TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x", | |
| MEML_READ16(CPU_SS, CPU_SP+2), | |
| MEML_READ16(CPU_SS, CPU_SP), | |
| CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP)); | |
| scsicmd_bios(); | |
| return; | |
| } | |
| #endif | |
| #if 1 // bypass to disk bios | #if 1 // bypass to disk bios |
| { | |
| REG8 seg; | REG8 seg; |
| UINT sp; | UINT sp; |
| Line 920 void bios0x1b(void) { | Line 908 void bios0x1b(void) { |
| CPU_IP = 0x18; | CPU_IP = 0x18; |
| return; | return; |
| } | } |
| } | #endif |
| #if defined(SUPPORT_SCSI) | |
| if ((CPU_AL & 0xf0) == 0xc0) { | |
| TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x", | |
| MEML_READ16(CPU_SS, CPU_SP+2), | |
| MEML_READ16(CPU_SS, CPU_SP), | |
| CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP)); | |
| scsicmd_bios(); | |
| return; | |
| } | |
| #endif | #endif |
| switch(CPU_AL & 0xf0) { | switch(CPU_AL & 0xf0) { |