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| version 1.31, 2005/02/07 14:46:07 | version 1.33, 2005/05/13 05:46:24 |
|---|---|
| Line 334 static REG8 fdd_operate(REG8 type, REG8 | Line 334 static REG8 fdd_operate(REG8 type, REG8 |
| } | } |
| if (!fdd_diskready(fdc.us)) { | if (!fdd_diskready(fdc.us)) { |
| fdd_int(FDCBIOS_NONREADY); | fdd_int(FDCBIOS_NONREADY); |
| if (CPU_AH == 0x84) { | ret_ah = 0x60; |
| return(0x68); // 新センスは 両用ドライブ情報も | if ((CPU_AX & 0x8f40) == 0x8400) { |
| } | ret_ah |= 8; // 1MB/640KB両用ドライブ |
| if (CPU_AH == 0xc4) { // ver0.31 | if ((CPU_AH & 0x40) && (fdc.support144)) { |
| if (fdc.support144) { | ret_ah |= 4; // 1.44対応ドライブ |
| return(0x6c); | |
| } | } |
| return(0x68); | |
| } | } |
| return(0x60); | return(ret_ah); |
| } | } |
| } | } |
| Line 444 static REG8 fdd_operate(REG8 type, REG8 | Line 442 static REG8 fdd_operate(REG8 type, REG8 |
| if (mem[fmode] & (0x01 << fdc.us)) { | if (mem[fmode] & (0x01 << fdc.us)) { |
| ret_ah |= 0x01; | ret_ah |= 0x01; |
| } | } |
| if (mem[fmode] & (0x10 << fdc.us)) { // ver0.30 | if (mem[fmode] & (0x10 << fdc.us)) { |
| ret_ah |= 0x04; | ret_ah |= 0x04; |
| } | } |
| } | } |
| if (CPU_AH & 0x80) { // ver0.30 | if ((CPU_AX & 0x8f40) == 0x8400) { |
| ret_ah |= 8; // 1MB/640KB両用ドライブ | ret_ah |= 8; // 1MB/640KB両用ドライブ |
| if ((CPU_AH & 0x40) && (fdc.support144)) { | if ((CPU_AH & 0x40) && (fdc.support144)) { |
| ret_ah |= 4; // 1.44対応ドライブ | ret_ah |= 4; // 1.44対応ドライブ |
| Line 873 void bios0x1b(void) { | Line 871 void bios0x1b(void) { |
| REG8 ret_ah; | REG8 ret_ah; |
| REG8 flag; | REG8 flag; |
| #if defined(SUPPORT_SCSI) | |
| if ((CPU_AL & 0xf0) == 0xc0) { | |
| TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x", | |
| MEML_READ16(CPU_SS, CPU_SP+2), | |
| MEML_READ16(CPU_SS, CPU_SP), | |
| CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP)); | |
| scsicmd_bios(); | |
| return; | |
| } | |
| #endif | |
| #if 1 // bypass to disk bios | #if 1 // bypass to disk bios |
| { | |
| REG8 seg; | REG8 seg; |
| UINT sp; | UINT sp; |
| Line 920 void bios0x1b(void) { | Line 906 void bios0x1b(void) { |
| CPU_IP = 0x18; | CPU_IP = 0x18; |
| return; | return; |
| } | } |
| } | #endif |
| #if defined(SUPPORT_SCSI) | |
| if ((CPU_AL & 0xf0) == 0xc0) { | |
| TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x", | |
| MEML_READ16(CPU_SS, CPU_SP+2), | |
| MEML_READ16(CPU_SS, CPU_SP), | |
| CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP)); | |
| scsicmd_bios(); | |
| return; | |
| } | |
| #endif | #endif |
| switch(CPU_AL & 0xf0) { | switch(CPU_AL & 0xf0) { |