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| version 1.8, 2003/12/28 14:33:34 | version 1.15, 2004/01/28 23:36:13 |
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| Line 2 | Line 2 |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "scsicmd.h" | |
| #include "bios.h" | #include "bios.h" |
| #include "biosmem.h" | #include "biosmem.h" |
| #include "sxsibios.h" | |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_mtr.h" | #include "fdd_mtr.h" |
| #include "sxsi.h" | #include "sxsi.h" |
| Line 15 enum { | Line 17 enum { |
| }; | }; |
| char fdmode = 0; | |
| static BYTE work[65536]; | |
| static BYTE mtr_c = 0; | static BYTE mtr_c = 0; |
| static UINT mtr_r = 0; | static UINT mtr_r = 0; |
| // ---- FDD | // ---- FDD |
| static void init_fdd_equip(void) { | void fddbios_equip(REG8 type, BOOL clear) { |
| UINT16 diskequip; | REG16 diskequip; |
| diskequip = GETBIOSMEM16(MEMW_DISK_EQUIP); | diskequip = GETBIOSMEM16(MEMW_DISK_EQUIP); |
| diskequip &= 0x0f00; | if (clear) { |
| diskequip |= (UINT16)(~fdmode) & 3; | diskequip &= 0x0f00; |
| diskequip |= (UINT16)fdmode << 12; | } |
| if (type == DISKTYPE_2HD) { | |
| diskequip |= 0x0003; | |
| } | |
| if (type == DISKTYPE_2DD) { | |
| diskequip |= 0x0300; | |
| } | |
| SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); | SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); |
| } | } |
| Line 59 static void biosfd_resultout(UINT32 resu | Line 65 static void biosfd_resultout(UINT32 resu |
| } | } |
| #endif | #endif |
| static BOOL biosfd_seek(BYTE track, BOOL ndensity) { | static BOOL biosfd_seek(REG8 track, BOOL ndensity) { |
| if (ndensity) { | if (ndensity) { |
| if (track < 42) { | if (track < 42) { |
| Line 77 static BOOL biosfd_seek(BYTE track, BOOL | Line 83 static BOOL biosfd_seek(BYTE track, BOOL |
| return(SUCCESS); | return(SUCCESS); |
| } | } |
| static UINT16 fdfmt_biospara(BYTE fmt, BYTE rpm) { // ver0.31 | static UINT16 fdfmt_biospara(REG8 fmt, REG8 rpm) { // ver0.31 |
| UINT seg; | UINT seg; |
| UINT off; | UINT off; |
| Line 107 static UINT16 fdfmt_biospara(BYTE fmt, B | Line 113 static UINT16 fdfmt_biospara(BYTE fmt, B |
| if (fmt) { | if (fmt) { |
| off += 2; | off += 2; |
| } | } |
| return(i286_memword_read(seg, LOW16(off))); | return(i286_memword_read(seg, off)); |
| } | } |
| static void change_rpm(BYTE rpm) { // ver0.31 | static void change_rpm(REG8 rpm) { // ver0.31 |
| if (np2cfg.usefd144) { | if (np2cfg.usefd144) { |
| fdc.rpm = rpm; | fdc.rpm = rpm; |
| Line 255 static void b0clr(void) { | Line 261 static void b0clr(void) { |
| } | } |
| #endif | #endif |
| static BYTE fdd_operate(BYTE type, BOOL ndensity, BYTE rpm) { // ver0.31 | static REG8 fdd_operate(REG8 type, BOOL ndensity, REG8 rpm) { // ver0.31 |
| BYTE ret_ah = 0x60; | REG8 ret_ah = 0x60; |
| UINT16 size; | UINT16 size; |
| UINT16 pos; | UINT16 pos; |
| UINT16 accesssize; | UINT16 accesssize; |
| Line 376 static BYTE fdd_operate(BYTE type, BOOL | Line 382 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if ((fdc.R++ == (BYTE)para) && (CPU_AH & 0x80) && (!fdc.hd)) { | if ((fdc.R++ == (UINT8)para) && |
| (CPU_AH & 0x80) && (!fdc.hd)) { | |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| fdc.R = 1; | fdc.R = 1; |
| Line 396 static BYTE fdd_operate(BYTE type, BOOL | Line 403 static BYTE fdd_operate(BYTE type, BOOL |
| break; | break; |
| case 0x03: // 初期化 | case 0x03: // 初期化 |
| init_fdd_equip(); | fddbios_equip(type, FALSE); |
| ret_ah = 0x00; | ret_ah = 0x00; |
| break; | break; |
| Line 472 static BYTE fdd_operate(BYTE type, BOOL | Line 479 static BYTE fdd_operate(BYTE type, BOOL |
| addr += accesssize; | addr += accesssize; |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if ((fdc.R++ == (BYTE)para) && (CPU_AH & 0x80) && (!fdc.hd)) { | if ((fdc.R++ == (UINT8)para) && |
| (CPU_AH & 0x80) && (!fdc.hd)) { | |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| fdc.R = 1; | fdc.R = 1; |
| Line 537 static BYTE fdd_operate(BYTE type, BOOL | Line 545 static BYTE fdd_operate(BYTE type, BOOL |
| addr += accesssize; | addr += accesssize; |
| size -= accesssize; | size -= accesssize; |
| mtr_r += accesssize; // ver0.26 | mtr_r += accesssize; // ver0.26 |
| if (fdc.R++ == (BYTE)para) { | if (fdc.R++ == (UINT8)para) { |
| if ((CPU_AH & 0x80) && (!fdc.hd)) { | if ((CPU_AH & 0x80) && (!fdc.hd)) { |
| fdc.hd = 1; | fdc.hd = 1; |
| fdc.H = 1; | fdc.H = 1; |
| Line 630 static BYTE fdd_operate(BYTE type, BOOL | Line 638 static BYTE fdd_operate(BYTE type, BOOL |
| ret_ah = 0xd0; | ret_ah = 0xd0; |
| break; | break; |
| } | } |
| fdc.sc = (BYTE)para; | fdc.sc = (UINT8)para; |
| fdd_formatinit(); | fdd_formatinit(); |
| pos = CPU_BP; | pos = CPU_BP; |
| for (s=0; s<fdc.sc; s++) { | for (s=0; s<fdc.sc; s++) { |
| i286_memstr_read(CPU_ES, pos, ID, 4); | i286_memstr_read(CPU_ES, pos, ID, 4); |
| fdd_formating(ID); | fdd_formating(ID); |
| pos += 4; | pos += 4; |
| if (ID[3] < 8) { | |
| mtr_r += 128 << ID[3]; | |
| } | |
| else { | |
| mtr_r += 128 << 8; | |
| } | |
| } | } |
| ret_ah = 0x00; | ret_ah = 0x00; |
| break; | break; |
| Line 648 static BYTE fdd_operate(BYTE type, BOOL | Line 662 static BYTE fdd_operate(BYTE type, BOOL |
| } | } |
| // ---- SASI | |
| static void init_sasi_equip(void) { | |
| UINT16 diskequip; | |
| UINT i; | |
| UINT16 bit; | |
| diskequip = GETBIOSMEM16(MEMW_DISK_EQUIP); | |
| diskequip &= 0xf0ff; | |
| for (i=0, bit=0x0100; i<2; i++, bit<<=1) { | |
| if (sxsi_hd[i].fname[0]) { | |
| diskequip |= bit; | |
| } | |
| } | |
| SETBIOSMEM16(MEMW_DISK_EQUIP, diskequip); | |
| } | |
| static void init_scsi_equip(void) { | |
| UINT i; | |
| BYTE bit; | |
| UINT16 w; | |
| mem[MEMB_DISK_EQUIPS] = 0; | |
| ZeroMemory(&mem[0x00460], 0x20); | |
| for (i=0, bit=1; i<2; i++, bit<<=1) { | |
| if (sxsi_hd[i+2].fname[0]) { | |
| mem[MEMB_DISK_EQUIPS] |= bit; | |
| mem[0x00460+i*4] = sxsi_hd[i+2].sectors; | |
| mem[0x00461+i*4] = sxsi_hd[i+2].surfaces; | |
| switch(sxsi_hd[i+2].size) { | |
| case 256: | |
| w = 0 << 12; | |
| break; | |
| case 512: | |
| w = 1 << 12; | |
| break; | |
| default: | |
| w = 2 << 12; | |
| break; | |
| } | |
| w |= sxsi_hd[i+2].tracks; | |
| SETBIOSMEM16(0x00462+i*4, w); | |
| } | |
| } | |
| } | |
| static BYTE sxsi_pos(long *pos) { | |
| SXSIHDD sxsi; | |
| int np2drv; | |
| *pos = 0; | |
| np2drv = (CPU_AL & 0x20) >> 4; | |
| if ((CPU_AL & 0x0f) >= 2) { | |
| return(0x60); | |
| } | |
| np2drv |= (CPU_AL & 1); | |
| sxsi = &sxsi_hd[np2drv]; | |
| if (CPU_AL & 0x80) { | |
| if ((CPU_DL >= sxsi->sectors) || | |
| (CPU_DH >= sxsi->surfaces) || | |
| (CPU_CX >= sxsi->tracks)) { | |
| return(0xd0); | |
| } | |
| (*pos) = ((CPU_CX * sxsi->surfaces) + CPU_DH) * sxsi->sectors | |
| + CPU_DL; | |
| } | |
| else { | |
| *pos = (CPU_DL << 16) | CPU_CX; | |
| if (!(CPU_AL & 0x20)) { | |
| (*pos) &= 0x1fffff; | |
| } | |
| if ((*pos) >= sxsi->totals) { | |
| return(0xd0); | |
| } | |
| } | |
| return(0x00); | |
| } | |
| UINT8 sxsi_operate(UINT8 type) { | |
| BYTE ret_ah = 0x00; | |
| BYTE drv; | |
| long pos; | |
| // int i; | |
| drv = (CPU_AL & 0x20) >> 4; | |
| if ((CPU_AL & 0x0f) >= 2) { | |
| return(0x60); | |
| } | |
| drv |= (CPU_AL & 1); | |
| switch(CPU_AH & 0x0f) { | |
| case 0x01: // ベリファイ | |
| case 0x07: // リトラクト | |
| case 0x0f: // リトラクト | |
| break; | |
| case 0x03: // イニシャライズ | |
| if (type == HDDTYPE_SASI) { | |
| init_sasi_equip(); | |
| } | |
| else if (type == HDDTYPE_SCSI) { | |
| init_scsi_equip(); | |
| } | |
| break; | |
| case 0x04: // センス | |
| ret_ah = 0x00; | |
| if ((CPU_AH == 0x04) && (type == HDDTYPE_SASI)) { | |
| ret_ah = 0x04; | |
| } | |
| else if ((CPU_AH == 0x44) && (type == HDDTYPE_SCSI)) { | |
| CPU_BX = 1; | |
| } | |
| else if (CPU_AH == 0x84) { | |
| CPU_BX = sxsi_hd[drv].size; | |
| CPU_CX = sxsi_hd[drv].tracks; | |
| CPU_DH = sxsi_hd[drv].surfaces; | |
| CPU_DL = sxsi_hd[drv].sectors; | |
| } | |
| break; | |
| case 0x05: // データの書き込み | |
| i286_memx_read(ES_BASE + CPU_BP, work, CPU_BX); | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_write(CPU_AL, pos, work, CPU_BX); | |
| } | |
| break; | |
| case 0x06: // データの読み込み | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_read(CPU_AL, pos, work, CPU_BX); | |
| if (ret_ah < 0x20) { | |
| i286_memx_write(ES_BASE + CPU_BP, work, CPU_BX); | |
| } | |
| } | |
| break; | |
| case 0x0d: // フォーマット | |
| if (CPU_DL) { | |
| ret_ah = 0x30; | |
| break; | |
| } | |
| i286_memstr_read(CPU_ES, CPU_BP, work, CPU_BX); | |
| ret_ah = sxsi_pos(&pos); | |
| if (!ret_ah) { | |
| ret_ah = sxsi_format(CPU_AL, pos); | |
| } | |
| break; | |
| default: | |
| ret_ah = 0x40; | |
| break; | |
| } | |
| return(ret_ah); | |
| } | |
| // -------------------------------------------------------------------- BIOS | // -------------------------------------------------------------------- BIOS |
| static UINT16 boot_fd1(BYTE rpm) { // ver0.31 | static UINT16 boot_fd1(REG8 rpm) { // ver0.31 |
| UINT remain; | UINT remain; |
| UINT size; | UINT size; |
| Line 867 static UINT16 boot_fd1(BYTE rpm) { | Line 715 static UINT16 boot_fd1(BYTE rpm) { |
| return(bootseg); | return(bootseg); |
| } | } |
| static UINT16 boot_fd(BYTE drv, BYTE type) { // ver0.27 | static UINT16 boot_fd(REG8 drv, REG8 type) { // ver0.27 |
| UINT16 bootseg; | UINT16 bootseg; |
| Line 885 static UINT16 boot_fd(BYTE drv, BYTE typ | Line 733 static UINT16 boot_fd(BYTE drv, BYTE typ |
| // 1.25MB | // 1.25MB |
| bootseg = boot_fd1(0); | bootseg = boot_fd1(0); |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (BYTE)(0x90+drv); | mem[MEMB_DISK_BOOT] = (UINT8)(0x90 + drv); |
| fddbios_equip(DISKTYPE_2HD, TRUE); | |
| return(bootseg); | return(bootseg); |
| } | } |
| // 1.44MB | // 1.44MB |
| bootseg = boot_fd1(1); | bootseg = boot_fd1(1); |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (BYTE)(0x30+drv); | mem[MEMB_DISK_BOOT] = (UINT8)(0x30 + drv); |
| fddbios_equip(DISKTYPE_2HD, TRUE); | |
| return(bootseg); | return(bootseg); |
| } | } |
| } | } |
| Line 900 static UINT16 boot_fd(BYTE drv, BYTE typ | Line 750 static UINT16 boot_fd(BYTE drv, BYTE typ |
| CTRL_FDMEDIA = DISKTYPE_2DD; | CTRL_FDMEDIA = DISKTYPE_2DD; |
| bootseg = boot_fd1(0); | bootseg = boot_fd1(0); |
| if (bootseg) { | if (bootseg) { |
| mem[MEMB_DISK_BOOT] = (BYTE)(0x70+drv); | mem[MEMB_DISK_BOOT] = (BYTE)(0x70 + drv); |
| fdmode = 3; | fddbios_equip(DISKTYPE_2DD, TRUE); |
| return(bootseg); | return(bootseg); |
| } | } |
| } | } |
| return(0); | return(0); |
| } | } |
| static UINT16 boot_hd(BYTE drv) { // ver0.27 | static REG16 boot_hd(REG8 drv) { |
| BYTE ret; | REG8 ret; |
| ret = sxsi_read(drv, 0, mem + 0x1fc00, 0x400); | ret = sxsi_read(drv, 0, mem + 0x1fc00, 0x400); |
| if (ret < 0x20) { | if (ret < 0x20) { |
| Line 920 static UINT16 boot_hd(BYTE drv) { | Line 770 static UINT16 boot_hd(BYTE drv) { |
| return(0); | return(0); |
| } | } |
| UINT16 bootstrapload(void) { // ver0.27 | REG16 bootstrapload(void) { |
| BYTE i; | BYTE i; |
| UINT16 bootseg; | REG16 bootseg; |
| fdmode = 0; | // fdmode = 0; |
| bootseg = 0; | bootseg = 0; |
| switch(mem[MEMB_MSW5] & 0xf0) { // うぐぅ…本当はALレジスタの値から | switch(mem[MEMB_MSW5] & 0xf0) { // うぐぅ…本当はALレジスタの値から |
| case 0x00: // ノーマル | case 0x00: // ノーマル |
| break; | break; |
| case 0x20: // 640KB FDD | case 0x20: // 640KB FDD |
| for (i=0; (i<4) && (!bootseg); i++) { | for (i=0; (i<4) && (!bootseg); i++) { |
| if (fdd_diskready(i)) { | if (fdd_diskready(i)) { |
| Line 937 UINT16 bootstrapload(void) { // | Line 788 UINT16 bootstrapload(void) { // |
| } | } |
| } | } |
| break; | break; |
| case 0x40: // 1.2MB FDD | case 0x40: // 1.2MB FDD |
| for (i=0; (i<4) && (!bootseg); i++) { | for (i=0; (i<4) && (!bootseg); i++) { |
| if (fdd_diskready(i)) { | if (fdd_diskready(i)) { |
| Line 944 UINT16 bootstrapload(void) { // | Line 796 UINT16 bootstrapload(void) { // |
| } | } |
| } | } |
| break; | break; |
| case 0x60: // MO | case 0x60: // MO |
| break; | break; |
| case 0xa0: // SASI 1 | case 0xa0: // SASI 1 |
| if (sxsi_hd[0].fname[0]) { | bootseg = boot_hd(0x80); |
| bootseg = boot_hd(0x80); | |
| } | |
| break; | break; |
| case 0xb0: // SASI 2 | case 0xb0: // SASI 2 |
| if (sxsi_hd[1].fname[0]) { | bootseg = boot_hd(0x81); |
| bootseg = boot_hd(0x81); | |
| } | |
| break; | break; |
| case 0xc0: // SCSI | case 0xc0: // SCSI |
| for (i=0; (i<2) && (!bootseg); i++) { | for (i=0; (i<4) && (!bootseg); i++) { |
| if (sxsi_hd[i+2].fname[0]) { | bootseg = boot_hd((REG8)(0xa0 + i)); |
| bootseg = boot_hd((BYTE)(0xa0 | i)); | |
| } | |
| } | } |
| break; | break; |
| default: // ROM | default: // ROM |
| return(0); | return(0); |
| } | } |
| Line 972 UINT16 bootstrapload(void) { // | Line 823 UINT16 bootstrapload(void) { // |
| } | } |
| } | } |
| for (i=0; (i<2) && (!bootseg); i++) { | for (i=0; (i<2) && (!bootseg); i++) { |
| if (sxsi_hd[i].fname[0]) { | bootseg = boot_hd((REG8)(0x80 + i)); |
| bootseg = boot_hd((BYTE)(0x80 | i)); | |
| } | |
| } | } |
| for (i=0; (i<2) && (!bootseg); i++) { | for (i=0; (i<4) && (!bootseg); i++) { |
| if (sxsi_hd[i+2].fname[0]) { | bootseg = boot_hd((REG8)(0xa0 + i)); |
| bootseg = boot_hd((BYTE)(0xa0 | i)); | |
| } | |
| } | } |
| init_fdd_equip(); | |
| init_sasi_equip(); | |
| init_scsi_equip(); | |
| return(bootseg); | return(bootseg); |
| } | } |
| // -------------------------------------------------------------------------- | // -------------------------------------------------------------------------- |
| void bios0x1b(void) { | void bios0x1b(void) { |
| BYTE ret_ah; | REG8 ret_ah; |
| REG8 flag; | REG8 flag; |
| #if defined(SUPPORT_SCSI) | |
| if ((CPU_AL & 0xf0) == 0xc0) { | |
| TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x", | |
| i286_memword_read(CPU_SS, CPU_SP+2), | |
| i286_memword_read(CPU_SS, CPU_SP), | |
| CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP)); | |
| scsicmd_bios(); | |
| return; | |
| } | |
| #endif | |
| #if 1 // bypass to disk bios | |
| { | |
| REG8 seg; | |
| UINT sp; | |
| seg = mem[0x004b0 + (CPU_AL >> 4)]; | |
| if (seg) { | |
| TRACEOUT(("call by %.4x:%.4x", | |
| i286_memword_read(CPU_SS, CPU_SP+2), | |
| i286_memword_read(CPU_SS, CPU_SP))); | |
| sp = CPU_SP; | |
| i286_memword_write(CPU_SS, sp - 2, CPU_DS); | |
| i286_memword_write(CPU_SS, sp - 4, CPU_SI); | |
| i286_memword_write(CPU_SS, sp - 6, CPU_DI); | |
| i286_memword_write(CPU_SS, sp - 8, CPU_ES); // +a | |
| i286_memword_write(CPU_SS, sp - 10, CPU_BP); // +8 | |
| i286_memword_write(CPU_SS, sp - 12, CPU_DX); // +6 | |
| i286_memword_write(CPU_SS, sp - 14, CPU_CX); // +4 | |
| i286_memword_write(CPU_SS, sp - 16, CPU_BX); // +2 | |
| i286_memword_write(CPU_SS, sp - 18, CPU_AX); // +0 | |
| TRACEOUT(("bypass to %.4x:0018", seg << 8)); | |
| TRACEOUT(("AX=%04x BX=%04x %02x:%02x:%02x:%02x ES=%04x BP=%04x", | |
| CPU_AX, CPU_BX, CPU_CL, CPU_DH, CPU_DL, CPU_CH, | |
| CPU_ES, CPU_BP)); | |
| sp -= 18; | |
| CPU_SP = sp; | |
| CPU_BP = sp; | |
| CPU_DS = 0x0000; | |
| CPU_BX = 0x04B0; | |
| CPU_AX = seg << 8; | |
| CPU_CS = seg << 8; | |
| CPU_IP = 0x18; | |
| return; | |
| } | |
| } | |
| #endif | |
| switch(CPU_AL & 0xf0) { | switch(CPU_AL & 0xf0) { |
| case 0x90: | case 0x90: |
| ret_ah = fdd_operate(DISKTYPE_2HD, 0, 0); | ret_ah = fdd_operate(DISKTYPE_2HD, 0, 0); |
| Line 1017 void bios0x1b(void) { | Line 909 void bios0x1b(void) { |
| case 0x00: | case 0x00: |
| case 0x80: | case 0x80: |
| ret_ah = sxsi_operate(HDDTYPE_SASI); | ret_ah = sasibios_operate(); |
| break; | break; |
| #if 0 | |
| #if defined(SUPPORT_SCSI) | |
| case 0x20: | case 0x20: |
| case 0xa0: | case 0xa0: |
| ret_ah = sxsi_operate(HDDTYPE_SCSI); | ret_ah = scsibios_operate(); |
| break; | break; |
| #endif | #endif |
| Line 1031 void bios0x1b(void) { | Line 924 void bios0x1b(void) { |
| break; | break; |
| } | } |
| #if 0 | #if 0 |
| { | |
| static BYTE p = 0; | |
| if ((CPU_CL == 0x4d) && (ret_ah == 0xe0)) { | |
| if (!p) { | |
| trace_sw = 1; | |
| p++; | |
| debug_status(); | |
| memorydump(); | |
| } | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| TRACEOUT(("%04x:%04x AX=%04x BX=%04x %02x:%02x:%02x:%02x\n" \ | TRACEOUT(("%04x:%04x AX=%04x BX=%04x %02x:%02x:%02x:%02x\n" \ |
| "ES=%04x BP=%04x \nret=%02x", | "ES=%04x BP=%04x \nret=%02x", |
| i286_memword_read(CPU_SS, CPU_SP+2), | i286_memword_read(CPU_SS, CPU_SP+2), |