--- np2/bios/bios1b.c	2004/07/15 13:48:39	1.29
+++ np2/bios/bios1b.c	2005/02/27 15:07:36	1.32
@@ -68,12 +68,12 @@ static void biosfd_setchrn(void) {
 #if 0
 static void biosfd_resultout(UINT32 result) {
 
-	BYTE	*ptr;
+	UINT8	*ptr;
 
 	ptr = mem + 0x00564 + (fdc.us*8);
-	ptr[0] = (BYTE)(result & 0xff) | (fdc.hd << 2) | fdc.us;
-	ptr[1] = (BYTE)(result >> 8);
-	ptr[2] = (BYTE)(result >> 16);
+	ptr[0] = (UINT8)(result & 0xff) | (fdc.hd << 2) | fdc.us;
+	ptr[1] = (UINT8)(result >> 8);
+	ptr[2] = (UINT8)(result >> 16);
 	ptr[3] = fdc.C;
 	ptr[4] = fdc.H;
 	ptr[5] = fdc.R;
@@ -288,9 +288,9 @@ static REG8 fdd_operate(REG8 type, REG8 
 	UINT16	accesssize;
 	UINT16	secsize;
 	UINT16	para;
-	BYTE	s;
-	BYTE	ID[4];
-	BYTE	hd;
+	UINT8	s;
+	UINT8	ID[4];
+	UINT8	hd;
 	int		result = FDCBIOS_NORESULT;
 	UINT32	addr;
 	UINT8	mtr_c;
@@ -784,7 +784,7 @@ static UINT16 boot_fd(REG8 drv, REG8 typ
 		// 2DD
 		bootseg = boot_fd1(0, 0);
 		if (bootseg) {
-			mem[MEMB_DISK_BOOT] = (BYTE)(0x70 + drv);
+			mem[MEMB_DISK_BOOT] = (UINT8)(0x70 + drv);
 			fddbios_equip(0, TRUE);
 			return(bootseg);
 		}
@@ -806,7 +806,7 @@ static REG16 boot_hd(REG8 drv) {
 
 REG16 bootstrapload(void) {
 
-	BYTE	i;
+	UINT8	i;
 	REG16	bootseg;
 
 //	fdmode = 0;
@@ -873,19 +873,7 @@ void bios0x1b(void) {
 	REG8	ret_ah;
 	REG8	flag;
 
-#if defined(SUPPORT_SCSI)
-	if ((CPU_AL & 0xf0) == 0xc0) {
-		TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x",
-							MEML_READ16(CPU_SS, CPU_SP+2),
-							MEML_READ16(CPU_SS, CPU_SP),
-							CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP));
-		scsicmd_bios();
-		return;
-	}
-#endif
-
 #if 1			// bypass to disk bios
-{
 	REG8	seg;
 	UINT	sp;
 
@@ -920,7 +908,17 @@ void bios0x1b(void) {
 		CPU_IP = 0x18;
 		return;
 	}
-}
+#endif
+
+#if defined(SUPPORT_SCSI)
+	if ((CPU_AL & 0xf0) == 0xc0) {
+		TRACEOUT(("%.4x:%.4x AX=%.4x BX=%.4x CX=%.4x DX=%.4 ES=%.4x BP=%.4x",
+							MEML_READ16(CPU_SS, CPU_SP+2),
+							MEML_READ16(CPU_SS, CPU_SP),
+							CPU_AX, CPU_BX, CPU_CX, CPU_DX, CPU_ES, CPU_BP));
+		scsicmd_bios();
+		return;
+	}
 #endif
 
 	switch(CPU_AL & 0xf0) {
@@ -962,7 +960,7 @@ void bios0x1b(void) {
 			ret_ah = 0x40;
 			break;
 	}
-#if 1
+#if 0
 	TRACEOUT(("%04x:%04x AX=%04x BX=%04x %02x:%02x:%02x:%02x\n"	\
 						"ES=%04x BP=%04x \nret=%02x",
 							MEML_READ16(CPU_SS, CPU_SP+2),