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| version 1.3, 2004/04/08 13:08:22 | version 1.5, 2005/05/20 13:59:46 |
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| Line 8 | Line 8 |
| static REG8 bios0x1f_90(void) { | static REG8 bios0x1f_90(void) { |
| BYTE work[256]; | UINT8 work[256]; |
| UINT srclimit; | UINT srclimit; |
| UINT srcaddr; | UINT srcaddr; |
| UINT dstlimit; | UINT dstlimit; |
| Line 18 static REG8 bios0x1f_90(void) { | Line 18 static REG8 bios0x1f_90(void) { |
| UINT leng; | UINT leng; |
| UINT l; | UINT l; |
| MEML_READSTR(CPU_ES, CPU_BX + 0x10, work, 0x10); | MEMR_READS(CPU_ES, CPU_BX + 0x10, work, 0x10); |
| srclimit = work[0] + (work[1] << 8) + 1; | srclimit = work[0] + (work[1] << 8) + 1; |
| srcaddr = CPU_SI; | srcaddr = CPU_SI; |
| if (srclimit <= srcaddr) { | if (srclimit <= srcaddr) { |
| Line 42 static REG8 bios0x1f_90(void) { | Line 42 static REG8 bios0x1f_90(void) { |
| if (!l) { | if (!l) { |
| goto p90_err2; | goto p90_err2; |
| } | } |
| MEML_READ(srcbase + srcaddr, work, l); | MEML_READS(srcbase + srcaddr, work, l); |
| MEML_WRITE(dstbase + dstaddr, work, l); | MEML_WRITES(dstbase + dstaddr, work, l); |
| srcaddr = LOW16(srcaddr + l); | srcaddr = LOW16(srcaddr + l); |
| dstaddr = LOW16(dstaddr + l); | dstaddr = LOW16(dstaddr + l); |
| leng -= l; | leng -= l; |
| Line 80 void bios0x1f(void) { | Line 80 void bios0x1f(void) { |
| else { | else { |
| return; | return; |
| } | } |
| flag = (REG8)(MEML_READ8(CPU_SS, CPU_SP + 4) & (~C_FLAG)); | flag = (REG8)(MEMR_READ8(CPU_SS, CPU_SP + 4) & (~C_FLAG)); |
| flag |= cflag; | flag |= cflag; |
| MEML_WRITE8(CPU_SS, CPU_SP + 4, flag); | MEMR_WRITE8(CPU_SS, CPU_SP + 4, flag); |
| } | } |