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| version 1.11, 2004/03/04 15:20:13 | version 1.12, 2004/03/04 16:58:57 |
|---|---|
| Line 49 static REG8 sxsibios_write(UINT type, SX | Line 49 static REG8 sxsibios_write(UINT type, SX |
| REG8 ret; | REG8 ret; |
| UINT size; | UINT size; |
| long pos; | long pos; |
| UINT bp; | UINT32 addr; |
| UINT r; | UINT r; |
| BYTE work[1024]; | BYTE work[1024]; |
| Line 59 static REG8 sxsibios_write(UINT type, SX | Line 59 static REG8 sxsibios_write(UINT type, SX |
| } | } |
| ret = sxsi_pos(type, sxsi, &pos); | ret = sxsi_pos(type, sxsi, &pos); |
| if (!ret) { | if (!ret) { |
| bp = CPU_BP; | addr = (CPU_ES << 4) + CPU_BP; |
| while(size) { | while(size) { |
| r = min(size, sxsi->size); | r = min(size, sxsi->size); |
| i286_memstr_read(CPU_ES, bp, work, r); | MEML_READ(addr, work, r); |
| ret = sxsi_write(CPU_AL, pos, work, r); | ret = sxsi_write(CPU_AL, pos, work, r); |
| if (ret >= 0x20) { | if (ret >= 0x20) { |
| break; | break; |
| } | } |
| addr += r; | |
| size -= r; | size -= r; |
| bp += r; | |
| pos++; | pos++; |
| } | } |
| } | } |
| Line 80 static REG8 sxsibios_read(UINT type, SXS | Line 80 static REG8 sxsibios_read(UINT type, SXS |
| REG8 ret; | REG8 ret; |
| UINT size; | UINT size; |
| long pos; | long pos; |
| UINT bp; | UINT32 addr; |
| UINT r; | UINT r; |
| BYTE work[1024]; | BYTE work[1024]; |
| Line 90 static REG8 sxsibios_read(UINT type, SXS | Line 90 static REG8 sxsibios_read(UINT type, SXS |
| } | } |
| ret = sxsi_pos(type, sxsi, &pos); | ret = sxsi_pos(type, sxsi, &pos); |
| if (!ret) { | if (!ret) { |
| bp = CPU_BP; | addr = (CPU_ES << 4) + CPU_BP; |
| while(size) { | while(size) { |
| r = min(size, sxsi->size); | r = min(size, sxsi->size); |
| ret = sxsi_read(CPU_AL, pos, work, r); | ret = sxsi_read(CPU_AL, pos, work, r); |
| if (ret >= 0x20) { | if (ret >= 0x20) { |
| break; | break; |
| } | } |
| i286_memstr_write(CPU_ES, bp, work, r); | MEML_WRITE(addr, work, r); |
| addr += r; | |
| size -= r; | size -= r; |
| bp += r; | |
| pos++; | pos++; |
| } | } |
| } | } |