|
|
| version 1.17, 2005/03/05 06:02:28 | version 1.18, 2005/05/20 13:59:46 |
|---|---|
| Line 62 static REG8 sxsibios_write(UINT type, SX | Line 62 static REG8 sxsibios_write(UINT type, SX |
| addr = (CPU_ES << 4) + CPU_BP; | addr = (CPU_ES << 4) + CPU_BP; |
| while(size) { | while(size) { |
| r = min(size, sxsi->size); | r = min(size, sxsi->size); |
| MEML_READ(addr, work, r); | MEML_READS(addr, work, r); |
| ret = sxsi_write(CPU_AL, pos, work, r); | ret = sxsi_write(CPU_AL, pos, work, r); |
| if (ret >= 0x20) { | if (ret >= 0x20) { |
| break; | break; |
| Line 97 static REG8 sxsibios_read(UINT type, SXS | Line 97 static REG8 sxsibios_read(UINT type, SXS |
| if (ret >= 0x20) { | if (ret >= 0x20) { |
| break; | break; |
| } | } |
| MEML_WRITE(addr, work, r); | MEML_WRITES(addr, work, r); |
| addr += r; | addr += r; |
| size -= r; | size -= r; |
| pos++; | pos++; |
| Line 432 static void reg_load(UINT seg, UINT off) | Line 432 static void reg_load(UINT seg, UINT off) |
| B1BREG r; | B1BREG r; |
| MEML_READSTR(seg, off, &r, sizeof(r)); | MEMR_READS(seg, off, &r, sizeof(r)); |
| CPU_FLAGL = MEML_READ8(seg, off + 0x16); | CPU_FLAGL = MEMR_READ8(seg, off + 0x16); |
| CPU_AX = LOADINTELWORD(r.r_ax); | CPU_AX = LOADINTELWORD(r.r_ax); |
| CPU_BX = LOADINTELWORD(r.r_bx); | CPU_BX = LOADINTELWORD(r.r_bx); |
| CPU_CX = LOADINTELWORD(r.r_cx); | CPU_CX = LOADINTELWORD(r.r_cx); |
| Line 458 static void reg_store(UINT seg, UINT off | Line 458 static void reg_store(UINT seg, UINT off |
| STOREINTELWORD(r.r_di, CPU_DI); | STOREINTELWORD(r.r_di, CPU_DI); |
| STOREINTELWORD(r.r_si, CPU_SI); | STOREINTELWORD(r.r_si, CPU_SI); |
| STOREINTELWORD(r.r_ds, CPU_DS); | STOREINTELWORD(r.r_ds, CPU_DS); |
| MEML_WRITESTR(seg, off, &r, sizeof(r)); | MEMR_WRITES(seg, off, &r, sizeof(r)); |
| MEML_WRITE8(seg, off + 0x16, CPU_FLAGL); | MEMR_WRITE8(seg, off + 0x16, CPU_FLAGL); |
| } | } |
| #endif | #endif |