np2/cbus/cs4231io.c - diff

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Diff for /np2/cbus/cs4231io.c between versions 1.7 and 1.10

version 1.7, 2004/03/29 14:19:25	version 1.10, 2005/04/08 19:39:08
Line 19 static void IOOUTCALL csctrl_oc24(UINT p	Line 19 static void IOOUTCALL csctrl_oc24(UINT p

static void IOOUTCALL csctrl_oc2b(UINT port, REG8 dat) {	static void IOOUTCALL csctrl_oc2b(UINT port, REG8 dat) {

if ((cs4231.portctrl & 0x2f) == 0x20) {	UINT num;
cs4231.port &= 0xff00;
cs4231.port \|= (dat & 0xf0);	if ((cs4231.portctrl & 0x28) == 0x20) {
	num = cs4231.portctrl & 7;
	if ((num == 0) \|\| (num == 5)) {
	cs4231.port[num] &= 0xff00;
	cs4231.port[num] \|= dat;
	}
}	}
(void)port;	(void)port;
}	}

static void IOOUTCALL csctrl_oc2d(UINT port, REG8 dat) {	static void IOOUTCALL csctrl_oc2d(UINT port, REG8 dat) {

	UINT num;

if ((cs4231.portctrl & 0x2f) == 0x20) {	if ((cs4231.portctrl & 0x2f) == 0x20) {
cs4231.port &= 0x00ff;	num = cs4231.portctrl & 7;
cs4231.port \|= (dat << 8);	if ((num == 0) \|\| (num == 5)) {
	cs4231.port[num] &= 0x00ff;
	cs4231.port[num] \|= (dat << 8);
	}
}	}
(void)port;	(void)port;
}	}
Line 43 static REG8 IOINPCALL csctrl_ic24(UINT p	Line 53 static REG8 IOINPCALL csctrl_ic24(UINT p

static REG8 IOINPCALL csctrl_ic2b(UINT port) {	static REG8 IOINPCALL csctrl_ic2b(UINT port) {

switch(cs4231.portctrl & 0x0f) {	UINT num;
case 0x00:
return(cs4231.port & 0xff);

case 0x01:
return(0x60);

case 0x04:
return(0x88);
}
(void)port;	(void)port;
return(0xff);	num = cs4231.portctrl & 0x07;
	return((REG8)(cs4231.port[num] & 0xff));
}	}

static REG8 IOINPCALL csctrl_ic2d(UINT port) {	static REG8 IOINPCALL csctrl_ic2d(UINT port) {

switch(cs4231.portctrl & 0x0f) {	UINT num;
case 0x00:
return(cs4231.port >> 8);

case 0x01:
return(0xa4);

case 0x04:
return(0x01);
}
(void)port;	(void)port;
return(0xff);	num = cs4231.portctrl & 0x07;
	return((REG8)(cs4231.port[num] >> 8));
}	}


Line 79 static REG8 IOINPCALL csctrl_ic2d(UINT p	Line 75 static REG8 IOINPCALL csctrl_ic2d(UINT p
void cs4231io_reset(void) {	void cs4231io_reset(void) {

cs4231.enable = 1;	cs4231.enable = 1;
cs4231.port = 0xf40;
cs4231.adrs = 0x22;	cs4231.adrs = 0x22;
cs4231.dmairq = cs4231irq[(cs4231.adrs >> 3) & 7];	cs4231.dmairq = cs4231irq[(cs4231.adrs >> 3) & 7];
cs4231.dmach = cs4231dma[cs4231.adrs & 7];	cs4231.dmach = cs4231dma[cs4231.adrs & 7];
if (cs4231.dmach != 0xff) {	if (cs4231.dmach != 0xff) {
dmac_attach(DMADEV_CS4231, cs4231.dmach);	dmac_attach(DMADEV_CS4231, cs4231.dmach);
}	}
	cs4231.port[0] = 0x0f40;
	cs4231.port[1] = 0xa460;
	cs4231.port[2] = 0x0f48;
	cs4231.port[4] = 0x0188;
	cs4231.port[5] = 0x0f4a;

TRACEOUT(("CS4231 - IRQ = %d", cs4231.dmairq));	TRACEOUT(("CS4231 - IRQ = %d", cs4231.dmairq));
TRACEOUT(("CS4231 - DMA channel = %d", cs4231.dmach));	TRACEOUT(("CS4231 - DMA channel = %d", cs4231.dmach));
}	}
Line 101 void cs4231io_bind(void) {	Line 102 void cs4231io_bind(void) {
iocore_attachinp(0xc2d, csctrl_ic2d);	iocore_attachinp(0xc2d, csctrl_ic2d);
}	}

void IOOUTCALL cs4231io_w8(UINT port, REG8 value) {	void IOOUTCALL cs4231io0_w8(UINT port, REG8 value) {

switch(port & 0x0f) {	switch(port - cs4231.port[0]) {
case 0:	case 0x00:
cs4231.adrs = value;	cs4231.adrs = value;
cs4231.dmairq = cs4231irq[(value >> 3) & 7];	cs4231.dmairq = cs4231irq[(value >> 3) & 7];
cs4231.dmach = cs4231dma[value & 7];	cs4231.dmach = cs4231dma[value & 7];
dmac_detach(DMADEV_CS4231);	dmac_detach(DMADEV_CS4231);
if (cs4231.dmach != 0xff) {	if (cs4231.dmach != 0xff) {
dmac_attach(DMADEV_CS4231, cs4231.dmach);	dmac_attach(DMADEV_CS4231, cs4231.dmach);
	#if 0
	if (cs4231.sdc_enable) {
	dmac.dmach[cs4231.dmach].ready = 1;
	dmac_check();
	}
	#endif
}	}
break;	break;

case 4:	case 0x04:
cs4231.index = value;	cs4231.index = value;
break;	break;

case 5:	case 0x05:
cs4231_control(cs4231.index & 0x1f, value);	cs4231_control(cs4231.index & 0x1f, value);
break;	break;

case 6:	case 0x06:
cs4231.intflag = 0;	cs4231.intflag = 0;
break;	break;

case 7:	case 0x07:
cs4231_datasend(value);	cs4231_datasend(value);
break;	break;
}	}
}	}

REG8 IOINPCALL cs4231io_r8(UINT port) {	REG8 IOINPCALL cs4231io0_r8(UINT port) {

switch(port & 0x0f) {	switch(port - cs4231.port[0]) {
case 0:	case 0x00:
return(cs4231.adrs);	return(cs4231.adrs);

case 3:	case 0x03:
return(0x04);	return(0x04);

case 4:	case 0x04:
return(cs4231.index & 0x7f);	return(cs4231.index & 0x7f);

case 5:	case 0x05:
return((((BYTE )(&cs4231.reg)) + (cs4231.index & 0x1f)));	return((((UINT8 )(&cs4231.reg)) + (cs4231.index & 0x1f)));

case 6:	case 0x06:
return(cs4231.intflag);	return(cs4231.intflag);

}	}
return(0);	return(0);
}	}

	void IOOUTCALL cs4231io5_w8(UINT port, REG8 value) {

	switch(port - cs4231.port[5]) {
	case 0x00:
	cs4231.extindex = value;
	break;
	}
	}

	REG8 IOINPCALL cs4231io5_r8(UINT port) {

	switch(port - cs4231.port[5]) {
	case 0x00:
	return(cs4231.extindex);

	case 0x01:
	if (cs4231.extindex == 1) {
	return(0); // means opna int5
	}
	break;
	}
	return(0xff);
	}

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Removed from v.1.7
changed lines
	Added in v.1.10