| version 1.2, 2003/12/08 00:55:30 | version 1.9, 2005/02/07 14:46:08 | 
| Line 1 | Line 1 | 
 | #include        "compiler.h" | #include        "compiler.h" | 
| #include        "memory.h" | #include        "cpucore.h" | 
 | #include        "pccore.h" | #include        "pccore.h" | 
 | #include        "iocore.h" | #include        "iocore.h" | 
 | #include        "cs4231io.h" | #include        "cs4231io.h" | 
| Line 7 | Line 7 | 
 | #include        "fmboard.h" | #include        "fmboard.h" | 
 |  |  | 
 |  |  | 
 |  | static const UINT8 cs4231dma[] = {0xff,0x00,0x01,0x03,0xff,0xff,0xff,0xff}; | 
 |  | static const UINT8 cs4231irq[] = {0xff,0x03,0x06,0x0a,0x0c,0xff,0xff,0xff}; | 
 |  |  | 
 |  |  | 
 | static void IOOUTCALL csctrl_oc24(UINT port, REG8 dat) { | static void IOOUTCALL csctrl_oc24(UINT port, REG8 dat) { | 
 |  |  | 
 | cs4231.portctrl = dat; | cs4231.portctrl = dat; | 
| Line 74  static REG8 IOINPCALL csctrl_ic2d(UINT p | Line 78  static REG8 IOINPCALL csctrl_ic2d(UINT p | 
 |  |  | 
 | void cs4231io_reset(void) { | void cs4231io_reset(void) { | 
 |  |  | 
| cs4231.enable = 0; | cs4231.enable = 1; | 
| cs4231.port = 0xffff; | cs4231.port = 0xf40; | 
|  | cs4231.adrs = 0x22; | 
|  | cs4231.dmairq = cs4231irq[(cs4231.adrs >> 3) & 7]; | 
|  | cs4231.dmach = cs4231dma[cs4231.adrs & 7]; | 
|  | if (cs4231.dmach != 0xff) { | 
|  | dmac_attach(DMADEV_CS4231, cs4231.dmach); | 
|  | } | 
|  | TRACEOUT(("CS4231 - IRQ = %d", cs4231.dmairq)); | 
|  | TRACEOUT(("CS4231 - DMA channel = %d", cs4231.dmach)); | 
 | } | } | 
 |  |  | 
 | void cs4231io_bind(void) { | void cs4231io_bind(void) { | 
 |  |  | 
 | cs4231.enable = 1; |  | 
 | cs4231.port = 0xf40; |  | 
 | cs4231.adrs = 0x21; |  | 
 | cs4231.dmach = 0; |  | 
 | cs4231.dmairq = 0x0c; |  | 
 | cs4231.step = 22050; |  | 
 | sound_streamregist(&cs4231, (SOUNDCB)cs4231_getpcm); | sound_streamregist(&cs4231, (SOUNDCB)cs4231_getpcm); | 
 |  |  | 
 | iocore_attachout(0xc24, csctrl_oc24); | iocore_attachout(0xc24, csctrl_oc24); | 
 | iocore_attachout(0xc2b, csctrl_oc2b); | iocore_attachout(0xc2b, csctrl_oc2b); | 
 | iocore_attachout(0xc2d, csctrl_oc2d); | iocore_attachout(0xc2d, csctrl_oc2d); | 
| Line 100  void IOOUTCALL cs4231io_w8(UINT port, RE | Line 105  void IOOUTCALL cs4231io_w8(UINT port, RE | 
 |  |  | 
 | switch(port & 0x0f) { | switch(port & 0x0f) { | 
 | case 0: | case 0: | 
 | #if 0 |  | 
 | cs4231.adrs = value; | cs4231.adrs = value; | 
| cs4231.dmairq = dmairq[(value >> 3) & 3]; | cs4231.dmairq = cs4231irq[(value >> 3) & 7]; | 
| cs4231.dmach = dmach[value & 7]; | cs4231.dmach = cs4231dma[value & 7]; | 
|  | dmac_detach(DMADEV_CS4231); | 
|  | if (cs4231.dmach != 0xff) { | 
|  | dmac_attach(DMADEV_CS4231, cs4231.dmach); | 
|  | #if 0 | 
|  | if (cs4231.sdc_enable) { | 
|  | dmac.dmach[cs4231.dmach].ready = 1; | 
|  | dmac_check(); | 
|  | } | 
 | #endif | #endif | 
 |  | } | 
 | break; | break; | 
 |  |  | 
 | case 4: | case 4: | 
| Line 118  void IOOUTCALL cs4231io_w8(UINT port, RE | Line 131  void IOOUTCALL cs4231io_w8(UINT port, RE | 
 | case 6: | case 6: | 
 | cs4231.intflag = 0; | cs4231.intflag = 0; | 
 | break; | break; | 
 |  |  | 
 |  | case 7: | 
 |  | cs4231_datasend(value); | 
 |  | break; | 
 | } | } | 
 | } | } | 
 |  |  | 
| Line 134  REG8 IOINPCALL cs4231io_r8(UINT port) { | Line 151  REG8 IOINPCALL cs4231io_r8(UINT port) { | 
 | return(cs4231.index & 0x7f); | return(cs4231.index & 0x7f); | 
 |  |  | 
 | case 5: | case 5: | 
| return(*(((BYTE *)(&cs4231.reg)) + (cs4231.index & 0x1f))); | return(*(((UINT8 *)(&cs4231.reg)) + (cs4231.index & 0x1f))); | 
 |  |  | 
 | case 6: | case 6: | 
 | return(cs4231.intflag); | return(cs4231.intflag); |