--- np2/cbus/cs4231io.c 2004/01/05 09:31:25 1.3 +++ np2/cbus/cs4231io.c 2005/02/07 14:46:08 1.9 @@ -1,5 +1,5 @@ #include "compiler.h" -#include "memory.h" +#include "cpucore.h" #include "pccore.h" #include "iocore.h" #include "cs4231io.h" @@ -7,6 +7,10 @@ #include "fmboard.h" +static const UINT8 cs4231dma[] = {0xff,0x00,0x01,0x03,0xff,0xff,0xff,0xff}; +static const UINT8 cs4231irq[] = {0xff,0x03,0x06,0x0a,0x0c,0xff,0xff,0xff}; + + static void IOOUTCALL csctrl_oc24(UINT port, REG8 dat) { cs4231.portctrl = dat; @@ -76,11 +80,14 @@ void cs4231io_reset(void) { cs4231.enable = 1; cs4231.port = 0xf40; - cs4231.adrs = 0x21; - cs4231.dmach = 0; - cs4231.dmairq = 0x0c; - cs4231.step = 22050; - dmac_attach(DMADEV_CS4231, 0); + cs4231.adrs = 0x22; + cs4231.dmairq = cs4231irq[(cs4231.adrs >> 3) & 7]; + cs4231.dmach = cs4231dma[cs4231.adrs & 7]; + if (cs4231.dmach != 0xff) { + dmac_attach(DMADEV_CS4231, cs4231.dmach); + } + TRACEOUT(("CS4231 - IRQ = %d", cs4231.dmairq)); + TRACEOUT(("CS4231 - DMA channel = %d", cs4231.dmach)); } void cs4231io_bind(void) { @@ -98,11 +105,19 @@ void IOOUTCALL cs4231io_w8(UINT port, RE switch(port & 0x0f) { case 0: -#if 0 cs4231.adrs = value; - cs4231.dmairq = dmairq[(value >> 3) & 3]; - cs4231.dmach = dmach[value & 7]; + cs4231.dmairq = cs4231irq[(value >> 3) & 7]; + cs4231.dmach = cs4231dma[value & 7]; + dmac_detach(DMADEV_CS4231); + if (cs4231.dmach != 0xff) { + dmac_attach(DMADEV_CS4231, cs4231.dmach); +#if 0 + if (cs4231.sdc_enable) { + dmac.dmach[cs4231.dmach].ready = 1; + dmac_check(); + } #endif + } break; case 4: @@ -116,6 +131,10 @@ void IOOUTCALL cs4231io_w8(UINT port, RE case 6: cs4231.intflag = 0; break; + + case 7: + cs4231_datasend(value); + break; } } @@ -132,7 +151,7 @@ REG8 IOINPCALL cs4231io_r8(UINT port) { return(cs4231.index & 0x7f); case 5: - return(*(((BYTE *)(&cs4231.reg)) + (cs4231.index & 0x1f))); + return(*(((UINT8 *)(&cs4231.reg)) + (cs4231.index & 0x1f))); case 6: return(cs4231.intflag);