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| version 1.1, 2004/01/22 01:10:03 | version 1.4, 2004/01/27 03:24:19 |
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| Line 6 | Line 6 |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "sxsi.h" | |
| #include "sasiio.h" | #include "sasiio.h" |
| #include "sxsi.h" | |
| #include "sasibios.res" | #include "sasibios.res" |
| Line 329 static void IOOUTCALL sasiio_o80(UINT po | Line 329 static void IOOUTCALL sasiio_o80(UINT po |
| sasi_datawrite(dat); | sasi_datawrite(dat); |
| break; | break; |
| } | } |
| (void)port; | |
| } | } |
| static void IOOUTCALL sasiio_o82(UINT port, REG8 dat) { | static void IOOUTCALL sasiio_o82(UINT port, REG8 dat) { |
| Line 343 static void IOOUTCALL sasiio_o82(UINT po | Line 344 static void IOOUTCALL sasiio_o82(UINT po |
| TRACEOUT(("SASI reset")); | TRACEOUT(("SASI reset")); |
| } | } |
| sasidmac(); | sasidmac(); |
| (void)port; | |
| } | } |
| static REG8 IOINPCALL sasiio_i80(UINT port) { | static REG8 IOINPCALL sasiio_i80(UINT port) { |
| REG8 ret; | REG8 ret; |
| ret = 0; | |
| switch(sasiio.phase) { | switch(sasiio.phase) { |
| case SASIPHASE_READ: | case SASIPHASE_READ: |
| ret = sasi_dataread(); | ret = sasi_dataread(); |
| Line 378 static REG8 IOINPCALL sasiio_i80(UINT po | Line 381 static REG8 IOINPCALL sasiio_i80(UINT po |
| } | } |
| break; | break; |
| } | } |
| (void)port; | |
| return(ret); | return(ret); |
| } | } |
| static REG8 IOINPCALL sasiio_i82(UINT port) { | static REG8 IOINPCALL sasiio_i82(UINT port) { |
| REG8 ret; | REG8 ret; |
| SXSIDEV sxsi; | |
| if (sasiio.ocr & SASIOCR_NRDSW) { | if (sasiio.ocr & SASIOCR_NRDSW) { |
| ret = sasiio.isrint; | ret = sasiio.isrint; |
| Line 410 static REG8 IOINPCALL sasiio_i82(UINT po | Line 415 static REG8 IOINPCALL sasiio_i82(UINT po |
| break; | break; |
| } | } |
| } | } |
| return(ret); | |
| } | } |
| else { | else { |
| return((6 << 3) + 6); // 256/256/40MB/40MB | ret = 0; |
| sxsi = sxsi_getptr(0x00); // SASI-1 | |
| if ((sxsi) && ((sxsi->type & SXSITYPE_IFMASK) == SXSITYPE_SASI)) { | |
| ret |= (sxsi->type >> (8 - 3)) & 0x38; | |
| } | |
| else { | |
| ret |= 0x38; | |
| } | |
| sxsi = sxsi_getptr(0x01); // SASI-2 | |
| if ((sxsi) && ((sxsi->type & SXSITYPE_IFMASK) == SXSITYPE_SASI)) { | |
| ret |= (sxsi->type >> 8) & 7; | |
| } | |
| else { | |
| ret |= 7; | |
| } | |
| TRACEOUT(("sasi type = %.2x", ret)); | |
| } | } |
| (void)port; | |
| return(ret); | |
| } | } |
| Line 430 void sasiio_reset(void) { | Line 451 void sasiio_reset(void) { |
| dmac_attach(DMADEV_SASI, SASI_DMACH); | dmac_attach(DMADEV_SASI, SASI_DMACH); |
| fh = file_open_rb_c("sasi.rom"); | fh = file_open_rb_c("sasi.rom"); |
| r = 0; | |
| if (fh != FILEH_INVALID) { | if (fh != FILEH_INVALID) { |
| r = file_read(fh, mem + 0xd0000, 0x1000); | r = file_read(fh, mem + 0xd0000, 0x1000); |
| file_close(fh); | file_close(fh); |
| Line 453 void sasiio_bind(void) { | Line 475 void sasiio_bind(void) { |
| iocore_attachinp(0x0082, sasiio_i82); | iocore_attachinp(0x0082, sasiio_i82); |
| } | } |
| } | } |
| #endif | #endif |