--- np2/cbus/scsicmd.c 2004/01/22 04:59:48 1.2 +++ np2/cbus/scsicmd.c 2005/05/20 13:59:46 1.8 @@ -21,14 +21,14 @@ extern void iptrace_out(void); #endif -static const BYTE hdd_inquiry[0x20] = { +static const UINT8 hdd_inquiry[0x20] = { 0x00,0x00,0x02,0x02,0x1c,0x00,0x00,0x18, 'N', 'E', 'C', 0x20,0x20,0x20,0x20,0x20, 'N', 'P', '2', '-', 'H', 'D', 'D', 0x20, 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20}; -static UINT scsicmd_datain(SXSIDEV sxsi, BYTE *cdb) { +static UINT scsicmd_datain(SXSIDEV sxsi, UINT8 *cdb) { UINT length; @@ -75,14 +75,14 @@ REG8 scsicmd_select(REG8 id) { return(0x42); } sxsi = sxsi_getptr((REG8)(0x20 + id)); - if ((sxsi) && (sxsi->type)) { + if ((sxsi) && (sxsi->flag & SXSIFLAG_READY)) { scsiio.phase = SCSIPH_COMMAND; return(0x8a); // Transfer CommandÍ×µá } return(0x42); // Timeout } -REG8 scsicmd_transfer(REG8 id, BYTE *cdb) { +REG8 scsicmd_transfer(REG8 id, UINT8 *cdb) { SXSIDEV sxsi; UINT leng; @@ -92,7 +92,7 @@ REG8 scsicmd_transfer(REG8 id, BYTE *cdb } sxsi = sxsi_getptr((REG8)(0x20 + id)); - if ((sxsi == NULL) || (sxsi->type == 0)) { + if ((sxsi == NULL) || (!(sxsi->flag & SXSIFLAG_READY))) { return(0x42); } @@ -127,7 +127,7 @@ static REG8 scsicmd_cmd(REG8 id) { return(0x42); } sxsi = sxsi_getptr((REG8)(0x20 + id)); - if ((sxsi == NULL) || (sxsi->type == 0)) { + if ((sxsi == NULL) || (!(sxsi->flag & SXSIFLAG_READY))) { return(0x42); } switch(scsiio.cmd[0]) { @@ -144,7 +144,7 @@ static REG8 scsicmd_cmd(REG8 id) { return(0xff); } -BOOL scsicmd_send(void) { +BRESULT scsicmd_send(void) { switch(scsiio.phase) { case SCSIPH_COMMAND: @@ -165,17 +165,17 @@ static const UINT8 stat2ret[16] = { static REG8 bios1bc_seltrans(REG8 id) { - BYTE cdb[16]; + UINT8 cdb[16]; REG8 ret; - i286_memstr_read(CPU_DS, CPU_DX, cdb, 16); + MEMR_READS(CPU_DS, CPU_DX, cdb, 16); scsiio.reg[SCSICTR_TARGETLUN] = cdb[0]; if ((cdb[1] & 0x0c) == 0x08) { // OUT - i286_memstr_read(CPU_ES, CPU_BX, scsiio.data, CPU_CX); + MEMR_READS(CPU_ES, CPU_BX, scsiio.data, CPU_CX); } ret = scsicmd_transfer(id, cdb + 4); if ((cdb[1] & 0x0c) == 0x04) { // IN - i286_memstr_write(CPU_ES, CPU_BX, scsiio.data, CPU_CX); + MEMR_WRITES(CPU_ES, CPU_BX, scsiio.data, CPU_CX); } return(ret); } @@ -194,7 +194,7 @@ void scsicmd_bios(void) { return; } - flag = i286_membyte_read(CPU_SS, CPU_SP+4) & 0xbe; + flag = MEMR_READ8(CPU_SS, CPU_SP+4) & 0xbe; ret = mem[0x0483]; cmd = CPU_AH & 0x1f; dstid = CPU_AL & 7; @@ -222,6 +222,7 @@ void scsicmd_bios(void) { default: TRACEOUT(("cmd = %.2x", CPU_AH)); SCSICMD_ERR + stat = 0x42; break; } ret = stat2ret[stat >> 4] + (stat & 0x0f); @@ -235,13 +236,13 @@ void scsicmd_bios(void) { else { switch(cmd) { case 0x19: // Data In - i286_memstr_write(CPU_ES, CPU_BX, scsiio.data, CPU_CX); + MEMR_WRITES(CPU_ES, CPU_BX, scsiio.data, CPU_CX); scsiio.phase = SCSIPH_STATUS; stat = 0x8b; break; case 0x1a: // Transfer command - i286_memstr_read(CPU_ES, CPU_BX, scsiio.cmd, 12); + MEMR_READS(CPU_ES, CPU_BX, scsiio.cmd, 12); stat = scsicmd_cmd(dstid); break; @@ -258,6 +259,7 @@ void scsicmd_bios(void) { default: TRACEOUT(("cmd = %.2x", CPU_AH)); SCSICMD_ERR + stat = 0x42; break; } ret = stat2ret[stat >> 4] + (stat & 0x0f); @@ -271,7 +273,7 @@ void scsicmd_bios(void) { ret &= 0x7f; } CPU_AH = ret; - i286_membyte_write(CPU_SS, CPU_SP + 4, flag); + MEMR_WRITE8(CPU_SS, CPU_SP + 4, flag); } #endif