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| version 1.1, 2003/12/15 20:58:12 | version 1.2, 2003/12/16 04:58:00 |
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| Line 1 | Line 1 |
| C_FLAG equ &0001 | I286_MEMREADMAX equ &a4000 |
| P_FLAG equ &0004 | I286_MEMWRITEMAX equ &a0000 |
| A_FLAG equ &0010 | |
| Z_FLAG equ &0040 | C_FLAG equ &0001 |
| S_FLAG equ &0080 | P_FLAG equ &0004 |
| T_FLAG equ &0100 | A_FLAG equ &0010 |
| I_FLAG equ &0200 | Z_FLAG equ &0040 |
| D_FLAG equ &0400 | S_FLAG equ &0080 |
| O_FLAG equ &0800 | T_FLAG equ &0100 |
| I_FLAG equ &0200 | |
| D_FLAG equ &0400 | |
| O_FLAG equ &0800 | |
| CPU_REG equ 0 - 112 | CPU_REG equ 0 - 112 |
| CPU_REMAINCLOCK equ 28 - 112 | CPU_REMAINCLOCK equ 28 - 112 |
| Line 60 CPU_DS equ 22 - 112 | Line 63 CPU_DS equ 22 - 112 |
| CPU_FLAG equ 24 - 112 | CPU_FLAG equ 24 - 112 |
| CPU_IP equ 26 - 112 | CPU_IP equ 26 - 112 |
| MACRO | |
| $label CPUWORK $clock | |
| $label ldr r7, [r9, #CPU_REMAINCLOCK] | |
| sub r7, r7, $clock | |
| str r7, [r9, #CPU_REMAINCLOCK] | |
| MEND | |
| MACRO | |
| $label GETPC8 | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread | |
| add r8, r8, #(1 << 16) | |
| MEND | |
| MACRO | |
| $label GETPC16 | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread_w | |
| add r8, r8, #(2 << 16) | |
| MEND | |
| MACRO | |
| $label R8SRC $op, $out | |
| $label and $out, $op, #3 | |
| add $out, r9, $out lsl #1 | |
| tst $op, #(1 << 2) | |
| addne $out, $out, #1 | |
| MEND | |
| MACRO | |
| $label R8DST $op, $out | |
| $label and $out, $op, #(6 << 2) | |
| add $out, r9, $out lsr #2 | |
| tst $op, #(1 << 5) | |
| addne $out, $out, #1 | |
| MEND | |
| MACRO | |
| $label EAREG8 $src | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread | |
| add r8, r8, #(1 << 16) | |
| and $src, r0, #(6 << 2) | |
| add $src, r9, r12 lsr #2 | |
| tst r0, #(1 << 5) | |
| addne $src, $src, #1 | |
| MEND | |
| MACRO | |
| $label REG8EA $dst, $regclk, $memclk | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread | |
| add r8, r8, #(1 << 16) | |
| R8DST r0, $dst | |
| cmp r0, #&c0 | |
| bcc $label.1 | |
| CPUWORK $regclk | |
| R8SRC r0, r12 | |
| ldrb r0, [r12, #CPU_REG] | |
| b $label.2 | |
| $label.1 CPUWORK $memclk | |
| bl i286a_ea | |
| bl i286_memoryread | |
| $label.2 | |
| MEND | |
| MACRO | |
| $label R16SRC $op, $out | |
| $label and $out, $op, #7 | |
| add $out, r9, $out lsl #1 | |
| MEND | |
| MACRO | |
| $label R16DST $op, $out | |
| $label and $out, $op, #(7 << 3) | |
| add $out, r9, $out lsr #2 | |
| MEND | |
| MACRO | |
| $label EAREG16 $src | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread | |
| add r8, r8, #(1 << 16) | |
| and r12, r0, #(7 << 3) | |
| add r12, r9, r12 lsr #2 | |
| MEND | |
| MACRO | |
| $label REG16EA $dst, $regclk, $memclk | |
| $label ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286_memoryread | |
| add r8, r8, #(1 << 16) | |
| R16DST r0, $dst | |
| cmp r0, #&c0 | |
| bcc $label.1 | |
| CPUWORK $regclk | |
| R16SRC r0, r12 | |
| ldrh r0, [r12, #CPU_REG] | |
| b $label.2 | |
| $label.1 CPUWORK $memclk | |
| bl i286a_ea | |
| bl i286_memoryread_w | |
| $label.2 | |
| MEND | |
| END | END |