--- np2/i286a/i286a.inc 2003/12/15 20:58:12 1.1 +++ np2/i286a/i286a.inc 2003/12/19 05:25:32 1.10 @@ -1,39 +1,43 @@ -C_FLAG equ &0001 -P_FLAG equ &0004 -A_FLAG equ &0010 -Z_FLAG equ &0040 -S_FLAG equ &0080 -T_FLAG equ &0100 -I_FLAG equ &0200 -D_FLAG equ &0400 -O_FLAG equ &0800 +I286_MEMREADMAX equ &a4000 +I286_MEMWRITEMAX equ &a0000 + +C_FLAG equ &0001 +P_FLAG equ &0004 +A_FLAG equ &0010 +Z_FLAG equ &0040 +S_FLAG equ &0080 +T_FLAG equ &0100 +I_FLAG equ &0200 +D_FLAG equ &0400 +O_FLAG equ &0800 CPU_REG equ 0 - 112 +CPU_SEG equ 16 - 112 CPU_REMAINCLOCK equ 28 - 112 -; cpu_baseclock equ 32 - 112 +CPU_BASECLOCK equ 32 - 112 ; cpu_clock equ 36 - 112 -; cpu_adrsmask equ 40 - 112 +CPU_ADRSMASK equ 40 - 112 CPU_ES_BASE equ 44 - 112 CPU_CS_BASE equ 48 - 112 CPU_SS_BASE equ 52 - 112 CPU_DS_BASE equ 56 - 112 CPU_SS_FIX equ 60 - 112 CPU_DS_FIX equ 64 - 112 -; cpu_prefix equ 68 - 112 -; cpu_trap equ 70 - 112 +CPU_PREFIX equ 68 - 112 +CPU_TRAP equ 70 - 112 ; cpu_type equ 71 - 112 ; cpu_pf_semaphore equ 72 - 112 ; cpu_repbak equ 76 - 112 -; cpu_inport equ 80 - 112 +CPU_INPUT equ 80 - 112 ; cpu_ovflag equ 84 - 112 CPU_GDTR equ 88 - 112 CPU_IDTR equ 94 - 112 -; cpu_MSW equ 100 - 112 +CPU_MSW equ 100 - 112 ; cpu_resetreq equ 102 - 112 ; cpu_itfbank equ 103 - 112 -; cpu_extmem equ 104 - 112 -; cpu_extmemsize equ 108 - 112 +CPU_EXTMEM equ 104 - 112 +CPU_EXTMEMSIZE equ 108 - 112 ; cpu_mainmem equ 112 - 112 CPU_AL equ 0 - 112 @@ -60,5 +64,103 @@ CPU_DS equ 22 - 112 CPU_FLAG equ 24 - 112 CPU_IP equ 26 - 112 +MAX_PREFIX equ 8 + + + MACRO +$label CPUSVC +$label + MEND + + MACRO +$label CPULDC +$label + MEND + + MACRO +$label CPUSVF +$label str r8, [r9, #CPU_FLAG] + MEND + + MACRO +$label CPULDF +$label ldr r8, [r9, #CPU_FLAG] + MEND + + MACRO +$label CPUSV +$label CPUSVF + CPUSVC + MEND + + MACRO +$label CPULD +$label CPULDF + CPULDC + MEND + + + MACRO +$label CPUWORK $clock +$label ldr r7, [r9, #CPU_REMAINCLOCK] + sub r7, r7, $clock + str r7, [r9, #CPU_REMAINCLOCK] + MEND + + MACRO +$label CPUWKS $clock +$label ldr r7, [r9, #CPU_REMAINCLOCK] + subs r7, r7, $clock + str r7, [r9, #CPU_REMAINCLOCK] + MEND + + MACRO +$label CREMSET $clock +$label mov r7, $clock + str r7, [r9, #CPU_REMAINCLOCK] + MEND + + MACRO +$label NEXT_OPCODE +$label ldr r7, [r9, #CPU_REMAINCLOCK] + cmp r7, #1 + movge pc, r11 + ldr r0, [r9, #CPU_BASECLOCK] + rsb r1, r7, #1 + mov r7, #1 + add r0, r0, r1 + str r0, [r9, #CPU_BASECLOCK] + str r7, [r9, #CPU_REMAINCLOCK] + mov pc, r11 + MEND + + MACRO +$label REMAIN_ADJUST $clk +$label ldr r7, [r9, #CPU_REMAINCLOCK] + cmp r7, $clk + moveq pc, r11 + ldr r0, [r9, #CPU_BASECLOCK] + rsb r1, r7, $clk + mov r7, $clk + add r0, r0, r1 + str r0, [r9, #CPU_BASECLOCK] + str r7, [r9, #CPU_REMAINCLOCK] + mov pc, r11 + MEND + + MACRO +$label I286IRQCHECKTERM +$label ldr r7, [r9, #CPU_REMAINCLOCK] + cmp r7, #0 + movle pc, r11 + ldr r0, [r9, #CPU_BASECLOCK] + mov r1, r7 + mov r7, #0 + sub r0, r0, r1 + str r7, [r9, #CPU_REMAINCLOCK] + str r0, [r9, #CPU_BASECLOCK] + mov pc, r11 + MEND + END