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| version 1.1, 2003/12/16 04:58:00 | version 1.6, 2003/12/22 01:44:59 |
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| Line 8 | Line 8 |
| INCLUDE i286a.inc | INCLUDE i286a.inc |
| IMPORT i286_memoryread | IMPORT i286a_memoryread |
| IMPORT i286_memoryread_w | IMPORT i286a_memoryread_w |
| EXPORT i286a_ea | EXPORT i286a_ea |
| EXPORT i286a_lea | EXPORT i286a_lea |
| EXPORT i286a_a | |
| AREA .text, CODE, READONLY | AREA .text, CODE, READONLY |
| Line 62 ea_bx_si ldrh r1, [r9, #CPU_BX] | Line 62 ea_bx_si ldrh r1, [r9, #CPU_BX] |
| ea_bx_si_d8 mov r4, lr | ea_bx_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| ldr r3, [r9, #CPU_DS_FIX] | ldr r3, [r9, #CPU_DS_FIX] |
| Line 77 ea_bx_si_d8 mov r4, lr | Line 77 ea_bx_si_d8 mov r4, lr |
| ea_bx_si_d16 mov r4, lr | ea_bx_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| ldr r3, [r9, #CPU_DS_FIX] | ldr r3, [r9, #CPU_DS_FIX] |
| Line 99 ea_bx_di ldrh r1, [r9, #CPU_BX] | Line 99 ea_bx_di ldrh r1, [r9, #CPU_BX] |
| ea_bx_di_d8 mov r4, lr | ea_bx_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| ldr r3, [r9, #CPU_DS_FIX] | ldr r3, [r9, #CPU_DS_FIX] |
| Line 114 ea_bx_di_d8 mov r4, lr | Line 114 ea_bx_di_d8 mov r4, lr |
| ea_bx_di_d16 mov r4, lr | ea_bx_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| ldr r3, [r9, #CPU_DS_FIX] | ldr r3, [r9, #CPU_DS_FIX] |
| Line 136 ea_bp_si ldrh r1, [r9, #CPU_BP] | Line 136 ea_bp_si ldrh r1, [r9, #CPU_BP] |
| ea_bp_si_d8 mov r4, lr | ea_bp_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| ldr r3, [r9, #CPU_SS_FIX] | ldr r3, [r9, #CPU_SS_FIX] |
| Line 151 ea_bp_si_d8 mov r4, lr | Line 151 ea_bp_si_d8 mov r4, lr |
| ea_bp_si_d16 mov r4, lr | ea_bp_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| ldr r3, [r9, #CPU_SS_FIX] | ldr r3, [r9, #CPU_SS_FIX] |
| Line 173 ea_bp_di ldrh r1, [r9, #CPU_BP] | Line 173 ea_bp_di ldrh r1, [r9, #CPU_BP] |
| ea_bp_di_d8 mov r4, lr | ea_bp_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| ldr r3, [r9, #CPU_SS_FIX] | ldr r3, [r9, #CPU_SS_FIX] |
| Line 188 ea_bp_di_d8 mov r4, lr | Line 188 ea_bp_di_d8 mov r4, lr |
| ea_bp_di_d16 mov r4, lr | ea_bp_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| ldr r3, [r9, #CPU_SS_FIX] | ldr r3, [r9, #CPU_SS_FIX] |
| Line 207 ea_si ldrh r1, [r9, #CPU_SI] | Line 207 ea_si ldrh r1, [r9, #CPU_SI] |
| ea_si_d8 mov r4, lr | ea_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_SI] | ldrh r1, [r9, #CPU_SI] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| mov r3, r0 lsl #24 | mov r3, r0 lsl #24 |
| Line 220 ea_si_d8 mov r4, lr | Line 220 ea_si_d8 mov r4, lr |
| ea_si_d16 mov r4, lr | ea_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_SI] | ldrh r1, [r9, #CPU_SI] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| Line 237 ea_di ldrh r1, [r9, #CPU_DI] | Line 237 ea_di ldrh r1, [r9, #CPU_DI] |
| ea_di_d8 mov r4, lr | ea_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_DI] | ldrh r1, [r9, #CPU_DI] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| mov r3, r0 lsl #24 | mov r3, r0 lsl #24 |
| Line 250 ea_di_d8 mov r4, lr | Line 250 ea_di_d8 mov r4, lr |
| ea_di_d16 mov r4, lr | ea_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_DI] | ldrh r1, [r9, #CPU_DI] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| Line 267 ea_bx ldrh r1, [r9, #CPU_BX] | Line 267 ea_bx ldrh r1, [r9, #CPU_BX] |
| ea_bx_d8 mov r4, lr | ea_bx_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| mov r3, r0 lsl #24 | mov r3, r0 lsl #24 |
| Line 280 ea_bx_d8 mov r4, lr | Line 280 ea_bx_d8 mov r4, lr |
| ea_bx_d16 mov r4, lr | ea_bx_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldr r2, [r9, #CPU_DS_FIX] | ldr r2, [r9, #CPU_DS_FIX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| Line 292 ea_bx_d16 mov r4, lr | Line 292 ea_bx_d16 mov r4, lr |
| ea_d16 mov r4, lr | ea_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldr r1, [r9, #CPU_DS_FIX] | ldr r1, [r9, #CPU_DS_FIX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| add r0, r0, r1 | add r0, r0, r1 |
| Line 301 ea_d16 mov r4, lr | Line 301 ea_d16 mov r4, lr |
| ea_bp_d8 mov r4, lr | ea_bp_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldr r2, [r9, #CPU_SS_FIX] | ldr r2, [r9, #CPU_SS_FIX] |
| mov r3, r0 lsl #24 | mov r3, r0 lsl #24 |
| Line 314 ea_bp_d8 mov r4, lr | Line 314 ea_bp_d8 mov r4, lr |
| ea_bp_d16 mov r4, lr | ea_bp_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldr r2, [r9, #CPU_SS_FIX] | ldr r2, [r9, #CPU_SS_FIX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| Line 367 lea_bx_si ldrh r0, [r9, #CPU_BX] | Line 367 lea_bx_si ldrh r0, [r9, #CPU_BX] |
| lea_bx_si_d8 mov r4, lr | lea_bx_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| tst r0, #&80 | tst r0, #&80 |
| Line 381 lea_bx_si_d8 mov r4, lr | Line 381 lea_bx_si_d8 mov r4, lr |
| lea_bx_si_d16 mov r4, lr | lea_bx_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| add r3, r0, r1 | add r3, r0, r1 |
| Line 399 lea_bx_di ldrh r0, [r9, #CPU_BX] | Line 399 lea_bx_di ldrh r0, [r9, #CPU_BX] |
| lea_bx_di_d8 mov r4, lr | lea_bx_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| tst r0, #&80 | tst r0, #&80 |
| Line 413 lea_bx_di_d8 mov r4, lr | Line 413 lea_bx_di_d8 mov r4, lr |
| lea_bx_di_d16 mov r4, lr | lea_bx_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| add r3, r0, r1 | add r3, r0, r1 |
| Line 431 lea_bp_si ldrh r0, [r9, #CPU_BP] | Line 431 lea_bp_si ldrh r0, [r9, #CPU_BP] |
| lea_bp_si_d8 mov r4, lr | lea_bp_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| tst r0, #&80 | tst r0, #&80 |
| Line 445 lea_bp_si_d8 mov r4, lr | Line 445 lea_bp_si_d8 mov r4, lr |
| lea_bp_si_d16 mov r4, lr | lea_bp_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_SI] | ldrh r2, [r9, #CPU_SI] |
| add r3, r0, r1 | add r3, r0, r1 |
| Line 463 lea_bp_di ldrh r0, [r9, #CPU_BP] | Line 463 lea_bp_di ldrh r0, [r9, #CPU_BP] |
| lea_bp_di_d8 mov r4, lr | lea_bp_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| tst r0, #&80 | tst r0, #&80 |
| Line 477 lea_bp_di_d8 mov r4, lr | Line 477 lea_bp_di_d8 mov r4, lr |
| lea_bp_di_d16 mov r4, lr | lea_bp_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_DI] | ldrh r2, [r9, #CPU_DI] |
| add r3, r0, r1 | add r3, r0, r1 |
| Line 492 lea_si ldrh r0, [r9, #CPU_SI] | Line 492 lea_si ldrh r0, [r9, #CPU_SI] |
| lea_si_d8 mov r4, lr | lea_si_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_SI] | ldrh r1, [r9, #CPU_SI] |
| tst r0, #&80 | tst r0, #&80 |
| orrne r0, r0, #&ff00 | orrne r0, r0, #&ff00 |
| Line 504 lea_si_d8 mov r4, lr | Line 504 lea_si_d8 mov r4, lr |
| lea_si_d16 mov r4, lr | lea_si_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_SI] | ldrh r1, [r9, #CPU_SI] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| add r2, r1, r0 | add r2, r1, r0 |
| Line 517 lea_di ldrh r0, [r9, #CPU_DI] | Line 517 lea_di ldrh r0, [r9, #CPU_DI] |
| lea_di_d8 mov r4, lr | lea_di_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_DI] | ldrh r1, [r9, #CPU_DI] |
| tst r0, #&80 | tst r0, #&80 |
| orrne r0, r0, #&ff00 | orrne r0, r0, #&ff00 |
| Line 529 lea_di_d8 mov r4, lr | Line 529 lea_di_d8 mov r4, lr |
| lea_di_d16 mov r4, lr | lea_di_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_DI] | ldrh r1, [r9, #CPU_DI] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| add r2, r1, r0 | add r2, r1, r0 |
| Line 542 lea_bx ldrh r0, [r9, #CPU_BX] | Line 542 lea_bx ldrh r0, [r9, #CPU_BX] |
| lea_bx_d8 mov r4, lr | lea_bx_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| tst r0, #&80 | tst r0, #&80 |
| orrne r0, r0, #&ff00 | orrne r0, r0, #&ff00 |
| Line 554 lea_bx_d8 mov r4, lr | Line 554 lea_bx_d8 mov r4, lr |
| lea_bx_d16 mov r4, lr | lea_bx_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BX] | ldrh r1, [r9, #CPU_BX] |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| add r2, r1, r0 | add r2, r1, r0 |
| Line 564 lea_bx_d16 mov r4, lr | Line 564 lea_bx_d16 mov r4, lr |
| lea_d16 mov r4, lr | lea_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| mov pc, r4 | mov pc, r4 |
| lea_bp_d8 mov r4, lr | lea_bp_d8 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| tst r0, #&80 | tst r0, #&80 |
| orrne r0, r0, #&ff00 | orrne r0, r0, #&ff00 |
| Line 583 lea_bp_d8 mov r4, lr | Line 583 lea_bp_d8 mov r4, lr |
| lea_bp_d16 mov r4, lr | lea_bp_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| ldrh r1, [r9, #CPU_BP] | |
| add r8, r8, #(2 << 16) | |
| add r2, r1, r0 | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| ; ---- calc_a | |
| i286a_a and r1, r0, #(&18 << 3) | |
| and r2, r0, #7 | |
| add r3, pc, r1 lsr #1 | |
| add pc, r3, r2 lsl #2 | |
| b a_bx_si | |
| b a_bx_di | |
| b a_bp_si | |
| b a_bp_di | |
| b a_si | |
| b a_di | |
| b a_d16 | |
| b a_bx | |
| b a_bx_si_d8 | |
| b a_bx_di_d8 | |
| b a_bp_si_d8 | |
| b a_bp_di_d8 | |
| b a_si_d8 | |
| b a_di_d8 | |
| b a_bp_d8 | |
| b a_bx_d8 | |
| b a_bx_si_d16 | |
| b a_bx_di_d16 | |
| b a_bp_si_d16 | |
| b a_bp_di_d16 | |
| b a_si_d16 | |
| b a_di_d16 | |
| b a_bp_d16 | |
| b a_bx_d16 | |
| a_bx_si ldrh r0, [r9, #CPU_BX] | |
| ldrh r1, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r2, r0, r1 | |
| bic r0, r2, #&10000 | |
| mov pc, lr | |
| a_bx_si_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_BX] | |
| ldrh r2, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r1, r2, r1 | |
| add r8, r8, #(1 << 16) | |
| add r2, r0, r1 | |
| bic r0, r2, #(3 << 16) | |
| mov pc, r4 | |
| a_bx_si_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_BX] | |
| ldrh r2, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r3, r0, r1 | |
| add r1, r3, r2 | |
| add r8, r8, #(2 << 16) | |
| bic r0, r1, #(3 << 16) | |
| mov pc, r4 | |
| a_bx_di ldrh r0, [r9, #CPU_BX] | |
| ldrh r1, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r2, r1, r0 | |
| bic r0, r2, #(1 << 16) | |
| mov pc, lr | |
| a_bx_di_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_BX] | |
| ldrh r2, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r1, r2, r1 | |
| add r8, r8, #(1 << 16) | |
| add r2, r0, r1 | |
| bic r0, r2, #(3 << 16) | |
| mov pc, r4 | |
| a_bx_di_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_BX] | |
| ldrh r2, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r3, r0, r1 | |
| add r1, r3, r2 | |
| add r8, r8, #(2 << 16) | |
| bic r0, r1, #(3 << 16) | |
| mov pc, r4 | |
| a_bp_si ldrh r0, [r9, #CPU_BP] | |
| ldrh r1, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| add r2, r0, r1 | |
| bic r0, r2, #&10000 | |
| mov pc, lr | |
| a_bp_si_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_BP] | |
| ldrh r2, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r1, r2, r1 | |
| add r8, r8, #(1 << 16) | |
| add r2, r0, r1 | |
| bic r0, r2, #(3 << 16) | |
| mov pc, r4 | |
| a_bp_si_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_BP] | |
| ldrh r2, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| add r3, r0, r1 | |
| add r1, r3, r2 | |
| add r8, r8, #(2 << 16) | |
| bic r0, r1, #(3 << 16) | |
| mov pc, r4 | |
| a_bp_di ldrh r0, [r9, #CPU_BP] | |
| ldrh r1, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| add r2, r1, r0 | |
| bic r0, r2, #(1 << 16) | |
| mov pc, lr | |
| a_bp_di_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_BP] | |
| ldrh r2, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r1, r2, r1 | |
| add r8, r8, #(1 << 16) | |
| add r2, r0, r1 | |
| bic r0, r2, #(3 << 16) | |
| mov pc, r4 | |
| a_bp_di_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_BP] | ldrh r1, [r9, #CPU_BP] |
| ldrh r2, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_SS_FIX] | |
| add r3, r0, r1 | |
| add r1, r3, r2 | |
| add r8, r8, #(2 << 16) | |
| bic r0, r1, #(3 << 16) | |
| mov pc, r4 | |
| a_si ldrh r0, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| mov pc, lr | |
| a_si_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r2, r0, r1 | |
| add r8, r8, #(1 << 16) | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| a_si_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_SI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| add r2, r1, r0 | add r2, r1, r0 |
| bic r0, r2, #(1 << 16) | bic r0, r2, #(1 << 16) |
| mov pc, r4 | mov pc, r4 |
| a_di ldrh r0, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| mov pc, lr | |
| a_di_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r2, r0, r1 | |
| add r8, r8, #(1 << 16) | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| a_di_d16 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_DI] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r8, r8, #(2 << 16) | |
| add r2, r1, r0 | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| a_bx ldrh r0, [r9, #CPU_BX] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| mov pc, lr | |
| a_bx_d8 mov r4, lr | |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread | |
| ldrh r1, [r9, #CPU_BX] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| tst r0, #&80 | |
| orrne r0, r0, #&ff00 | |
| add r2, r0, r1 | |
| add r8, r8, #(1 << 16) | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| ; ---- test | a_bx_d16 mov r4, lr |
| ldr r0, [r9, #CPU_CS_BASE] | |
| add r0, r0, r8 lsr #16 | |
| bl i286a_memoryread_w | |
| ldrh r1, [r9, #CPU_BX] | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r8, r8, #(2 << 16) | |
| add r2, r1, r0 | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| IMPORT i286core | a_d16 mov r4, lr |
| EXPORT i286a_ea_test | ldr r0, [r9, #CPU_CS_BASE] |
| EXPORT i286a_lea_test | add r0, r0, r8 lsr #16 |
| bl i286a_memoryread_w | |
| ldr r6, [r9, #CPU_DS_FIX] | |
| add r8, r8, #(2 << 16) | |
| mov pc, r4 | |
| i286a_ea_test stmdb sp!, {r4, r8, r9, lr} | a_bp_d8 mov r4, lr |
| ldr r9, iet_i286core | ldr r0, [r9, #CPU_CS_BASE] |
| ldrh r8, [r9, #CPU_IP] | add r0, r0, r8 lsr #16 |
| mov r8, r8 lsl #16 | bl i286a_memoryread |
| bl i286a_ea | ldrh r1, [r9, #CPU_BP] |
| mov r8, r8 lsr #16 | ldr r6, [r9, #CPU_SS_FIX] |
| strh r8, [r9, #CPU_IP] | tst r0, #&80 |
| ldmia sp!, {r4, r8, r9, pc} | orrne r0, r0, #&ff00 |
| iet_i286core dcd i286core - CPU_REG | add r2, r0, r1 |
| add r8, r8, #(1 << 16) | |
| bic r0, r2, #(1 << 16) | |
| mov pc, r4 | |
| i286a_lea_test stmdb sp!, {r4, r8, r9, lr} | a_bp_d16 mov r4, lr |
| ldr r9, ilt_i286core | ldr r0, [r9, #CPU_CS_BASE] |
| ldrh r8, [r9, #CPU_IP] | ldr r6, [r9, #CPU_SS_FIX] |
| mov r8, r8 lsl #16 | add r0, r0, r8 lsr #16 |
| bl i286a_lea | bl i286a_memoryread_w |
| mov r8, r8 lsr #16 | ldrh r1, [r9, #CPU_BP] |
| strh r8, [r9, #CPU_IP] | add r8, r8, #(2 << 16) |
| ldmia sp!, {r4, r8, r9, pc} | add r2, r1, r0 |
| ilt_i286core dcd i286core - CPU_REG | bic r0, r2, #(1 << 16) |
| mov pc, r4 | |
| END | END |