np2/i286a/i286a_mn.s - diff

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Diff for /np2/i286a/i286a_mn.s between versions 1.9 and 1.10

version 1.9, 2003/12/18 23:07:49	version 1.10, 2003/12/19 00:25:49
Line 3	Line 3
INCLUDE i286aea.inc	INCLUDE i286aea.inc
INCLUDE i286aalu.inc	INCLUDE i286aalu.inc
INCLUDE i286aop.inc	INCLUDE i286aop.inc
INCLUDE i286apic.inc	INCLUDE i286aio.inc

IMPORT i286core	IMPORT i286core
IMPORT _szpcflag8	IMPORT _szpcflag8
IMPORT i286a_localint	IMPORT i286a_localint
	IMPORT i286a_trapint
	EXPORT i286a_trapintr
IMPORT i286a_ea	IMPORT i286a_ea
IMPORT i286a_lea	IMPORT i286a_lea
IMPORT i286a_a	IMPORT i286a_a

IMPORT i286_memoryread	IMPORT i286a_memoryread
IMPORT i286_memoryread_w	IMPORT i286a_memoryread_w
IMPORT i286_memorywrite	IMPORT i286a_memorywrite
IMPORT i286_memorywrite_w	IMPORT i286a_memorywrite_w

IMPORT iocore_inp8	IMPORT iocore_inp8
IMPORT iocore_inp16	IMPORT iocore_inp16
IMPORT iocore_out8	IMPORT iocore_out8
IMPORT iocore_out16	IMPORT iocore_out16

	IMPORT dmap_i286
IMPORT biosfunc	IMPORT biosfunc

IMPORT dmac	IMPORT dmac
Line 433 pusha ldrh r4, [r9, #CPU_SP]	Line 436 pusha ldrh r4, [r9, #CPU_SP]
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_CX]	ldrh r1, [r9, #CPU_CX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_DX]	ldrh r1, [r9, #CPU_DX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_BX]	ldrh r1, [r9, #CPU_BX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
mov r1, r6	mov r1, r6
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_BP]	ldrh r1, [r9, #CPU_BP]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_SI]	ldrh r1, [r9, #CPU_SI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_DI]	ldrh r1, [r9, #CPU_DI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
mov r0, r4 lsr #16	mov r0, r4 lsr #16
strh r0, [r9, #CPU_SP]	strh r0, [r9, #CPU_SP]
mov pc, r11	mov pc, r11
Line 471 popa ldrh r4, [r9, #CPU_SP]	Line 474 popa ldrh r4, [r9, #CPU_SP]
CPUWORK #19	CPUWORK #19
add r0, r5, r4	add r0, r5, r4
mov r4, r4 lsl #16	mov r4, r4 lsl #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_DI]	strh r0, [r9, #CPU_DI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_SI]	strh r0, [r9, #CPU_SI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(4 << 16)	add r4, r4, #(4 << 16)
strh r0, [r9, #CPU_BP]	strh r0, [r9, #CPU_BP]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_BX]	strh r0, [r9, #CPU_BX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_DX]	strh r0, [r9, #CPU_DX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_CX]	strh r0, [r9, #CPU_CX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
mov r0, r4 lsr #16	mov r0, r4 lsr #16
Line 511 bound GETPC8	Line 514 bound GETPC8
bl i286a_a	bl i286a_a
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bl i286_memoryread_w	bl i286a_memoryread_w
cmp r5, r0	cmp r5, r0
bcc bndout	bcc bndout
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
cmp r5, r0	cmp r5, r0
movls pc, r11	movls pc, r11
bndout mov r6, #5	bndout mov r6, #5
Line 535 push_d16 CPUWORK #3	Line 538 push_d16 CPUWORK #3
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
add r0, r2, r3	add r0, r2, r3
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

imul_r_ea_d16 REG16EA r5, #21, #24	imul_r_ea_d16 REG16EA r5, #21, #24
mov r4, r0, lsl #16	mov r4, r0, lsl #16
Line 564 push_d8 CPUWORK #3	Line 567 push_d8 CPUWORK #3
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
add r0, r2, r3	add r0, r2, r3
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

imul_r_ea_d8 REG16EA r5, #21, #24	imul_r_ea_d8 REG16EA r5, #21, #24
mov r4, r0, lsl #16	mov r4, r0, lsl #16
Line 596 insb CPUWORK #5	Line 599 insb CPUWORK #5
subne r2, r2, #1	subne r2, r2, #1
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite	b i286a_memorywrite

insw CPUWORK #5	insw CPUWORK #5
ldrh r0, [r9, #CPU_DX]	ldrh r0, [r9, #CPU_DX]
Line 612 insw CPUWORK #5	Line 615 insw CPUWORK #5
subne r2, r2, #2	subne r2, r2, #2
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite_w	b i286a_memorywrite_w

outsb CPUWORK #3	outsb CPUWORK #3
ldrh r1, [r9, #CPU_SI]	ldrh r1, [r9, #CPU_SI]
Line 622 outsb CPUWORK #3	Line 625 outsb CPUWORK #3
addeq r1, r1, #1	addeq r1, r1, #1
subne r1, r1, #1	subne r1, r1, #1
strh r1, [r9, #CPU_SI]	strh r1, [r9, #CPU_SI]
bl i286_memoryread	bl i286a_memoryread
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
CPUSV	CPUSV
Line 638 outsw CPUWORK #3	Line 641 outsw CPUWORK #3
addeq r1, r1, #2	addeq r1, r1, #2
subne r1, r1, #2	subne r1, r1, #2
strh r1, [r9, #CPU_SI]	strh r1, [r9, #CPU_SI]
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
CPUSV	CPUSV
Line 683 xchgear8_1 CPUWORK #5	Line 686 xchgear8_1 CPUWORK #5
strb r4, [r6, #CPU_REG]	strb r4, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear8_2 mov r5, r0	xchgear8_2 mov r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrb r1, [r6, #CPU_REG]	ldrb r1, [r6, #CPU_REG]
strb r0, [r6, #CPU_REG]	strb r0, [r6, #CPU_REG]
mov r0, r5	mov r0, r5
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

xchg_ea_r16 EAREG16 r6	xchg_ea_r16 EAREG16 r6
cmp r0, #&c0	cmp r0, #&c0
Line 712 xchgear16_1 CPUWORK #5	Line 715 xchgear16_1 CPUWORK #5
strh r4, [r6, #CPU_REG]	strh r4, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear16_2 mov r5, r0	xchgear16_2 mov r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r1, [r6, #CPU_REG]	ldrh r1, [r6, #CPU_REG]
strh r0, [r6, #CPU_REG]	strh r0, [r6, #CPU_REG]
mov r0, r5	mov r0, r5
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

mov_ea_r8 EAREG8 r6	mov_ea_r8 EAREG8 r6
cmp r0, #&c0	cmp r0, #&c0
Line 731 movear8_1 CPUWORK #5	Line 734 movear8_1 CPUWORK #5
bl i286a_ea	bl i286a_ea
ldrb r1, [r6, #CPU_REG]	ldrb r1, [r6, #CPU_REG]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

mov_ea_r16 EAREG16 r6	mov_ea_r16 EAREG16 r6
cmp r0, #&c0	cmp r0, #&c0
Line 745 movear16_1 CPUWORK #5	Line 748 movear16_1 CPUWORK #5
bl i286a_ea	bl i286a_ea
ldrh r1, [r6, #CPU_REG]	ldrh r1, [r6, #CPU_REG]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

mov_r8_ea REG8EA r5, #2, #5	mov_r8_ea REG8EA r5, #2, #5
strb r0, [r5, #CPU_REG]	strb r0, [r5, #CPU_REG]
Line 769 measegm CPUWORK #3	Line 772 measegm CPUWORK #3
bl i286a_ea	bl i286a_ea
mov r1, r5	mov r1, r5
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

lea_r16_ea CPUWORK #3	lea_r16_ea CPUWORK #3
GETPC8	GETPC8
Line 796 mov_seg_ea GETPC8	Line 799 mov_seg_ea GETPC8
mov pc, r6	mov pc, r6
msegeam CPUWORK #5	msegeam CPUWORK #5
bl i286a_ea	bl i286a_ea
bl i286_memoryread_w	bl i286a_memoryread_w
mov pc, r6	mov pc, r6
msegea_tbl dcd msegea_es	msegea_tbl dcd msegea_es
dcd msegea_cs	dcd msegea_cs
Line 828 pop_ea POP #5	Line 831 pop_ea POP #5
bl i286a_ea	bl i286a_ea
mov r1, r5	mov r1, r5
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w
popreg R16SRC r0, r1	popreg R16SRC r0, r1
strh r4, [r1, #CPU_REG]	strh r4, [r1, #CPU_REG]
mov pc, r11	mov pc, r11
Line 882 call_far CPUWORK #13	Line 885 call_far CPUWORK #13
mov r4, r4 lsl #16	mov r4, r4 lsl #16
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w ; cs	bl i286a_memorywrite_w ; cs
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r12, r8, #(4 << 16)	add r12, r8, #(4 << 16)
mov r4, r4, lsr #16	mov r4, r4, lsr #16
mov r1, r12 lsr #16	mov r1, r12 lsr #16
add r0, r4, r5	add r0, r4, r5
bl i286_memorywrite_w ; ip	bl i286a_memorywrite_w ; ip
ldr r5, [r9, #CPU_CS_BASE]	ldr r5, [r9, #CPU_CS_BASE]
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread_w ; newip	bl i286a_memoryread_w ; newip
add r8, r8, #(2 << 16)	add r8, r8, #(2 << 16)
mov r4, r0 lsl #16	mov r4, r0 lsl #16
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
str r1, [r9, #CPU_CS_BASE]	str r1, [r9, #CPU_CS_BASE]
Line 916 pushf CPUWORK #3	Line 919 pushf CPUWORK #3
strh r3, [r9, #CPU_SP]	strh r3, [r9, #CPU_SP]
add r0, r3, r2	add r0, r3, r2
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

popf POP #5	popf POP #5
mov r2, #3	mov r2, #3
Line 950 mov_al_m8 CPUWORK #5	Line 953 mov_al_m8 CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r5, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
mov pc, r11	mov pc, r11

Line 958 mov_ax_m16 CPUWORK #5	Line 961 mov_ax_m16 CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r5, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
mov pc, r11	mov pc, r11

Line 968 mov_m8_al CPUWORK #5	Line 971 mov_m8_al CPUWORK #5
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
add r0, r5, r0	add r0, r5, r0
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

mov_m16_ax CPUWORK #5	mov_m16_ax CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r5, [r9, #CPU_DS_FIX]
Line 976 mov_m16_ax CPUWORK #5	Line 979 mov_m16_ax CPUWORK #5
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
add r0, r5, r0	add r0, r5, r0
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

movsb CPUWORK #5	movsb CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 985 movsb CPUWORK #5	Line 988 movsb CPUWORK #5
moveq r4, #1	moveq r4, #1
movne r4, #-1	movne r4, #-1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
add r5, r5, r4	add r5, r5, r4
Line 995 movsb CPUWORK #5	Line 998 movsb CPUWORK #5
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

movsw CPUWORK #5	movsw CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 1004 movsw CPUWORK #5	Line 1007 movsw CPUWORK #5
moveq r4, #2	moveq r4, #2
movne r4, #-2	movne r4, #-2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
add r5, r5, r4	add r5, r5, r4
Line 1014 movsw CPUWORK #5	Line 1017 movsw CPUWORK #5
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

cmpsb CPUWORK #8	cmpsb CPUWORK #8
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 1022 cmpsb CPUWORK #8	Line 1025 cmpsb CPUWORK #8
;	;
;	;
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
mov r6, r0	mov r6, r0
Line 1034 cmpsb CPUWORK #8	Line 1037 cmpsb CPUWORK #8
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
bl i286_memoryread	bl i286a_memoryread
SUB8 r6, r0	SUB8 r6, r0
mov pc, r11	mov pc, r11

Line 1044 cmpsw CPUWORK #8	Line 1047 cmpsw CPUWORK #8
;	;
;	;
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
mov r6, r0	mov r6, r0
Line 1056 cmpsw CPUWORK #8	Line 1059 cmpsw CPUWORK #8
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
bl i286_memoryread_w	bl i286a_memoryread_w
SUB16 r6, r0	SUB16 r6, r0
mov pc, r11	mov pc, r11

Line 1070 stosb CPUWORK #3	Line 1073 stosb CPUWORK #3
add r0, r2, r0	add r0, r2, r0
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

stosw CPUWORK #3	stosw CPUWORK #3
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
Line 1082 stosw CPUWORK #3	Line 1085 stosw CPUWORK #3
add r0, r2, r0	add r0, r2, r0
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

lodsb CPUWORK #5	lodsb CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 1091 lodsb CPUWORK #5	Line 1094 lodsb CPUWORK #5
addeq r6, r5, #1	addeq r6, r5, #1
subne r6, r5, #1	subne r6, r5, #1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
strh r6, [r9, #CPU_SI]	strh r6, [r9, #CPU_SI]
mov pc, r11	mov pc, r11
Line 1103 lodsw CPUWORK #5	Line 1106 lodsw CPUWORK #5
addeq r6, r5, #2	addeq r6, r5, #2
subne r6, r5, #2	subne r6, r5, #2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
strh r6, [r9, #CPU_SI]	strh r6, [r9, #CPU_SI]
mov pc, r11	mov pc, r11
Line 1115 scasb CPUWORK #7	Line 1118 scasb CPUWORK #7
addeq r6, r5, #1	addeq r6, r5, #1
subne r6, r5, #1	subne r6, r5, #1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrb r5, [r9, #CPU_AL]	ldrb r5, [r9, #CPU_AL]
strh r6, [r9, #CPU_DI]	strh r6, [r9, #CPU_DI]
SUB8 r5, r0	SUB8 r5, r0
Line 1128 scasw CPUWORK #7	Line 1131 scasw CPUWORK #7
addeq r6, r5, #2	addeq r6, r5, #2
subne r6, r5, #2	subne r6, r5, #2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r5, [r9, #CPU_AX]	ldrh r5, [r9, #CPU_AX]
strh r6, [r9, #CPU_DI]	strh r6, [r9, #CPU_DI]
SUB16 r5, r0	SUB16 r5, r0
Line 1143 ret_near_d16 GETPC16	Line 1146 ret_near_d16 GETPC16
add r0, r1, r2	add r0, r1, r2
add r3, r3, #2	add r3, r3, #2
strh r3, [r9, #CPU_SP]	strh r3, [r9, #CPU_SP]
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
Line 1157 ret_near CPUWORK #11	Line 1160 ret_near CPUWORK #11
add r0, r1, r0	add r0, r1, r0
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
mov r8, r8 lsr #16	mov r8, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
mov pc, r11	mov pc, r11

Line 1170 les_r16_ea GETPC8	Line 1173 les_r16_ea GETPC8
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_ES]	strh r0, [r9, #CPU_ES]
str r1, [r9, #CPU_ES_BASE]	str r1, [r9, #CPU_ES_BASE]
Line 1191 lds_r16_ea GETPC8	Line 1194 lds_r16_ea GETPC8
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_DS]	strh r0, [r9, #CPU_DS]
str r1, [r9, #CPU_DS_BASE]	str r1, [r9, #CPU_DS_BASE]
Line 1211 mov_ea8_d8 GETPC8	Line 1214 mov_ea8_d8 GETPC8
mov r1, r0	mov r1, r0
mov r0, r4	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite
med8_r CPUWORK #2	med8_r CPUWORK #2
R8DST r0, r4	R8DST r0, r4
GETPC8	GETPC8
Line 1228 mov_ea16_d16 GETPC8	Line 1231 mov_ea16_d16 GETPC8
mov r1, r0	mov r1, r0
mov r0, r4	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w
med16_r CPUWORK #2	med16_r CPUWORK #2
R16DST r0, r4	R16DST r0, r4
GETPC16	GETPC16
Line 1242 enter ldrh r4, [r9, #CPU_SP]	Line 1245 enter ldrh r4, [r9, #CPU_SP]
addcc r4, r4, #&10000	addcc r4, r4, #&10000
mov r1, r5	mov r1, r5
add r0, r4, r0	add r0, r4, r0
bl i286_memorywrite_w	bl i286a_memorywrite_w
GETPC16	GETPC16
mov r6, r0	mov r6, r0
GETPC8	GETPC8
Line 1265 enterlv1 cmp r0, #1	Line 1268 enterlv1 cmp r0, #1
sub r2, r4, r6	sub r2, r4, r6
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
bl i286_memorywrite_w	bl i286a_memorywrite_w
enterlv2 mov r1, r0, lsl #2	enterlv2 mov r1, r0, lsl #2
add r1, r1, #12	add r1, r1, #12
CPUWORK r1	CPUWORK r1
Line 1282 enterlv2 mov r1, r0, lsl #2	Line 1285 enterlv2 mov r1, r0, lsl #2
mov r1, r5	mov r1, r5
mov r5, r5 lsl #16	mov r5, r5 lsl #16
add r0, r11, r2	add r0, r11, r2
bl i286_memorywrite_w	bl i286a_memorywrite_w
entlv2lp sub r5, r5, #(2 << 16)	entlv2lp sub r5, r5, #(2 << 16)
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r11, r5 lsr #16	add r0, r11, r5 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0	mov r1, r0
add r0, r11, r4	add r0, r11, r4
bl i286_memorywrite_w	bl i286a_memorywrite_w
subs r6, r6, #1	subs r6, r6, #1
bne entlv2lp	bne entlv2lp
ldr pc, [sp], #4	ldr pc, [sp], #4
Line 1299 leave ldrh r1, [r9, #CPU_BP]	Line 1302 leave ldrh r1, [r9, #CPU_BP]
CPUWORK #5	CPUWORK #5
add r4, r1, #2	add r4, r1, #2
add r0, r1, r0	add r0, r1, r0
bl i286_memoryread_w	bl i286a_memoryread_w
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_BP]	strh r0, [r9, #CPU_BP]
mov pc, r11	mov pc, r11
Line 1313 ret_far_d16 CPUWORK #15	Line 1316 ret_far_d16 CPUWORK #15
;	;
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r6, r4	add r4, r6, r4
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
Line 1334 ret_far CPUWORK #15	Line 1337 ret_far CPUWORK #15
;	;
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
Line 1370 iret bl extirq_pop	Line 1373 iret bl extirq_pop
;	;
add r4, r1, #2	add r4, r1, #2
add r0, r1, r5	add r0, r1, r5
bl i286_memoryread_w	bl i286a_memoryread_w
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
mov r8, r0 lsl #16	mov r8, r0 lsl #16
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
str r1, [r9, #CPU_CS_BASE]	str r1, [r9, #CPU_CS_BASE]
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
mov r2, #3	mov r2, #3
bic r1, r0, #&f000 ; i286	bic r1, r0, #&f000 ; i286
Line 1455 xlat ldrb r0, [r9, #CPU_AL]	Line 1458 xlat ldrb r0, [r9, #CPU_AL]
add r0, r1, r0	add r0, r1, r0
bic r0, r0, #(1 << 16)	bic r0, r0, #(1 << 16)
add r0, r2, r0	add r0, r2, r0
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
mov pc, r11	mov pc, r11

Line 1562 call_near CPUWORK #7	Line 1565 call_near CPUWORK #7
add r8, r8, r0 lsl #16	add r8, r8, r0 lsl #16
add r0, r3, r2 lsr #16	add r0, r3, r2 lsr #16
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

jmp_near ldr r4, [r9, #CPU_CS_BASE]	jmp_near ldr r4, [r9, #CPU_CS_BASE]
add r5, r8, #(2 << 16)	add r5, r8, #(2 << 16)
CPUWORK #7	CPUWORK #7
add r0, r4, r8 lsr #16	add r0, r4, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r8, r5, r0 lsl #16	add r8, r5, r0 lsl #16
mov pc, r11	mov pc, r11

Line 1577 jmp_far CPUWORK #11	Line 1580 jmp_far CPUWORK #11
add r5, r8, #(2 << 16)	add r5, r8, #(2 << 16)
mov r6, r8 lsl #16	mov r6, r8 lsl #16
add r0, r4, r8 lsr #16	add r0, r4, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r0 lsl #16	mov r8, r0 lsl #16
add r0, r4, r5 lsr #16	add r0, r4, r5 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r8, r8, r6 lsr #16	add r8, r8, r6 lsr #16
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
Line 1681 i286a_step stmdb sp!, {r4 - r11, lr}	Line 1684 i286a_step stmdb sp!, {r4 - r11, lr}

adr r4, optbl1	adr r4, optbl1
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
mov r11, pc	mov r11, pc
Line 1693 i286a_step stmdb sp!, {r4 - r11, lr}	Line 1696 i286a_step stmdb sp!, {r4 - r11, lr}

i286a stmdb sp!, {r4 - r11, lr}	i286a stmdb sp!, {r4 - r11, lr}
ldr r9, ias_r9	ldr r9, ias_r9
ldr r1, ias_r1	ldr r2, ias_r1
ldr r10, ias_r10	ldr r10, ias_r10
ldr r5, [r9, #CPU_CS_BASE]
ldr r8, [r9, #CPU_FLAG]	ldr r8, [r9, #CPU_FLAG]
	ldr r5, [r9, #CPU_CS_BASE]
	ldr r1, [r2, #DMAC_WORKING]
	and r0, r8, #(I_FLAG + T_FLAG)
	cmp r0, #(I_FLAG + T_FLAG)
	beq i286awithtrap
	cmp r1, #0
	bne i286awithdma
adr r4, optbl1	adr r4, optbl1
i286a_lp add r0, r5, r8 lsr #16	i286a_lp add r0, r5, r8 lsr #16
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
mov r11, pc	mov r11, pc
Line 1716 ias_r9 dcd i286core - CPU_REG	Line 1725 ias_r9 dcd i286core - CPU_REG
ias_r1 dcd dmac	ias_r1 dcd dmac
ias_r10 dcd _szpcflag8	ias_r10 dcd _szpcflag8

	i286awithdma adr r4, optbl1
	i286awdma_lp add r0, r5, r8 lsr #16
	bl i286a_memoryread
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	mov r11, pc
	mov pc, r1
	bl dmap_i286
	ldr r7, [r9, #CPU_REMAINCLOCK]
	ldr r5, [r9, #CPU_CS_BASE]
	adr r4, optbl1
	cmp r7, #0
	bgt i286awdma_lp
	str r8, [r9, #CPU_FLAG]
	ldmia sp!, {r4 - r11, pc}

	i286awithtrap adr r4, optbl1
	i286awtrp_lp add r0, r5, r8 lsr #16
	bl i286a_memoryread
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	mov r11, pc
	mov pc, r1
	bl dmap_i286
	and r0, r8, #(I_FLAG + T_FLAG)
	cmp r0, #(I_FLAG + T_FLAG)
	beq i286a_trapint
	i286a_trapintr str r8, [r9, #CPU_FLAG]
	ldmia sp!, {r4 - r11, pc}

optbl1 dcd add_ea_r8 ; 00	optbl1 dcd add_ea_r8 ; 00
dcd add_ea_r16	dcd add_ea_r16
Line 2004 $label ldr r1, [r9, $b]	Line 2042 $label ldr r1, [r9, $b]
add r6, r6, #1	add r6, r6, #1
cmp r6, #MAX_PREFIX	cmp r6, #MAX_PREFIX
bcs prefix_fault	bcs prefix_fault
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]	strb r6, [r9, #CPU_PREFIX]
Line 2041 repne ldrb r6, [r9, #CPU_PREFIX]	Line 2079 repne ldrb r6, [r9, #CPU_PREFIX]
add r6, r6, #1	add r6, r6, #1
cmp r6, #MAX_PREFIX	cmp r6, #MAX_PREFIX
bcs prefix_fault	bcs prefix_fault
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]	strb r6, [r9, #CPU_PREFIX]
Line 2331 repe ldrb r6, [r9, #CPU_PREFIX]	Line 2369 repe ldrb r6, [r9, #CPU_PREFIX]
add r6, r6, #1	add r6, r6, #1
cmp r6, #MAX_PREFIX	cmp r6, #MAX_PREFIX
bcs prefix_fault	bcs prefix_fault
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]	strb r6, [r9, #CPU_PREFIX]

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.9
changed lines
	Added in v.1.10