np2/i286a/i286a_mn.s - diff

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Diff for /np2/i286a/i286a_mn.s between versions 1.3 and 1.5

version 1.3, 2003/12/16 21:59:07	version 1.5, 2003/12/17 10:41:06
Line 7	Line 7
IMPORT _szpcflag8	IMPORT _szpcflag8
IMPORT i286a_ea	IMPORT i286a_ea
IMPORT i286a_lea	IMPORT i286a_lea
	IMPORT i286a_a
IMPORT i286_memoryread	IMPORT i286_memoryread
IMPORT i286_memoryread_w	IMPORT i286_memoryread_w
IMPORT i286_memorywrite	IMPORT i286_memorywrite
Line 17	Line 18
IMPORT iocore_out16	IMPORT iocore_out16
IMPORT i286a_localint	IMPORT i286a_localint

	IMPORT i286aop80
	IMPORT i286aop81
	IMPORT i286aop83

	IMPORT i286asft8_1
	IMPORT i286asft16_1
	IMPORT i286asft8_cl
	IMPORT i286asft8_d8
	IMPORT i286asft16_cl
	IMPORT i286asft16_d8

	IMPORT i286aopfe
	IMPORT i286aopff

EXPORT i286a_step	EXPORT i286a_step
EXPORT optbl1	EXPORT optbl1

Line 130 pop_di REGPOP #CPU_DI, #5	Line 145 pop_di REGPOP #CPU_DI, #5

; pusha *	; pusha *
; popa *	; popa *
; bound	; bound +
; arpl	; arpl +
; push_d16 *	; push_d16 *
; imul_r_ea_d16 +	; imul_r_ea_d16 +
; push_d8 *	; push_d8 *
Line 229 mov_di_imm MOVIMM16 #CPU_DI, #2	Line 244 mov_di_imm MOVIMM16 #CPU_DI, #2
; shift_ea16_d8	; shift_ea16_d8
; ret_near_d16 +	; ret_near_d16 +
; ret_near +	; ret_near +
; les_r16_ea	; les_r16_ea +
; lds_r16_ea	; lds_r16_ea +
; mov_ea8_d8 *	; mov_ea8_d8 *
; mov_ea16_d16 *	; mov_ea16_d16 *
; enter	; enter
Line 288 jmp_short JMPS #7	Line 303 jmp_short JMPS #7

; ----	; ----

	reserved mov r6, #6
	sub r8, r8, #(1 << 16)
	b i286a_localint

daa CPUWORK #3	daa CPUWORK #3
ldrb r0, [r9, #CPU_AL]	ldrb r0, [r9, #CPU_AL]
bic r8, r8, #O_FLAG	bic r8, r8, #O_FLAG
Line 371 aas1 orr r8, r8, #(A_FLAG + C_FLAG)	Line 390 aas1 orr r8, r8, #(A_FLAG + C_FLAG)
mov pc, r11	mov pc, r11


pusha ldrh r4, [r9, #CPU_SP]	pusha CPUWORK #17
	ldrh r4, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
mov r6, r4	mov r6, r4
mov r4, r4 lsl #16	mov r4, r4 lsl #16
Line 411 pusha ldrh r4, [r9, #CPU_SP]	Line 431 pusha ldrh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_SP]	strh r0, [r9, #CPU_SP]
mov pc, r11	mov pc, r11

popa ldrh r4, [r9, #CPU_SP]	popa CPUWORK #19
	ldrh r4, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
add r0, r5, r4	add r0, r5, r4
mov r4, r4 lsl #16	mov r4, r4 lsl #16
Line 446 popa ldrh r4, [r9, #CPU_SP]	Line 467 popa ldrh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_SP]	strh r0, [r9, #CPU_SP]
mov pc, r11	mov pc, r11

	bound GETPC8
	cmp r0, #&c0
	bcs bndreg
	CPUWORK #13
	R16DST r0, r12
	ldrh r5, [r12, #CPU_REG]
	bl i286a_a
	add r4, r0, #2
	add r0, r0, r6
	bl i286_memoryread_w
	cmp r5, r0
	bcc bndout
	bic r4, r4, #(1 << 16)
	add r0, r4, r6
	bl i286_memoryread_w
	cmp r5, r0
	movls pc, r11
	bndout mov r6, #5
	b i286a_localint
	bndreg mov r6, #6
	sub r8, r8, #(2 << 16)
	b i286a_localint

push_d16 CPUWORK #3	push_d16 CPUWORK #3
GETPC16	GETPC16
ldrh r2, [r9, #CPU_SP]	ldrh r2, [r9, #CPU_SP]
Line 503 imul_r_ea_d8 REG16EA r5, #21, #24	Line 547 imul_r_ea_d8 REG16EA r5, #21, #24
orrne r8, r8, #C_FLAG	orrne r8, r8, #C_FLAG
mov pc, r11	mov pc, r11

insb ldrh r0, [r9, #CPU_DX]	insb CPUWORK #5
	ldrh r0, [r9, #CPU_DX]
bl iocore_inp8	bl iocore_inp8
ldrh r2, [r9, #CPU_DI]	ldrh r2, [r9, #CPU_DI]
ldr r3, [r9, #CPU_ES_BASE]	ldr r3, [r9, #CPU_ES_BASE]
Line 516 insb ldrh r0, [r9, #CPU_DX]	Line 561 insb ldrh r0, [r9, #CPU_DX]
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite	b i286_memorywrite

insw ldrh r0, [r9, #CPU_DX]	insw CPUWORK #5
	ldrh r0, [r9, #CPU_DX]
bl iocore_inp16	bl iocore_inp16
ldrh r2, [r9, #CPU_DI]	ldrh r2, [r9, #CPU_DI]
ldr r3, [r9, #CPU_ES_BASE]	ldr r3, [r9, #CPU_ES_BASE]
Line 529 insw ldrh r0, [r9, #CPU_DX]	Line 575 insw ldrh r0, [r9, #CPU_DX]
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite_w	b i286_memorywrite_w

outsb ldrh r1, [r9, #CPU_SI]	outsb CPUWORK #3
	ldrh r1, [r9, #CPU_SI]
ldr r2, [r9, #CPU_DS_FIX]	ldr r2, [r9, #CPU_DS_FIX]
add r0, r1, r2	add r0, r1, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
Line 539 outsb ldrh r1, [r9, #CPU_SI]	Line 586 outsb ldrh r1, [r9, #CPU_SI]
bl i286_memoryread	bl i286_memoryread
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
mov lr, r11	CPUSV
b iocore_out8	bl iocore_out8
	CPULD
	mov pc, r11

outsw ldrh r1, [r9, #CPU_SI]	outsw CPUWORK #3
	ldrh r1, [r9, #CPU_SI]
ldr r2, [r9, #CPU_DS_FIX]	ldr r2, [r9, #CPU_DS_FIX]
add r0, r1, r2	add r0, r1, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
Line 552 outsw ldrh r1, [r9, #CPU_SI]	Line 602 outsw ldrh r1, [r9, #CPU_SI]
bl i286_memoryread_w	bl i286_memoryread_w
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
mov lr, r11	CPUSV
b iocore_out16	bl iocore_out16
	CPULD
	mov pc, r11

jle_short tst r8, #Z_FLAG	jle_short tst r8, #Z_FLAG
bne jmps	bne jmps
Line 657 movear16_1 CPUWORK #5	Line 709 movear16_1 CPUWORK #5
b i286_memorywrite_w	b i286_memorywrite_w

mov_r8_ea REG8EA r5, #2, #5	mov_r8_ea REG8EA r5, #2, #5
ldrb r0, [r5, #CPU_REG]	strb r0, [r5, #CPU_REG]
mov pc, r11	mov pc, r11

mov_r16_ea REG16EA r5, #2, #5	mov_r16_ea REG16EA r5, #2, #5
ldrh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
mov pc, r11	mov pc, r11

mov_ea_seg GETPC8	mov_ea_seg GETPC8
Line 817 movsb CPUWORK #5	Line 869 movsb CPUWORK #5
mov r1, r0	mov r1, r0
mov r12, r12 lsr #(10 - 1)	mov r12, r12 lsr #(10 - 1)
add r0, r2, r3	add r0, r2, r3
add r2, r12, #-1	rsb r2, r12, #1
mov lr, r11	mov lr, r11
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
Line 836 movsw CPUWORK #5	Line 888 movsw CPUWORK #5
mov r1, r0	mov r1, r0
mov r12, r12 lsr #(10 - 2)	mov r12, r12 lsr #(10 - 2)
add r0, r2, r3	add r0, r2, r3
add r2, r12, #-2	rsb r2, r12, #2
mov lr, r11	mov lr, r11
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
Line 855 cmpsb CPUWORK #8	Line 907 cmpsb CPUWORK #8
and r12, r8, #D_FLAG	and r12, r8, #D_FLAG
mov r12, r12 lsr #(10 - 1)	mov r12, r12 lsr #(10 - 1)
add r0, r2, r3	add r0, r2, r3
add r2, r12, #-1	rsb r2, r12, #1
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
Line 875 cmpsw CPUWORK #8	Line 927 cmpsw CPUWORK #8
and r12, r8, #D_FLAG	and r12, r8, #D_FLAG
mov r12, r12 lsr #(10 - 2)	mov r12, r12 lsr #(10 - 2)
add r0, r2, r3	add r0, r2, r3
add r2, r12, #-2	rsb r2, r12, #2
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
Line 985 ret_near CPUWORK #11	Line 1037 ret_near CPUWORK #11
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
mov pc, r11	mov pc, r11

mov_ea8_d8 GETPC16	les_r16_ea GETPC8
and r1, r0, #&ff	cmp r0, #&c0
mov r4, r0, lsr #8	bcs lr16_r
cmp r1, #&c0	CPUWORK #3
	R16DST r0, r5
	bl i286a_a
	add r4, r0, #2
	add r0, r0, r6
	bic r4, r4, #(1 << 16)
	bl i286_memoryread_w
	ldrh r0, [r5, #CPU_REG]
	add r0, r4, r6
	bl i286_memoryread_w
	mov r1, r0 lsl #4
	ldr r0, [r5, #CPU_ES]
	ldr r1, [r5, #CPU_ES_BASE]
	mov pc, r11
	lr16_r mov r6, #6
	sub r8, r8, #(2 << 16)
	b i286a_localint

	lds_r16_ea GETPC8
	cmp r0, #&c0
	bcs lr16_r
	CPUWORK #3
	R16DST r0, r5
	bl i286a_a
	add r4, r0, #2
	add r0, r0, r6
	bic r4, r4, #(1 << 16)
	bl i286_memoryread_w
	ldrh r0, [r5, #CPU_REG]
	add r0, r4, r6
	bl i286_memoryread_w
	mov r1, r0 lsl #4
	ldr r0, [r5, #CPU_ES]
	ldr r1, [r5, #CPU_DS_BASE]
	ldr r1, [r5, #CPU_DS_FIX]
	mov pc, r11

	mov_ea8_d8 GETPC8
	cmp r0, #&c0
bcs med8_r	bcs med8_r
	CPUWORK #3
bl i286a_ea	bl i286a_ea
mov r1, r4	mov r4, r0
	GETPC8
	mov r1, r0
	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286_memorywrite
med8_r R8DST r0, r1	med8_r CPUWORK #2
ldrb r4, [r1, #CPU_REG]	R8DST r0, r4
	GETPC8
	ldrb r0, [r4, #CPU_REG]
mov pc, r11	mov pc, r11

mov_ea16_d16 GETPC8	mov_ea16_d16 GETPC8
cmp r0, #&c0	cmp r0, #&c0
bcs med16_r	bcs med16_r
	CPUWORK #3
bl i286a_ea	bl i286a_ea
mov r4, r0	mov r4, r0
GETPC16	GETPC16
Line 1008 mov_ea16_d16 GETPC8	Line 1105 mov_ea16_d16 GETPC8
mov r0, r4	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286_memorywrite_w
med16_r R16DST r0, r4	med16_r CPUWORK #2
	R16DST r0, r4
GETPC16	GETPC16
ldrh r0, [r4, #CPU_REG]	ldrh r0, [r4, #CPU_REG]
mov pc, r11	mov pc, r11

	enter ldrh r4, [r9, #CPU_SP]
	ldrh r5, [r9, #CPU_BP]
	ldr r0, [r9, #CPU_SS_BASE]
	subs r4, r4, #2
	addcc r4, r4, #&10000
	mov r1, r5
	add r0, r4, r0
	bl i286_memorywrite_w
	GETPC16
	mov r6, r0
	GETPC8
	ands r0, r0, #&1f
	bne enterlv1
	CPUWORK #11
	sub r0, r4, r6
	strh r4, [r9, #CPU_BP]
	strh r0, [r9, #CPU_SP]
	mov pc, r11
	enterlv1 cmp r0, #1
	bne enterlv2
	CPUWORK #15
	strh r4, [r9, #CPU_BP]
	ldr r0, [r9, #CPU_SS_BASE]
	mov r1, r4
	subs r4, r4, #2
	addcc r4, r4, #&10000
	add r0, r4, r0
	sub r2, r4, r6
	mov lr, r11
	strh r2, [r9, #CPU_SP]
	bl i286_memorywrite_w
	enterlv2 mov r1, r0, lsl #2
	add r1, r1, #12
	CPUWORK r1
	strh r4, [r9, #CPU_BP]
	stmdb sp!, {r11}
	mov r4, r4 lsl #16
	sub r2, r4, r0 lsl #17
	sub r2, r4, #(2 << 16)
	mov r2, r2 lsr #16
	sub r3, r2, r6
	strh r3, [r9, #CPU_SP]
	mov r6, r0
	ldr r11, [r9, #CPU_SS_BASE]
	add r0, r11, r2
	mov r1, r5
	mov r5, r5 lsl #16
	bl i286_memorywrite_w
	entlv2lp sub r5, r5, #(2 << 16)
	sub r4, r4, #(2 << 16)
	add r0, r11, r5 lsr #16
	bl i286_memoryread_w
	mov r1, r0
	add r0, r11, r4
	bl i286_memorywrite_w
	subs r6, r6, #1
	bne entlv2lp
	ldmia sp!, {pc}

leave CPUWORK #5	leave CPUWORK #5
ldrh r4, [r9, #CPU_BP]	ldrh r4, [r9, #CPU_BP]
ldr r0, [r9, #CPU_SS_BASE]	ldr r0, [r9, #CPU_SS_BASE]
Line 1159 loopz ldrh r0, [r9, #CPU_CX]	Line 1316 loopz ldrh r0, [r9, #CPU_CX]
strh r0, [r9, #CPU_CX]	strh r0, [r9, #CPU_CX]
beq lpznoj	beq lpznoj
tst r8, #Z_FLAG	tst r8, #Z_FLAG
beq lpnznoj	beq lpznoj
JMPS #8	JMPS #8
lpznoj CPUWORK #4	lpznoj CPUWORK #4
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
Line 1197 in_ax_d8 CPUWORK #5	Line 1354 in_ax_d8 CPUWORK #5
out_d8_al CPUWORK #3	out_d8_al CPUWORK #3
GETPC8	GETPC8
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
mov lr, r11	CPUSV
b iocore_out8	bl iocore_out8
	CPULD
	mov pc, r11

out_d8_ax CPUWORK #3	out_d8_ax CPUWORK #3
GETPC8	GETPC8
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
mov lr, r11	CPUSV
b iocore_out16	bl iocore_out16
	CPULD
	mov pc, r11

call_near CPUWORK #7	call_near CPUWORK #7
GETPC16	GETPC16
Line 1254 in_ax_dx CPUWORK #5	Line 1415 in_ax_dx CPUWORK #5
out_dx_al CPUWORK #3	out_dx_al CPUWORK #3
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
ldrh r0, [r9, #CPU_DX]	ldrh r0, [r9, #CPU_DX]
mov lr, r11	CPUSV
b iocore_out8	bl iocore_out8
	CPULD
	mov pc, r11

out_dx_ax CPUWORK #3	out_dx_ax CPUWORK #3
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
ldrh r0, [r9, #CPU_DX]	ldrh r0, [r9, #CPU_DX]
mov lr, r11	CPUSV
b iocore_out16	bl iocore_out16
	CPULD
	mov pc, r11


lock CPUWORK #2	lock CPUWORK #2
Line 1321 i286a_step stmdb sp!, {r4 - r11, lr}	Line 1486 i286a_step stmdb sp!, {r4 - r11, lr}
ias_r9 dcd i286core - CPU_REG	ias_r9 dcd i286core - CPU_REG
ias_r10 dcd _szpcflag8	ias_r10 dcd _szpcflag8

optbl1 dcd add_ea_r8	optbl1 dcd add_ea_r8 ; 00
dcd add_ea_r16	dcd add_ea_r16
dcd add_r8_ea	dcd add_r8_ea
dcd add_r16_ea	dcd add_r16_ea
Line 1338 optbl1 dcd add_ea_r8	Line 1503 optbl1 dcd add_ea_r8
dcd push_cs	dcd push_cs
dcd 0 ; op_0f/pop_cs	dcd 0 ; op_0f/pop_cs

dcd adc_ea_r8	dcd adc_ea_r8 ; 10
dcd adc_ea_r16	dcd adc_ea_r16
dcd adc_r8_ea	dcd adc_r8_ea
dcd adc_r16_ea	dcd adc_r16_ea
Line 1355 optbl1 dcd add_ea_r8	Line 1520 optbl1 dcd add_ea_r8
dcd push_ds	dcd push_ds
dcd pop_ds	dcd pop_ds

dcd and_ea_r8	dcd and_ea_r8 ; 20
dcd and_ea_r16	dcd and_ea_r16
dcd and_r8_ea	dcd and_r8_ea
dcd and_r16_ea	dcd and_r16_ea
dcd and_al_d8	dcd and_al_d8
dcd and_ax_d16	dcd and_ax_d16
dcd 0 ; segprefix_es	dcd 0 ; segprefix_es
dcd 0 ; daa	dcd 0 ; daa
dcd sub_ea_r8	dcd sub_ea_r8
dcd sub_ea_r16	dcd sub_ea_r16
dcd sub_r8_ea	dcd sub_r8_ea
dcd sub_r16_ea	dcd sub_r16_ea
dcd sub_al_d8	dcd sub_al_d8
dcd sub_ax_d16	dcd sub_ax_d16
dcd 0 ; segprefix_cs	dcd 0 ; segprefix_cs
dcd 0 ; das	dcd 0 ; das

dcd xor_ea_r8	dcd xor_ea_r8 ; 30
dcd xor_ea_r16	dcd xor_ea_r16
dcd xor_r8_ea	dcd xor_r8_ea
dcd xor_r16_ea	dcd xor_r16_ea
dcd xor_al_d8	dcd xor_al_d8
dcd xor_ax_d16	dcd xor_ax_d16
dcd 0 ; segprefix_ss	dcd 0 ; segprefix_ss
dcd 0 ; aaa	dcd 0 ; aaa
dcd cmp_ea_r8	dcd cmp_ea_r8
dcd cmp_ea_r16	dcd cmp_ea_r16
dcd cmp_r8_ea	dcd cmp_r8_ea
dcd cmp_r16_ea	dcd cmp_r16_ea
dcd cmp_al_d8	dcd cmp_al_d8
dcd cmp_ax_d16	dcd cmp_ax_d16
dcd 0 ; segprefix_ds	dcd 0 ; segprefix_ds
dcd 0 ; aas	dcd 0 ; aas

dcd inc_ax	dcd inc_ax ; 40
dcd inc_cx	dcd inc_cx
dcd inc_dx	dcd inc_dx
dcd inc_bx	dcd inc_bx
Line 1406 optbl1 dcd add_ea_r8	Line 1571 optbl1 dcd add_ea_r8
dcd dec_si	dcd dec_si
dcd dec_di	dcd dec_di

dcd push_ax	dcd push_ax ; 50
dcd push_cx	dcd push_cx
dcd push_dx	dcd push_dx
dcd push_bx	dcd push_bx
Line 1423 optbl1 dcd add_ea_r8	Line 1588 optbl1 dcd add_ea_r8
dcd pop_si	dcd pop_si
dcd pop_di	dcd pop_di

dcd 0 ; pusha	dcd pusha ; 60
dcd 0 ; popa	dcd popa
dcd 0 ; bound	dcd 0 ; bound
dcd 0 ; arpl	dcd 0 ; arpl(reserved)
dcd 0 ; reserved	dcd 0 ; reserved
dcd 0 ; reserved	dcd 0 ; reserved
dcd 0 ; reserved	dcd 0 ; reserved
dcd 0 ; reserved	dcd 0 ; reserved
dcd 0 ; push_d16	dcd 0 ; push_d16
dcd 0 ; imul_reg_ea_d16	dcd 0 ; imul_reg_ea_d16
dcd 0 ; push_d8	dcd 0 ; push_d8
dcd 0 ; imul_reg_ea_d8	dcd 0 ; imul_reg_ea_d8
dcd 0 ; insb	dcd 0 ; insb
dcd 0 ; insw	dcd 0 ; insw
dcd 0 ; outsb	dcd outsb
dcd 0 ; outsw	dcd outsw

dcd jo_short	dcd jo_short ; 70
dcd jno_short	dcd jno_short
dcd jc_short	dcd jc_short
dcd jnc_short	dcd jnc_short
Line 1452 optbl1 dcd add_ea_r8	Line 1617 optbl1 dcd add_ea_r8
dcd jns_short	dcd jns_short
dcd jp_short	dcd jp_short
dcd jnp_short	dcd jnp_short
dcd 0 ; jl_short	dcd 0 ; jl_short
dcd 0 ; jnl_short	dcd 0 ; jnl_short
dcd 0 ; jle_short	dcd 0 ; jle_short
dcd 0 ; jnle_short	dcd 0 ; jnle_short

dcd 0 ; calc_ea8_i8	dcd i286aop80 ; 80
dcd 0 ; calc_ea16_i16	dcd i286aop81
dcd 0 ; calc_ea8_i8	dcd i286aop80
dcd 0 ; calc_ea16_i8	dcd i286aop83
dcd test_ea_r8	dcd test_ea_r8
dcd test_ea_r16	dcd test_ea_r16
dcd xchg_ea_r8	dcd xchg_ea_r8
Line 1469 optbl1 dcd add_ea_r8	Line 1634 optbl1 dcd add_ea_r8
dcd mov_ea_r16	dcd mov_ea_r16
dcd mov_r8_ea	dcd mov_r8_ea
dcd mov_r16_ea	dcd mov_r16_ea
dcd 0 ; mov_ea_seg	dcd 0 ; mov_ea_seg
dcd 0 ; lea_r16_ea	dcd 0 ; lea_r16_ea
dcd 0 ; mov_seg_ea	dcd 0 ; mov_seg_ea
dcd 0 ; pop_ea	dcd 0 ; pop_ea

dcd 0 ; nop	dcd 0 ; nop ; 90
dcd xchg_ax_cx	dcd xchg_ax_cx
dcd xchg_ax_dx	dcd xchg_ax_dx
dcd xchg_ax_bx	dcd xchg_ax_bx
Line 1484 optbl1 dcd add_ea_r8	Line 1649 optbl1 dcd add_ea_r8
dcd xchg_ax_di	dcd xchg_ax_di
dcd cbw	dcd cbw
dcd cwd	dcd cwd
dcd 0 ; call_far	dcd 0 ; call_far
dcd wait	dcd wait
dcd 0 ; pushf	dcd 0 ; pushf
dcd 0 ; popf	dcd 0 ; popf
dcd sahf	dcd sahf
dcd lahf	dcd lahf

dcd mov_al_m8	dcd mov_al_m8 ; a0
dcd mov_ax_m16	dcd mov_ax_m16
dcd mov_m8_al	dcd mov_m8_al
dcd mov_m16_ax	dcd mov_m16_ax
dcd 0 ; movsb	dcd movsb
dcd 0 ; movsw	dcd movsw
dcd 0 ; cmpsb	dcd 0 ; cmpsb
dcd 0 ; cmpsw	dcd 0 ; cmpsw
dcd test_al_d8	dcd test_al_d8
dcd test_ax_d16	dcd test_ax_d16
dcd 0 ; stosb	dcd stosb
dcd 0 ; stosw	dcd stosw
dcd 0 ; lodsb	dcd lodsb
dcd 0 ; lodsw	dcd lodsw
dcd 0 ; scasb	dcd 0 ; scasb
dcd 0 ; scasw	dcd 0 ; scasw

dcd mov_al_imm	dcd mov_al_imm ; b0
dcd mov_cl_imm	dcd mov_cl_imm
dcd mov_dl_imm	dcd mov_dl_imm
dcd mov_bl_imm	dcd mov_bl_imm
Line 1525 optbl1 dcd add_ea_r8	Line 1690 optbl1 dcd add_ea_r8
dcd mov_si_imm	dcd mov_si_imm
dcd mov_di_imm	dcd mov_di_imm

dcd 0 ; shift_ea8_d8	dcd i286asft8_d8 ; c0
dcd 0 ; shift_ea16_d8	dcd i286asft16_d8
dcd 0 ; ret_near_d16	dcd 0 ; ret_near_d16
dcd 0 ; ret_near	dcd 0 ; ret_near
dcd 0 ; les_r16_ea	dcd 0 ; les_r16_ea
dcd 0 ; lds_r16_ea	dcd 0 ; lds_r16_ea
dcd 0 ; mov_ea8_d8	dcd 0 ; mov_ea8_d8
dcd 0 ; mov_ea16_d16	dcd 0 ; mov_ea16_d16
dcd 0 ; enter	dcd 0 ; enter
dcd 0 ; leave	dcd 0 ; leave
dcd 0 ; ret_far_d16	dcd 0 ; ret_far_d16
dcd 0 ; ret_far	dcd 0 ; ret_far
dcd 0 ; int_03	dcd 0 ; int_03
dcd 0 ; int_d8	dcd 0 ; int_d8
dcd 0 ; into	dcd 0 ; into
dcd 0 ; iret	dcd 0 ; iret

dcd 0 ; shift_ea8_1	dcd i286asft8_1 ; d0
dcd 0 ; shift_ea16_1	dcd i286asft16_1
dcd 0 ; shift_ea8_cl	dcd i286asft8_cl
dcd 0 ; shift_ea16_cl	dcd i286asft16_cl
dcd 0 ; aam	dcd 0 ; aam
dcd 0 ; aad	dcd 0 ; aad
dcd 0 ; setalc	dcd 0 ; setalc
dcd 0 ; xlat	dcd 0 ; xlat
dcd 0 ; esc0	dcd esc
dcd 0 ; esc1	dcd esc
dcd 0 ; esc2	dcd esc
dcd 0 ; esc3	dcd esc
dcd 0 ; esc4	dcd esc
dcd 0 ; esc5	dcd esc
dcd 0 ; esc6	dcd esc
dcd 0 ; esc7	dcd esc

dcd 0 ; loopnz	dcd 0 ; loopnz ; e0
dcd 0 ; loopz	dcd 0 ; loopz
dcd 0 ; loop	dcd 0 ; loop
dcd 0 ; jcxz	dcd 0 ; jcxz
dcd 0 ; in_al_d8	dcd 0 ; in_al_d8
dcd 0 ; in_ax_d8	dcd 0 ; in_ax_d8
dcd 0 ; out_d8_al	dcd out_d8_al
dcd 0 ; out_d8_ax	dcd out_d8_ax
dcd 0 ; call_near	dcd 0 ; call_near
dcd 0 ; jmp_near	dcd 0 ; jmp_near
dcd 0 ; jmp_far	dcd 0 ; jmp_far
dcd jmp_short	dcd jmp_short
dcd 0 ; in_al_dx	dcd 0 ; in_al_dx
dcd 0 ; in_ax_dx	dcd 0 ; in_ax_dx
dcd 0 ; out_dx_al	dcd out_dx_al
dcd 0 ; out_dx_ax	dcd out_dx_ax

dcd 0 ; lock	dcd lock ; f0
dcd 0 ; lock	dcd lock
dcd 0 ; repne	dcd 0 ; repne
dcd 0 ; repe	dcd 0 ; repe
dcd 0 ; hlt	dcd hlt
dcd 0 ; cmc	dcd cmc
dcd 0 ; ope0xf6	dcd 0 ; ope0xf6
dcd 0 ; ope0xf7	dcd 0 ; ope0xf7
dcd 0 ; clc	dcd clc
dcd 0 ; stc	dcd stc
dcd 0 ; cli	dcd cli
dcd 0 ; sti	dcd 0 ; sti
dcd 0 ; cld	dcd cld
dcd 0 ; std	dcd std
dcd 0 ; ope0xfe	dcd i286aopfe
dcd 0 ; ope0xff	dcd 0 ; ope0xff


END	END

RetroPC.NET-CVS <cvs@retropc.net>

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