np2/i286a/i286a_mn.s - diff

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Diff for /np2/i286a/i286a_mn.s between versions 1.8 and 1.16

version 1.8, 2003/12/18 19:14:08	version 1.16, 2003/12/22 07:41:15
Line 3	Line 3
INCLUDE i286aea.inc	INCLUDE i286aea.inc
INCLUDE i286aalu.inc	INCLUDE i286aalu.inc
INCLUDE i286aop.inc	INCLUDE i286aop.inc
INCLUDE i286apic.inc	INCLUDE i286aio.inc

IMPORT i286core	IMPORT i286acore
IMPORT _szpcflag8	IMPORT iflags
IMPORT i286a_localint	IMPORT i286a_localint
	IMPORT i286a_trapint
	EXPORT i286a_trapintr
IMPORT i286a_ea	IMPORT i286a_ea
IMPORT i286a_lea	IMPORT i286a_lea
IMPORT i286a_a	IMPORT i286a_a

IMPORT i286_memoryread	IMPORT i286a_memoryread
IMPORT i286_memoryread_w	IMPORT i286a_memoryread_w
IMPORT i286_memorywrite	IMPORT i286a_memorywrite
IMPORT i286_memorywrite_w	IMPORT i286a_memorywrite_w

IMPORT iocore_inp8	IMPORT iocore_inp8
IMPORT iocore_inp16	IMPORT iocore_inp16
IMPORT iocore_out8	IMPORT iocore_out8
IMPORT iocore_out16	IMPORT iocore_out16

	IMPORT dmap_i286
IMPORT biosfunc	IMPORT biosfunc

IMPORT pic
IMPORT extirq_pop

IMPORT i286a_cts	IMPORT i286a_cts

IMPORT i286aop80	IMPORT i286aop80
Line 46	Line 46
IMPORT i286aopfe	IMPORT i286aopfe
IMPORT i286aopff	IMPORT i286aopff

	IMPORT i286a_rep_insb
	IMPORT i286a_rep_insw
	IMPORT i286a_rep_outsb
	IMPORT i286a_rep_outsw
	IMPORT i286a_rep_movsb
	IMPORT i286a_rep_movsw
	IMPORT i286a_rep_lodsb
	IMPORT i286a_rep_lodsw
	IMPORT i286a_rep_stosb
	IMPORT i286a_rep_stosw
	IMPORT i286a_repe_cmpsb
	IMPORT i286a_repe_cmpsw
	IMPORT i286a_repne_cmpsb
	IMPORT i286a_repne_cmpsw
	IMPORT i286a_repe_scasb
	IMPORT i286a_repe_scasw
	IMPORT i286a_repne_scasb
	IMPORT i286a_repne_scasw

	EXPORT i286a
EXPORT i286a_step	EXPORT i286a_step
EXPORT optbl1	EXPORT optbl1

Line 412 pusha ldrh r4, [r9, #CPU_SP]	Line 432 pusha ldrh r4, [r9, #CPU_SP]
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_CX]	ldrh r1, [r9, #CPU_CX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_DX]	ldrh r1, [r9, #CPU_DX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_BX]	ldrh r1, [r9, #CPU_BX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
mov r1, r6	mov r1, r6
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_BP]	ldrh r1, [r9, #CPU_BP]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_SI]	ldrh r1, [r9, #CPU_SI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
ldrh r1, [r9, #CPU_DI]	ldrh r1, [r9, #CPU_DI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w	bl i286a_memorywrite_w
mov r0, r4 lsr #16	mov r0, r4 lsr #16
strh r0, [r9, #CPU_SP]	strh r0, [r9, #CPU_SP]
mov pc, r11	mov pc, r11

popa ldrh r4, [r9, #CPU_SP]	popa ldrh r1, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
CPUWORK #19	CPUWORK #19
add r0, r5, r4	mov r4, r1 lsl #16
mov r4, r4 lsl #16	add r0, r5, r1
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_DI]	strh r0, [r9, #CPU_DI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_SI]	strh r0, [r9, #CPU_SI]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(4 << 16)	add r4, r4, #(4 << 16)
strh r0, [r9, #CPU_BP]	strh r0, [r9, #CPU_BP]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_BX]	strh r0, [r9, #CPU_BX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_DX]	strh r0, [r9, #CPU_DX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_CX]	strh r0, [r9, #CPU_CX]
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r4, #(2 << 16)	add r4, r4, #(2 << 16)
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
mov r0, r4 lsr #16	mov r0, r4 lsr #16
strh r0, [r9, #CPU_SP]	strh r0, [r9, #CPU_SP]
mov pc, r11	mov pc, r11

bound GETPC8	bound GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs bndreg	bcs bndreg
CPUWORK #13
R16DST r0, r12	R16DST r0, r12
	CPUWORK #13
ldrh r5, [r12, #CPU_REG]	ldrh r5, [r12, #CPU_REG]
bl i286a_a	bl i286a_a
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bl i286_memoryread_w	bl i286a_memoryread_w
cmp r5, r0	cmp r5, r0
bcc bndout	bcc bndout
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
cmp r5, r0	cmp r5, r0
movls pc, r11	movls pc, r11
bndout mov r6, #5	bndout mov r6, #5
Line 514 push_d16 CPUWORK #3	Line 534 push_d16 CPUWORK #3
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
add r0, r2, r3	add r0, r2, r3
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

imul_r_ea_d16 REG16EA r5, #21, #24	imul_r_ea_d16 REG16EA r6, #21, #24
mov r4, r0, lsl #16	mov r4, r0, lsl #16
GETPC16	GETPC16
mov r0, r0, lsl #16	mov r0, r0, lsl #16
Line 524 imul_r_ea_d16 REG16EA r5, #21, #24	Line 544 imul_r_ea_d16 REG16EA r5, #21, #24
mov r0, r0, asr #16	mov r0, r0, asr #16
mul r1, r0, r4	mul r1, r0, r4
add r12, r1, #&8000	add r12, r1, #&8000
strh r1, [r5, #CPU_REG]	strh r1, [r6, #CPU_REG]
movs r12, r12 lsr #16	movs r12, r12 lsr #16
biceq r8, r8, #O_FLAG	biceq r8, r8, #O_FLAG
biceq r8, r8, #C_FLAG	biceq r8, r8, #C_FLAG
Line 533 imul_r_ea_d16 REG16EA r5, #21, #24	Line 553 imul_r_ea_d16 REG16EA r5, #21, #24
mov pc, r11	mov pc, r11

push_d8 CPUWORK #3	push_d8 CPUWORK #3
GETPC8	GETPCF8
ldrh r2, [r9, #CPU_SP]	ldrh r2, [r9, #CPU_SP]
ldr r3, [r9, #CPU_SS_BASE]	ldr r3, [r9, #CPU_SS_BASE]
mov r0, r0 lsl #24	mov r0, r0 lsl #24
Line 543 push_d8 CPUWORK #3	Line 563 push_d8 CPUWORK #3
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
add r0, r2, r3	add r0, r2, r3
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

imul_r_ea_d8 REG16EA r5, #21, #24	imul_r_ea_d8 REG16EA r6, #21, #24
mov r4, r0, lsl #16	mov r4, r0, lsl #16
GETPC8	GETPC8
mov r0, r0, lsl #24	mov r0, r0, lsl #24
Line 553 imul_r_ea_d8 REG16EA r5, #21, #24	Line 573 imul_r_ea_d8 REG16EA r5, #21, #24
mov r0, r0, asr #24	mov r0, r0, asr #24
mul r1, r0, r4	mul r1, r0, r4
add r12, r1, #&8000	add r12, r1, #&8000
strh r1, [r5, #CPU_REG]	strh r1, [r6, #CPU_REG]
movs r12, r12 lsr #16	movs r12, r12 lsr #16
biceq r8, r8, #O_FLAG	biceq r8, r8, #O_FLAG
biceq r8, r8, #C_FLAG	biceq r8, r8, #C_FLAG
Line 565 insb CPUWORK #5	Line 585 insb CPUWORK #5
ldrh r0, [r9, #CPU_DX]	ldrh r0, [r9, #CPU_DX]
CPUSV	CPUSV
bl iocore_inp8	bl iocore_inp8
CPULD
ldrh r2, [r9, #CPU_DI]	ldrh r2, [r9, #CPU_DI]
ldr r3, [r9, #CPU_ES_BASE]	ldr r3, [r9, #CPU_ES_BASE]
	CPULD
mov r1, r0	mov r1, r0
add r0, r2, r3	add r0, r3, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
addeq r2, r2, #1	addeq r2, r2, #1
subne r2, r2, #1	subne r2, r2, #1
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite	b i286a_memorywrite

insw CPUWORK #5	insw CPUWORK #5
ldrh r0, [r9, #CPU_DX]	ldrh r0, [r9, #CPU_DX]
CPUSV	CPUSV
bl iocore_inp16	bl iocore_inp16
CPULD
ldrh r2, [r9, #CPU_DI]	ldrh r2, [r9, #CPU_DI]
ldr r3, [r9, #CPU_ES_BASE]	ldr r3, [r9, #CPU_ES_BASE]
	CPULD
mov r1, r0	mov r1, r0
add r0, r2, r3	add r0, r3, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
addeq r2, r2, #2	addeq r2, r2, #2
subne r2, r2, #2	subne r2, r2, #2
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_DI]	strh r2, [r9, #CPU_DI]
b i286_memorywrite_w	b i286a_memorywrite_w

outsb CPUWORK #3	outsb CPUWORK #3
ldrh r1, [r9, #CPU_SI]	ldrh r1, [r9, #CPU_SI]
ldr r2, [r9, #CPU_DS_FIX]	ldr r2, [r9, #CPU_DS_FIX]
add r0, r1, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
addeq r1, r1, #1	addeq r3, r1, #1
subne r1, r1, #1	subne r3, r1, #1
strh r1, [r9, #CPU_SI]	add r0, r2, r1
bl i286_memoryread	strh r3, [r9, #CPU_SI]
	bl i286a_memoryread
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
CPUSV	CPUSV
Line 612 outsb CPUWORK #3	Line 632 outsb CPUWORK #3
outsw CPUWORK #3	outsw CPUWORK #3
ldrh r1, [r9, #CPU_SI]	ldrh r1, [r9, #CPU_SI]
ldr r2, [r9, #CPU_DS_FIX]	ldr r2, [r9, #CPU_DS_FIX]
add r0, r1, r2
tst r8, #D_FLAG	tst r8, #D_FLAG
addeq r1, r1, #2	addeq r3, r1, #2
subne r1, r1, #2	subne r3, r1, #2
strh r1, [r9, #CPU_SI]	add r0, r2, r1
bl i286_memoryread_w	strh r3, [r9, #CPU_SI]
	bl i286a_memoryread_w
mov r1, r0	mov r1, r0
ldr r0, [r9, #CPU_DX]	ldr r0, [r9, #CPU_DX]
CPUSV	CPUSV
Line 645 jmps JMPS #7	Line 665 jmps JMPS #7
xchg_ea_r8 EAREG8 r6	xchg_ea_r8 EAREG8 r6
cmp r0, #&c0	cmp r0, #&c0
bcc xchgear8_1	bcc xchgear8_1
CPUWORK #3
R8SRC r0, r5	R8SRC r0, r5
ldrb r0, [r6, #CPU_REG]	ldrb r0, [r6, #CPU_REG]
ldrb r1, [r5, #CPU_REG]	ldrb r1, [r5, #CPU_REG]
	CPUWORK #3
strb r0, [r5, #CPU_REG]	strb r0, [r5, #CPU_REG]
strb r1, [r6, #CPU_REG]	strb r1, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear8_1 CPUWORK #5	xchgear8_1 bl i286a_ea
bl i286a_ea
cmp r0, #I286_MEMWRITEMAX	cmp r0, #I286_MEMWRITEMAX
bcs xchgear8_2	bcs xchgear8_2
ldrb r1, [r6, #CPU_REG]	ldrb r1, [r6, #CPU_REG]
ldrb r4, [r9, r0]	ldrb r4, [r9, r0]
	CPUWORK #5
strb r1, [r9, r0]	strb r1, [r9, r0]
strb r4, [r6, #CPU_REG]	strb r4, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear8_2 mov r5, r0	xchgear8_2 mov r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrb r1, [r6, #CPU_REG]	ldrb r1, [r6, #CPU_REG]
strb r0, [r6, #CPU_REG]	strb r0, [r6, #CPU_REG]
	CPUWORK #5
mov r0, r5	mov r0, r5
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

xchg_ea_r16 EAREG16 r6	xchg_ea_r16 EAREG16 r6
cmp r0, #&c0	cmp r0, #&c0
bcc xchgear16_1	bcc xchgear16_1
CPUWORK #3
R16SRC r0, r5	R16SRC r0, r5
ldrh r0, [r6, #CPU_REG]	ldrh r0, [r6, #CPU_REG]
ldrh r1, [r5, #CPU_REG]	ldrh r1, [r5, #CPU_REG]
	CPUWORK #3
strh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
strh r1, [r6, #CPU_REG]	strh r1, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear16_1 CPUWORK #5	xchgear16_1 bl i286a_ea
bl i286a_ea
tst r0, #1	tst r0, #1
bne xchgear16_2	bne xchgear16_2
cmp r0, #I286_MEMWRITEMAX	cmp r0, #I286_MEMWRITEMAX
bcs xchgear16_2	bcs xchgear16_2
ldrh r1, [r6, #CPU_REG]	ldrh r1, [r6, #CPU_REG]
ldrh r4, [r9, r0]	ldrh r4, [r9, r0]
	CPUWORK #5
strh r1, [r9, r0]	strh r1, [r9, r0]
strh r4, [r6, #CPU_REG]	strh r4, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
xchgear16_2 mov r5, r0	xchgear16_2 mov r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r1, [r6, #CPU_REG]	ldrh r1, [r6, #CPU_REG]
strh r0, [r6, #CPU_REG]	strh r0, [r6, #CPU_REG]
	CPUWORK #5
mov r0, r5	mov r0, r5
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

mov_ea_r8 EAREG8 r6	mov_ea_r8 EAREG8 r6
cmp r0, #&c0	cmp r0, #&c0
bcc movear8_1	bcc movear8_1
CPUWORK #3	ldrb r1, [r6, #CPU_REG]
R8SRC r0, r5	R8SRC r0, r5
ldrb r0, [r6, #CPU_REG]	CPUWORK #3
strb r0, [r5, #CPU_REG]	strb r1, [r5, #CPU_REG]
mov pc, r11	mov pc, r11
movear8_1 CPUWORK #5	movear8_1 CPUWORK #5
bl i286a_ea	bl i286a_ea
ldrb r1, [r6, #CPU_REG]	ldrb r1, [r6, #CPU_REG]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

mov_ea_r16 EAREG16 r6	mov_ea_r16 EAREG16 r6
cmp r0, #&c0	cmp r0, #&c0
bcc movear16_1	bcc movear16_1
CPUWORK #3	ldrh r1, [r6, #CPU_REG]
R16SRC r0, r5	R16SRC r0, r5
ldrh r0, [r6, #CPU_REG]	CPUWORK #3
strh r0, [r5, #CPU_REG]	strh r1, [r5, #CPU_REG]
mov pc, r11	mov pc, r11
movear16_1 CPUWORK #5	movear16_1 CPUWORK #5
bl i286a_ea	bl i286a_ea
ldrh r1, [r6, #CPU_REG]	ldrh r1, [r6, #CPU_REG]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

mov_r8_ea REG8EA r5, #2, #5	mov_r8_ea REG8EA r6, #2, #5
strb r0, [r5, #CPU_REG]	strb r0, [r6, #CPU_REG]
mov pc, r11	mov pc, r11

mov_r16_ea REG16EA r5, #2, #5	mov_r16_ea REG16EA r6, #2, #5
strh r0, [r5, #CPU_REG]	strh r0, [r6, #CPU_REG]
mov pc, r11	mov pc, r11

mov_ea_seg GETPC8	mov_ea_seg GETPCF8
and r1, r0, #(3 << 3)	and r1, r0, #(3 << 3)
add r1, r9, r1 lsr #2	add r1, r9, r1 lsr #2
ldrh r5, [r1, #CPU_SEG]	ldrh r6, [r1, #CPU_SEG]
cmp r0, #&c0	cmp r0, #&c0
bcc measegm	bcc measegm
	R16SRC r0, r2
CPUWORK #2	CPUWORK #2
R16SRC r0, r4	strh r6, [r2, #CPU_REG]
strh r5, [r4, #CPU_REG]
mov pc, r11	mov pc, r11
measegm CPUWORK #3	measegm CPUWORK #3
bl i286a_ea	bl i286a_ea
mov r1, r5	mov r1, r6
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

lea_r16_ea CPUWORK #3	lea_r16_ea CPUWORK #3
GETPC8	GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs leareg	bcs leareg
R16DST r0, r5	R16DST r0, r6
bl i286a_lea	bl i286a_lea
strh r0, [r5, #CPU_REG]	strh r0, [r6, #CPU_REG]
mov pc, r11	mov pc, r11
leareg mov r6, #6	leareg mov r6, #6
sub r8, r8, #(2 << 16)	sub r8, r8, #(2 << 16)
b i286a_localint	b i286a_localint

mov_seg_ea GETPC8	mov_seg_ea GETPCF8
adr r6, msegea_tbl	adr r6, msegea_tbl
and r1, r0, #(3 << 3)	and r1, r0, #(3 << 3)
mov r5, r8	mov r5, r8
Line 775 mov_seg_ea GETPC8	Line 797 mov_seg_ea GETPC8
mov pc, r6	mov pc, r6
msegeam CPUWORK #5	msegeam CPUWORK #5
bl i286a_ea	bl i286a_ea
bl i286_memoryread_w	bl i286a_memoryread_w
mov pc, r6	mov pc, r6
msegea_tbl dcd msegea_es	msegea_tbl dcd msegea_es
dcd msegea_cs	dcd msegea_cs
Line 800 msegea_cs sub r8, r5, #(2 << 16)	Line 822 msegea_cs sub r8, r5, #(2 << 16)
b i286a_localint	b i286a_localint

pop_ea POP #5	pop_ea POP #5
mov r5, r0	mov r6, r0
GETPC8	GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs popreg	bcs popreg
bl i286a_ea	bl i286a_ea
mov r1, r5	mov r1, r6
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w
popreg R16SRC r0, r1	popreg R16SRC r0, r1
strh r4, [r1, #CPU_REG]	strh r4, [r1, #CPU_REG]
mov pc, r11	mov pc, r11
Line 815 popreg R16SRC r0, r1	Line 837 popreg R16SRC r0, r1

nopandbios sub r0, r8, #(1 << 16)	nopandbios sub r0, r8, #(1 << 16)
CPUWORK #3	CPUWORK #3
; ldr r5, [r9, #CPU_CS_BASE]	;; ldr r5, [r9, #CPU_CS_BASE]
add r0, r5, r0 lsr #16	add r0, r5, r0 lsr #16
cmp r0, #&0f8000	cmp r0, #&0f8000
movcc pc, r11	movcc pc, r11
Line 840 nopandbios sub r0, r8, #(1 << 16)	Line 862 nopandbios sub r0, r8, #(1 << 16)
str r3, [r9, #CPU_DS_FIX]	str r3, [r9, #CPU_DS_FIX]
mov pc, r11	mov pc, r11

cbw CPUWORK #2	cbw ldrb r0, [r9, #CPU_AL]
ldrb r0, [r9, #CPU_AL]	CPUWORK #2
mov r1, r0 lsl #24	mov r1, r0 lsl #24
mov r0, r1 asr #31	mov r0, r1 asr #31
strb r0, [r9, #CPU_AH]	strb r0, [r9, #CPU_AH]
mov pc, r11	mov pc, r11

cwd CPUWORK #2	cwd ldrb r0, [r9, #CPU_AH]
ldrb r0, [r9, #CPU_AH]	CPUWORK #2
mov r1, r0 lsl #24	mov r1, r0 lsl #24
mov r0, r1 asr #31	mov r0, r1 asr #31
strh r0, [r9, #CPU_DX]	strh r0, [r9, #CPU_DX]
Line 861 call_far CPUWORK #13	Line 883 call_far CPUWORK #13
mov r4, r4 lsl #16	mov r4, r4 lsl #16
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r5, r4 lsr #16	add r0, r5, r4 lsr #16
bl i286_memorywrite_w ; cs	bl i286a_memorywrite_w ; cs
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r12, r8, #(4 << 16)	add r12, r8, #(4 << 16)
mov r4, r4, lsr #16	mov r4, r4, lsr #16
mov r1, r12 lsr #16	mov r1, r12 lsr #16
add r0, r4, r5	add r0, r4, r5
bl i286_memorywrite_w ; ip
ldr r5, [r9, #CPU_CS_BASE]	ldr r5, [r9, #CPU_CS_BASE]
	bl i286a_memorywrite_w ; ip
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread_w ; newip	bl i286a_memoryread_w ; newip
add r8, r8, #(2 << 16)	add r8, r8, #(2 << 16)
mov r4, r0 lsl #16	mov r4, r0 lsl #16
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
str r1, [r9, #CPU_CS_BASE]	str r1, [r9, #CPU_CS_BASE]
Line 895 pushf CPUWORK #3	Line 917 pushf CPUWORK #3
strh r3, [r9, #CPU_SP]	strh r3, [r9, #CPU_SP]
add r0, r3, r2	add r0, r3, r2
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

popf POP #5	popf POP #5
mov r2, #3	mov r2, #3
Line 907 popf POP #5	Line 929 popf POP #5
strb r2, [r9, #CPU_TRAP]	strb r2, [r9, #CPU_TRAP]
bne popf_withirq	bne popf_withirq
ldr r0, popf_pic	ldr r0, popf_pic
tst r8, #I_FLAG	NOINTREXIT
moveq pc, r11
PICEXISTINTR
moveq pc, r11
popf_withirq I286IRQCHECKTERM	popf_withirq I286IRQCHECKTERM
popf_pic dcd pic	popf_pic dcd pic

sahf CPUWORK #2	sahf ldrb r0, [r9, #CPU_AH]
ldrb r0, [r9, #CPU_AH]	CPUWORK #2
bic r8, r8, #&ff	bic r8, r8, #&ff
orr r8, r0, r8	orr r8, r8, r0
mov pc, r11	mov pc, r11

lahf CPUWORK #2	lahf CPUWORK #2
Line 926 lahf CPUWORK #2	Line 945 lahf CPUWORK #2


mov_al_m8 CPUWORK #5	mov_al_m8 CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r6, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
add r0, r5, r0	add r0, r0, r6
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
mov pc, r11	mov pc, r11

mov_ax_m16 CPUWORK #5	mov_ax_m16 CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r6, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
add r0, r5, r0	add r0, r0, r6
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
mov pc, r11	mov pc, r11

mov_m8_al CPUWORK #5	mov_m8_al CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r6, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
add r0, r5, r0	add r0, r0, r6
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

mov_m16_ax CPUWORK #5	mov_m16_ax CPUWORK #5
ldr r5, [r9, #CPU_DS_FIX]	ldr r6, [r9, #CPU_DS_FIX]
GETPC16	GETPC16
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
add r0, r5, r0	add r0, r0, r6
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

movsb CPUWORK #5	movsb CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 964 movsb CPUWORK #5	Line 983 movsb CPUWORK #5
moveq r4, #1	moveq r4, #1
movne r4, #-1	movne r4, #-1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
add r5, r5, r4	add r5, r5, r4
Line 974 movsb CPUWORK #5	Line 993 movsb CPUWORK #5
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

movsw CPUWORK #5	movsw CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 983 movsw CPUWORK #5	Line 1002 movsw CPUWORK #5
moveq r4, #2	moveq r4, #2
movne r4, #-2	movne r4, #-2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
ldr r2, [r9, #CPU_ES_BASE]	ldr r2, [r9, #CPU_ES_BASE]
add r5, r5, r4	add r5, r5, r4
Line 993 movsw CPUWORK #5	Line 1012 movsw CPUWORK #5
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

cmpsb CPUWORK #8	cmpsb ldrh r5, [r9, #CPU_SI]
ldrh r5, [r9, #CPU_SI]
ldr r0, [r9, #CPU_DS_FIX]	ldr r0, [r9, #CPU_DS_FIX]
;	ldr r4, [r9, #CPU_ES_BASE]
;	CPUWORK #8
add r0, r5, r0	add r0, r0, r5
bl i286_memoryread	bl i286a_memoryread
ldr r2, [r9, #CPU_ES_BASE]
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
mov r6, r0	mov r6, r0
and r12, r8, #D_FLAG	and r12, r8, #D_FLAG
mov r12, r12 lsr #(10 - 1)	mov r12, r12 lsr #(10 - 1)
add r0, r2, r3	add r0, r3, r4
rsb r2, r12, #1	rsb r2, r12, #1
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
bl i286_memoryread	bl i286a_memoryread
SUB8 r6, r0	SUB8 r6, r0
mov pc, r11	mov pc, r11

cmpsw CPUWORK #8	cmpsw ldrh r5, [r9, #CPU_SI]
ldrh r5, [r9, #CPU_SI]
ldr r0, [r9, #CPU_DS_FIX]	ldr r0, [r9, #CPU_DS_FIX]
;	ldr r4, [r9, #CPU_ES_BASE]
;	CPUWORK #8
add r0, r5, r0	add r0, r0, r5
bl i286_memoryread_w	bl i286a_memoryread_w
ldr r2, [r9, #CPU_ES_BASE]
ldrh r3, [r9, #CPU_DI]	ldrh r3, [r9, #CPU_DI]
mov r6, r0	mov r6, r0
and r12, r8, #D_FLAG	and r12, r8, #D_FLAG
mov r12, r12 lsr #(10 - 2)	mov r12, r12 lsr #(10 - 2)
add r0, r2, r3	add r0, r3, r4
rsb r2, r12, #2	rsb r2, r12, #2
add r5, r2, r5	add r5, r2, r5
add r3, r2, r3	add r3, r2, r3
strh r5, [r9, #CPU_SI]	strh r5, [r9, #CPU_SI]
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
bl i286_memoryread_w	bl i286a_memoryread_w
SUB16 r6, r0	SUB16 r6, r0
mov pc, r11	mov pc, r11

Line 1049 stosb CPUWORK #3	Line 1064 stosb CPUWORK #3
add r0, r2, r0	add r0, r2, r0
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite

stosw CPUWORK #3	stosw CPUWORK #3
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
Line 1061 stosw CPUWORK #3	Line 1076 stosw CPUWORK #3
add r0, r2, r0	add r0, r2, r0
strh r3, [r9, #CPU_DI]	strh r3, [r9, #CPU_DI]
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

lodsb CPUWORK #5	lodsb CPUWORK #5
ldrh r5, [r9, #CPU_SI]	ldrh r5, [r9, #CPU_SI]
Line 1070 lodsb CPUWORK #5	Line 1085 lodsb CPUWORK #5
addeq r6, r5, #1	addeq r6, r5, #1
subne r6, r5, #1	subne r6, r5, #1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
strh r6, [r9, #CPU_SI]	strh r6, [r9, #CPU_SI]
mov pc, r11	mov pc, r11
Line 1082 lodsw CPUWORK #5	Line 1097 lodsw CPUWORK #5
addeq r6, r5, #2	addeq r6, r5, #2
subne r6, r5, #2	subne r6, r5, #2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r9, #CPU_AX]	strh r0, [r9, #CPU_AX]
strh r6, [r9, #CPU_SI]	strh r6, [r9, #CPU_SI]
mov pc, r11	mov pc, r11
Line 1094 scasb CPUWORK #7	Line 1109 scasb CPUWORK #7
addeq r6, r5, #1	addeq r6, r5, #1
subne r6, r5, #1	subne r6, r5, #1
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread	bl i286a_memoryread
ldrb r5, [r9, #CPU_AL]	ldrb r5, [r9, #CPU_AL]
strh r6, [r9, #CPU_DI]	strh r6, [r9, #CPU_DI]
SUB8 r5, r0	SUB8 r5, r0
Line 1107 scasw CPUWORK #7	Line 1122 scasw CPUWORK #7
addeq r6, r5, #2	addeq r6, r5, #2
subne r6, r5, #2	subne r6, r5, #2
add r0, r5, r0	add r0, r5, r0
bl i286_memoryread_w	bl i286a_memoryread_w
ldrh r5, [r9, #CPU_AX]	ldrh r5, [r9, #CPU_AX]
strh r6, [r9, #CPU_DI]	strh r6, [r9, #CPU_DI]
SUB16 r5, r0	SUB16 r5, r0
Line 1122 ret_near_d16 GETPC16	Line 1137 ret_near_d16 GETPC16
add r0, r1, r2	add r0, r1, r2
add r3, r3, #2	add r3, r3, #2
strh r3, [r9, #CPU_SP]	strh r3, [r9, #CPU_SP]
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
Line 1136 ret_near CPUWORK #11	Line 1151 ret_near CPUWORK #11
add r0, r1, r0	add r0, r1, r0
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
mov r8, r8 lsr #16	mov r8, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
mov pc, r11	mov pc, r11

les_r16_ea GETPC8	les_r16_ea GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs lr16_r	bcs lr16_r
CPUWORK #3	CPUWORK #3
Line 1149 les_r16_ea GETPC8	Line 1164 les_r16_ea GETPC8
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_ES]	strh r0, [r9, #CPU_ES]
str r1, [r9, #CPU_ES_BASE]	str r1, [r9, #CPU_ES_BASE]
Line 1161 lr16_r mov r6, #6	Line 1176 lr16_r mov r6, #6
sub r8, r8, #(2 << 16)	sub r8, r8, #(2 << 16)
b i286a_localint	b i286a_localint

lds_r16_ea GETPC8	lds_r16_ea GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs lr16_r	bcs lr16_r
CPUWORK #3	CPUWORK #3
Line 1170 lds_r16_ea GETPC8	Line 1185 lds_r16_ea GETPC8
add r4, r0, #2	add r4, r0, #2
add r0, r0, r6	add r0, r0, r6
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
bl i286_memoryread_w	bl i286a_memoryread_w
strh r0, [r5, #CPU_REG]	strh r0, [r5, #CPU_REG]
add r0, r4, r6	add r0, r4, r6
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_DS]	strh r0, [r9, #CPU_DS]
str r1, [r9, #CPU_DS_BASE]	str r1, [r9, #CPU_DS_BASE]
str r1, [r9, #CPU_DS_FIX]	str r1, [r9, #CPU_DS_FIX]
mov pc, r11	mov pc, r11

mov_ea8_d8 GETPC8	mov_ea8_d8 GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs med8_r	bcs med8_r
CPUWORK #3	CPUWORK #3
bl i286a_ea	bl i286a_ea
mov r4, r0	mov r4, r0
GETPC8	GETPCF8
mov r1, r0	mov r1, r0
mov r0, r4	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite	b i286a_memorywrite
med8_r CPUWORK #2	med8_r CPUWORK #2
R8DST r0, r4	R8DST r0, r4
GETPC8	GETPCF8
strb r0, [r4, #CPU_REG]	strb r0, [r4, #CPU_REG]
mov pc, r11	mov pc, r11

mov_ea16_d16 GETPC8	mov_ea16_d16 GETPCF8
cmp r0, #&c0	cmp r0, #&c0
bcs med16_r	bcs med16_r
CPUWORK #3	CPUWORK #3
Line 1207 mov_ea16_d16 GETPC8	Line 1222 mov_ea16_d16 GETPC8
mov r1, r0	mov r1, r0
mov r0, r4	mov r0, r4
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w
med16_r CPUWORK #2	med16_r CPUWORK #2
R16DST r0, r4	R16DST r0, r4
GETPC16	GETPC16
Line 1221 enter ldrh r4, [r9, #CPU_SP]	Line 1236 enter ldrh r4, [r9, #CPU_SP]
addcc r4, r4, #&10000	addcc r4, r4, #&10000
mov r1, r5	mov r1, r5
add r0, r4, r0	add r0, r4, r0
bl i286_memorywrite_w	bl i286a_memorywrite_w
GETPC16	GETPC16
mov r6, r0	mov r6, r0
GETPC8	GETPC8
Line 1244 enterlv1 cmp r0, #1	Line 1259 enterlv1 cmp r0, #1
sub r2, r4, r6	sub r2, r4, r6
mov lr, r11	mov lr, r11
strh r2, [r9, #CPU_SP]	strh r2, [r9, #CPU_SP]
bl i286_memorywrite_w	bl i286a_memorywrite_w
enterlv2 mov r1, r0, lsl #2	enterlv2 mov r1, r0, lsl #2
add r1, r1, #12	add r1, r1, #12
CPUWORK r1	CPUWORK r1
Line 1261 enterlv2 mov r1, r0, lsl #2	Line 1276 enterlv2 mov r1, r0, lsl #2
mov r1, r5	mov r1, r5
mov r5, r5 lsl #16	mov r5, r5 lsl #16
add r0, r11, r2	add r0, r11, r2
bl i286_memorywrite_w	bl i286a_memorywrite_w
entlv2lp sub r5, r5, #(2 << 16)	entlv2lp sub r5, r5, #(2 << 16)
sub r4, r4, #(2 << 16)	sub r4, r4, #(2 << 16)
add r0, r11, r5 lsr #16	add r0, r11, r5 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0	mov r1, r0
add r0, r11, r4	add r0, r11, r4
bl i286_memorywrite_w	bl i286a_memorywrite_w
subs r6, r6, #1	subs r6, r6, #1
bne entlv2lp	bne entlv2lp
ldr pc, [sp], #4	ldr pc, [sp], #4
Line 1277 leave ldrh r1, [r9, #CPU_BP]	Line 1292 leave ldrh r1, [r9, #CPU_BP]
ldr r0, [r9, #CPU_SS_BASE]	ldr r0, [r9, #CPU_SS_BASE]
CPUWORK #5	CPUWORK #5
add r4, r1, #2	add r4, r1, #2
add r0, r1, r0	add r0, r0, r1
bl i286_memoryread_w	bl i286a_memoryread_w
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_BP]	strh r0, [r9, #CPU_BP]
mov pc, r11	mov pc, r11

ret_far_d16 CPUWORK #15	ret_far_d16 GETPC16
GETPC16
mov r6, r0
ldrh r4, [r9, #CPU_SP]	ldrh r4, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
;	mov r6, r0
;	CPUWORK #15
add r0, r4, r5	add r0, r5, r4
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
add r4, r6, r4	add r4, r6, r4
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
Line 1307 ret_far_d16 CPUWORK #15	Line 1320 ret_far_d16 CPUWORK #15
str r1, [r9, #CPU_CS_BASE]	str r1, [r9, #CPU_CS_BASE]
mov pc, r11	mov pc, r11

ret_far CPUWORK #15	ret_far ldrh r1, [r9, #CPU_SP]
ldrh r4, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
;	CPUWORK #15
add r0, r4, r5	add r4, r1, #2
add r4, r4, #2	add r0, r5, r1
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r8 lsl #16	mov r8, r8 lsl #16
mov r8, r8 lsr #16	mov r8, r8 lsr #16
orr r8, r8, r0 lsl #16	orr r8, r8, r0 lsl #16
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
Line 1332 int_03 CPUWORK #3	Line 1344 int_03 CPUWORK #3
b i286a_localint	b i286a_localint

int_d8 CPUWORK #3	int_d8 CPUWORK #3
GETPC8	GETPCF8
mov r6, r0	mov r6, r0
b i286a_localint	b i286a_localint

Line 1343 into CPUWORK #4	Line 1355 into CPUWORK #4
b i286a_localint	b i286a_localint

iret bl extirq_pop	iret bl extirq_pop
CPUWORK #31
ldrh r1, [r9, #CPU_SP]	ldrh r1, [r9, #CPU_SP]
ldr r5, [r9, #CPU_SS_BASE]	ldr r5, [r9, #CPU_SS_BASE]
;	CPUWORK #31
add r4, r1, #2	add r4, r1, #2
add r0, r1, r5	add r0, r5, r1
bl i286_memoryread_w	bl i286a_memoryread_w
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
mov r8, r0 lsl #16	mov r8, r0 lsl #16
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
str r1, [r9, #CPU_CS_BASE]	str r1, [r9, #CPU_CS_BASE]
bic r4, r4, #(1 << 16)	bic r4, r4, #(1 << 16)
add r0, r4, r5	add r0, r4, r5
add r4, r4, #2	add r4, r4, #2
bl i286_memoryread_w	bl i286a_memoryread_w
strh r4, [r9, #CPU_SP]	strh r4, [r9, #CPU_SP]
mov r2, #3	mov r2, #3
bic r1, r0, #&f000 ; i286	bic r1, r0, #&f000 ; i286
Line 1371 iret bl extirq_pop	Line 1382 iret bl extirq_pop
strb r2, [r9, #CPU_TRAP]	strb r2, [r9, #CPU_TRAP]
bne iret_withirq	bne iret_withirq
ldr r0, iret_pic	ldr r0, iret_pic
tst r8, #I_FLAG	NOINTREXIT
moveq pc, r11
PICEXISTINTR
moveq pc, r11
iret_withirq I286IRQCHECKTERM	iret_withirq I286IRQCHECKTERM
iret_pic dcd pic	iret_pic dcd pic


aam CPUWORK #16	aam CPUWORK #16
GETPC8	GETPCF8
movs r0, r0, lsl #7	movs r0, r0 lsl #7
beq aamzero	beq aamzero
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
mov r2, #&80	mov r2, #&80
Line 1389 aam CPUWORK #16	Line 1397 aam CPUWORK #16
aamlp cmp r1, r0	aamlp cmp r1, r0
subcs r1, r1, r0	subcs r1, r1, r0
orrcs r3, r2, r3	orrcs r3, r2, r3
	mov r0, r0 lsr #1
movs r2, r2 lsr #1	movs r2, r2 lsr #1
bne aamlp	bne aamlp
ldrb r2, [r10, r1]	ldrb r2, [r10, r1]
Line 1405 aamzero sub r8, r8, #(2 << 16)	Line 1414 aamzero sub r8, r8, #(2 << 16)
mov r6, #0	mov r6, #0
b i286a_localint	b i286a_localint

aad CPUWORK #14	aad ldrh r6, [r9, #CPU_AX]
GETPC8	GETPCF8
ldrh r1, [r9, #CPU_AX]	mov r2, r6 lsr #8
	mla r3, r2, r0, r6
bic r8, r8, #(S_FLAG + Z_FLAG + P_FLAG)	bic r8, r8, #(S_FLAG + Z_FLAG + P_FLAG)
;
mov r2, r1 lsr #8
mla r3, r2, r0, r1
;
and r1, r3, #&ff	and r1, r3, #&ff
;	ldrb r2, [r1, r10]
ldrb r2, [r10, r1]
strh r1, [r9, #CPU_AX]	strh r1, [r9, #CPU_AX]
;	CPUWORK #14
orr r8, r2, r8	orr r8, r2, r8
mov pc, r11	mov pc, r11

Line 1434 xlat ldrb r0, [r9, #CPU_AL]	Line 1439 xlat ldrb r0, [r9, #CPU_AL]
add r0, r1, r0	add r0, r1, r0
bic r0, r0, #(1 << 16)	bic r0, r0, #(1 << 16)
add r0, r2, r0	add r0, r2, r0
bl i286_memoryread	bl i286a_memoryread
strb r0, [r9, #CPU_AL]	strb r0, [r9, #CPU_AL]
mov pc, r11	mov pc, r11

esc CPUWORK #2	esc CPUWORK #2
GETPC8	GETPCF8
cmp r0, #&c0	cmp r0, #&c0
movcs pc, r11	movcs pc, r11
mov lr, r11	mov lr, r11
Line 1494 jcxz ldrh r0, [r9, #CPU_CX]	Line 1499 jcxz ldrh r0, [r9, #CPU_CX]
jcxzj JMPS #8	jcxzj JMPS #8

in_al_d8 CPUWORK #5	in_al_d8 CPUWORK #5
GETPC8	GETPCF8
add r3, r0, r8 lsr #16	add r3, r0, r8 lsr #16
CPUSV	CPUSV
str r3, [r9, #CPU_INPUT]	str r3, [r9, #CPU_INPUT]
Line 1506 in_al_d8 CPUWORK #5	Line 1511 in_al_d8 CPUWORK #5
mov pc, r11	mov pc, r11

in_ax_d8 CPUWORK #5	in_ax_d8 CPUWORK #5
GETPC8	GETPCF8
CPUSV	CPUSV
bl iocore_inp16	bl iocore_inp16
CPULD	CPULD
Line 1514 in_ax_d8 CPUWORK #5	Line 1519 in_ax_d8 CPUWORK #5
mov pc, r11	mov pc, r11

out_d8_al CPUWORK #3	out_d8_al CPUWORK #3
GETPC8	GETPCF8
ldrb r1, [r9, #CPU_AL]	ldrb r1, [r9, #CPU_AL]
CPUSV	CPUSV
bl iocore_out8	bl iocore_out8
Line 1522 out_d8_al CPUWORK #3	Line 1527 out_d8_al CPUWORK #3
mov pc, r11	mov pc, r11

out_d8_ax CPUWORK #3	out_d8_ax CPUWORK #3
GETPC8	GETPCF8
ldrh r1, [r9, #CPU_AX]	ldrh r1, [r9, #CPU_AX]
CPUSV	CPUSV
bl iocore_out16	bl iocore_out16
CPULD	CPULD
mov pc, r11	mov pc, r11

call_near CPUWORK #7	call_near GETPC16
GETPC16
ldrh r2, [r9, #CPU_SP]	ldrh r2, [r9, #CPU_SP]
ldr r3, [r9, #CPU_SS_BASE]	ldr r3, [r9, #CPU_SS_BASE]
;	CPUWORK #7
sub r1, r2, #2	sub r1, r2, #2
mov r2, r1 lsl #16	mov r2, r1 lsl #16
strh r1, [r9, #CPU_SP]	strh r1, [r9, #CPU_SP]
Line 1541 call_near CPUWORK #7	Line 1545 call_near CPUWORK #7
add r8, r8, r0 lsl #16	add r8, r8, r0 lsl #16
add r0, r3, r2 lsr #16	add r0, r3, r2 lsr #16
mov lr, r11	mov lr, r11
b i286_memorywrite_w	b i286a_memorywrite_w

jmp_near ldr r4, [r9, #CPU_CS_BASE]	jmp_near ldr r4, [r9, #CPU_CS_BASE]
add r5, r8, #(2 << 16)	add r5, r8, #(2 << 16)
CPUWORK #7	CPUWORK #7
add r0, r4, r8 lsr #16	add r0, r4, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r8, r5, r0 lsl #16	add r8, r5, r0 lsl #16
mov pc, r11	mov pc, r11

Line 1556 jmp_far CPUWORK #11	Line 1560 jmp_far CPUWORK #11
add r5, r8, #(2 << 16)	add r5, r8, #(2 << 16)
mov r6, r8 lsl #16	mov r6, r8 lsl #16
add r0, r4, r8 lsr #16	add r0, r4, r8 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
mov r8, r0 lsl #16	mov r8, r0 lsl #16
add r0, r4, r5 lsr #16	add r0, r4, r5 lsr #16
bl i286_memoryread_w	bl i286a_memoryread_w
add r8, r8, r6 lsr #16	add r8, r8, r6 lsr #16
mov r1, r0 lsl #4	mov r1, r0 lsl #4
strh r0, [r9, #CPU_CS]	strh r0, [r9, #CPU_CS]
Line 1633 sti_set orr r8, r8, #I_FLAG	Line 1637 sti_set orr r8, r8, #I_FLAG
ldr r0, sti_pic	ldr r0, sti_pic
strneb r1, [r9, #CPU_TRAP]	strneb r1, [r9, #CPU_TRAP]
bne sti_withirq	bne sti_withirq
PICEXISTINTR	PICEXISTINTR sti_noirq
bne sti_withirq	bne sti_withirq
sti_noirq NEXT_OPCODE	sti_noirq NEXT_OPCODE
sti_pic dcd pic	sti_pic dcd pic
Line 1648 std CPUWORK #2	Line 1652 std CPUWORK #2
mov pc, r11	mov pc, r11


MACRO
$label SEGPREFIX $b
$label ldr r1, [r9, $b]
ldrb r6, [r9, #CPU_PREFIX]
add r0, r5, r8 lsr #16
str r1, [r9, #CPU_SS_FIX]
str r1, [r9, #CPU_DS_FIX]
adr r2, removeprefix
cmp r2, r11
strne r11, [sp, #-4]!
movne r11, r2
add r6, r6, #1
cmp r6, #MAX_PREFIX
bcs prefix_segfault
bl i286_memoryread
ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]
mov pc, r1
MEND

segprefix_es SEGPREFIX #CPU_ES_BASE
segprefix_cs SEGPREFIX #CPU_CS_BASE
segprefix_ss SEGPREFIX #CPU_SS_BASE
segprefix_ds SEGPREFIX #CPU_DS_BASE

prefix_fault adr r1, removeprefix
cmp r1, r11
strne r11, [sp, #-4]!
prefix_segfault sub r8, r8, #(MAX_PREFIX << 16)
mov r6, #6
mov r11, pc
b i286a_localint
removeprefix ldr r0, [r9, #CPU_SS_BASE]
ldr r1, [r9, #CPU_DS_BASE]
mov r2, #0
str r0, [r9, #CPU_SS_FIX]
str r1, [r9, #CPU_DS_FIX]
strb r2, [r9, #CPU_PREFIX]
ldr pc, [sp], #4


; ---- cpu execute	; ---- cpu execute

i286a_step stmdb sp!, {r4 - r11, lr}	i286a_step stmdb sp!, {r4 - r11, lr}
Line 1697 i286a_step stmdb sp!, {r4 - r11, lr}	Line 1659 i286a_step stmdb sp!, {r4 - r11, lr}
ldr r10, ias_r10	ldr r10, ias_r10
;	;
ldr r5, [r9, #CPU_CS_BASE]	ldr r5, [r9, #CPU_CS_BASE]
; ldr r7, [r9, #CPU_REMAINCLOCK]	CPULD
ldr r8, [r9, #CPU_FLAG]

adr r4, optbl1	adr r4, optbl1
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
bl i286_memoryread	bl i286a_memoryread
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
mov r11, pc	mov r11, pc
mov pc, r1	mov pc, r1

str r8, [r9, #CPU_FLAG]	bl dmap_i286
	CPUSV
ldmia sp!, {r4 - r11, pc}	ldmia sp!, {r4 - r11, pc}

ias_r9 dcd i286core - CPU_REG
ias_r10 dcd _szpcflag8	i286a stmdb sp!, {r4 - r11, lr}
	ldr r9, ias_r9
	ldr r2, ias_r1
	ldr r10, ias_r10
	CPULD
	ldr r5, [r9, #CPU_CS_BASE]
	ldr r1, [r2, #DMAC_WORKING]
	and r0, r8, #(I_FLAG + T_FLAG)
	cmp r0, #(I_FLAG + T_FLAG)
	beq i286awithtrap
	cmp r1, #0
	bne i286awithdma
	i286a_lp adr r4, optbl1
	add r0, r5, r8 lsr #16
	GETR0
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	mov r11, pc
	mov pc, r1
	CPUDBGL
	cmp r7, #0
	ldrgt r5, [r9, #CPU_CS_BASE]
	bgt i286a_lp
	CPUSV
	ldmia sp!, {r4 - r11, pc}

	ias_r9 dcd i286acore + CPU_SIZE
	ias_r1 dcd dmac
	ias_r10 dcd iflags

	i286awithdma adr r4, optbl1
	add r0, r5, r8 lsr #16
	GETR0
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	mov r11, pc
	mov pc, r1
	bl dmap_i286
	CPUDBGL
	cmp r7, #0
	ldrgt r5, [r9, #CPU_CS_BASE]
	bgt i286awithdma
	CPUSV
	ldmia sp!, {r4 - r11, pc}

	i286awithtrap adr r4, optbl1
	add r0, r5, r8 lsr #16
	GETR0
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	mov r11, pc
	mov pc, r1
	bl dmap_i286
	and r0, r8, #(I_FLAG + T_FLAG)
	cmp r0, #(I_FLAG + T_FLAG)
	beq i286a_trapint
	i286a_trapintr CPUSV
	ldmia sp!, {r4 - r11, pc}

optbl1 dcd add_ea_r8 ; 00	optbl1 dcd add_ea_r8 ; 00
dcd add_ea_r16	dcd add_ea_r16
Line 1754 optbl1 dcd add_ea_r8 ; 00	Line 1773 optbl1 dcd add_ea_r8 ; 00
dcd and_r16_ea	dcd and_r16_ea
dcd and_al_d8	dcd and_al_d8
dcd and_ax_d16	dcd and_ax_d16
dcd 0 ; segprefix_es	dcd segprefix_es
dcd daa	dcd daa
dcd sub_ea_r8	dcd sub_ea_r8
dcd sub_ea_r16	dcd sub_ea_r16
Line 1762 optbl1 dcd add_ea_r8 ; 00	Line 1781 optbl1 dcd add_ea_r8 ; 00
dcd sub_r16_ea	dcd sub_r16_ea
dcd sub_al_d8	dcd sub_al_d8
dcd sub_ax_d16	dcd sub_ax_d16
dcd 0 ; segprefix_cs	dcd segprefix_cs
dcd das	dcd das

dcd xor_ea_r8 ; 30	dcd xor_ea_r8 ; 30
Line 1771 optbl1 dcd add_ea_r8 ; 00	Line 1790 optbl1 dcd add_ea_r8 ; 00
dcd xor_r16_ea	dcd xor_r16_ea
dcd xor_al_d8	dcd xor_al_d8
dcd xor_ax_d16	dcd xor_ax_d16
dcd 0 ; segprefix_ss	dcd segprefix_ss
dcd aaa	dcd aaa
dcd cmp_ea_r8	dcd cmp_ea_r8
dcd cmp_ea_r16	dcd cmp_ea_r16
Line 1779 optbl1 dcd add_ea_r8 ; 00	Line 1798 optbl1 dcd add_ea_r8 ; 00
dcd cmp_r16_ea	dcd cmp_r16_ea
dcd cmp_al_d8	dcd cmp_al_d8
dcd cmp_ax_d16	dcd cmp_ax_d16
dcd 0 ; segprefix_ds	dcd segprefix_ds
dcd aas	dcd aas

dcd inc_ax ; 40	dcd inc_ax ; 40
Line 1922 optbl1 dcd add_ea_r8 ; 00	Line 1941 optbl1 dcd add_ea_r8 ; 00
dcd i286asft16_d8	dcd i286asft16_d8
dcd ret_near_d16	dcd ret_near_d16
dcd ret_near	dcd ret_near
dcd 0 ; les_r16_ea (now testing i286a_a)	dcd les_r16_ea ; (now testing i286a_a)
dcd 0 ; lds_r16_ea (now testing i286a_a)	dcd lds_r16_ea ; (now testing i286a_a)
dcd mov_ea8_d8	dcd mov_ea8_d8
dcd mov_ea16_d16	dcd mov_ea16_d16
dcd enter	dcd enter
Line 1971 optbl1 dcd add_ea_r8 ; 00	Line 1990 optbl1 dcd add_ea_r8 ; 00

dcd lock ; f0	dcd lock ; f0
dcd lock	dcd lock
dcd 0 ; repne	dcd repne
dcd 0 ; repe	dcd repe
dcd hlt	dcd hlt
dcd cmc	dcd cmc
dcd i286aopf6	dcd i286aopf6
Line 1987 optbl1 dcd add_ea_r8 ; 00	Line 2006 optbl1 dcd add_ea_r8 ; 00
dcd i286aopff	dcd i286aopff


	MACRO
	$label SEGPREFIX $b
	$label ldr r1, [r9, $b]
	ldrb r6, [r9, #CPU_PREFIX]
	;; ldr r5, [r9, #CPU_CS_BASE]
	add r0, r5, r8 lsr #16
	str r1, [r9, #CPU_SS_FIX]
	str r1, [r9, #CPU_DS_FIX]
	cmp r6, #0
	streq r11, [sp, #-4]!
	adreq r11, prefix1_remove
	add r6, r6, #1
	cmp r6, #MAX_PREFIX
	bcs prefix_fault
	GETR0
	ldr r1, [r4, r0 lsl #2]
	add r8, r8, #(1 << 16)
	strb r6, [r9, #CPU_PREFIX]
	mov pc, r1
	MEND

	segprefix_es SEGPREFIX #CPU_ES_BASE
	segprefix_cs SEGPREFIX #CPU_CS_BASE
	segprefix_ss SEGPREFIX #CPU_SS_BASE
	segprefix_ds SEGPREFIX #CPU_DS_BASE

	prefix_fault sub r8, r8, #((MAX_PREFIX - 1) << 16)
	mov r6, #6
	mov r11, pc
	b i286a_localint
	prefix1_remove ldr r0, [r9, #CPU_SS_BASE]
	ldr r1, [r9, #CPU_DS_BASE]
	mov r2, #0
	str r0, [r9, #CPU_SS_FIX]
	str r1, [r9, #CPU_DS_FIX]
	strb r2, [r9, #CPU_PREFIX]
	ldr pc, [sp], #4


; ---- repne	; ---- repne

repne ldrb r6, [r9, #CPU_PREFIX]	repne ldrb r6, [r9, #CPU_PREFIX]
adr r4, optblne	adr r4, optblne
	;; ldr r5, [r9, #CPU_CS_BASE]
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
	cmp r6, #0
	streq r11, [sp, #-4]!
	adreq r11, prefix1_remove
add r6, r6, #1	add r6, r6, #1
cmp r6, #MAX_PREFIX	cmp r6, #MAX_PREFIX
bcs prefix_fault	bcs prefix_fault
bl i286_memoryread	GETR0
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]	strb r6, [r9, #CPU_PREFIX]
Line 2115 optblne dcd add_ea_r8 ; 00	Line 2177 optblne dcd add_ea_r8 ; 00
dcd imul_r_ea_d16	dcd imul_r_ea_d16
dcd push_d8	dcd push_d8
dcd imul_r_ea_d8	dcd imul_r_ea_d8
dcd 0 ; i286a_rep_insb	dcd i286a_rep_insb
dcd 0 ; i286a_rep_insw	dcd i286a_rep_insw
dcd 0 ; i286a_rep_outsb	dcd i286a_rep_outsb
dcd 0 ; i286a_rep_outsw	dcd i286a_rep_outsw

dcd jo_short ; 70	dcd jo_short ; 70
dcd jno_short	dcd jno_short
Line 2175 optblne dcd add_ea_r8 ; 00	Line 2237 optblne dcd add_ea_r8 ; 00
dcd mov_ax_m16	dcd mov_ax_m16
dcd mov_m8_al	dcd mov_m8_al
dcd mov_m16_ax	dcd mov_m16_ax
dcd 0 ; i286a_rep_movsb	dcd i286a_rep_movsb
dcd 0 ; i286a_rep_movsw	dcd i286a_rep_movsw
dcd 0 ; i286a_repne_cmpsb	dcd i286a_repne_cmpsb
dcd 0 ; i286a_repne_cmpsw	dcd i286a_repne_cmpsw
dcd test_al_d8	dcd test_al_d8
dcd test_ax_d16	dcd test_ax_d16
dcd 0 ; i286a_rep_stosb	dcd i286a_rep_stosb
dcd 0 ; i286a_rep_stosw	dcd i286a_rep_stosw
dcd 0 ; i286a_rep_lodsb	dcd i286a_rep_lodsb
dcd 0 ; i286a_rep_lodsw	dcd i286a_rep_lodsw
dcd 0 ; i286a_repne_scasb	dcd i286a_repne_scasb
dcd 0 ; i286a_repne_scasw	dcd i286a_repne_scasw

dcd mov_al_imm ; b0	dcd mov_al_imm ; b0
dcd mov_cl_imm	dcd mov_cl_imm
Line 2277 optblne dcd add_ea_r8 ; 00	Line 2339 optblne dcd add_ea_r8 ; 00

repe ldrb r6, [r9, #CPU_PREFIX]	repe ldrb r6, [r9, #CPU_PREFIX]
adr r4, optble	adr r4, optble
	;; ldr r5, [r9, #CPU_CS_BASE]
add r0, r5, r8 lsr #16	add r0, r5, r8 lsr #16
	cmp r6, #0
	streq r11, [sp, #-4]!
	adreq r11, prefix2_remove
add r6, r6, #1	add r6, r6, #1
cmp r6, #MAX_PREFIX	cmp r6, #MAX_PREFIX
bcs prefix_fault	bcs prefix_fault
bl i286_memoryread	GETR0
ldr r1, [r4, r0 lsl #2]	ldr r1, [r4, r0 lsl #2]
add r8, r8, #(1 << 16)	add r8, r8, #(1 << 16)
strb r6, [r9, #CPU_PREFIX]	strb r6, [r9, #CPU_PREFIX]
mov pc, r1	mov pc, r1

	prefix2_remove ldr r0, [r9, #CPU_SS_BASE]
	ldr r1, [r9, #CPU_DS_BASE]
	mov r2, #0
	str r0, [r9, #CPU_SS_FIX]
	str r1, [r9, #CPU_DS_FIX]
	strb r2, [r9, #CPU_PREFIX]
	ldr pc, [sp], #4

optble dcd add_ea_r8 ; 00	optble dcd add_ea_r8 ; 00
dcd add_ea_r16	dcd add_ea_r16
dcd add_r8_ea	dcd add_r8_ea
Line 2401 optble dcd add_ea_r8 ; 00	Line 2475 optble dcd add_ea_r8 ; 00
dcd imul_r_ea_d16	dcd imul_r_ea_d16
dcd push_d8	dcd push_d8
dcd imul_r_ea_d8	dcd imul_r_ea_d8
dcd 0 ; i286a_rep_insb	dcd i286a_rep_insb
dcd 0 ; i286a_rep_insw	dcd i286a_rep_insw
dcd 0 ; i286a_rep_outsb	dcd i286a_rep_outsb
dcd 0 ; i286a_rep_outsw	dcd i286a_rep_outsw

dcd jo_short ; 70	dcd jo_short ; 70
dcd jno_short	dcd jno_short
Line 2461 optble dcd add_ea_r8 ; 00	Line 2535 optble dcd add_ea_r8 ; 00
dcd mov_ax_m16	dcd mov_ax_m16
dcd mov_m8_al	dcd mov_m8_al
dcd mov_m16_ax	dcd mov_m16_ax
dcd 0 ; i286a_rep_movsb	dcd i286a_rep_movsb
dcd 0 ; i286a_rep_movsw	dcd i286a_rep_movsw
dcd 0 ; i286a_repe_cmpsb	dcd i286a_repe_cmpsb
dcd 0 ; i286a_repe_cmpsw	dcd i286a_repe_cmpsw
dcd test_al_d8	dcd test_al_d8
dcd test_ax_d16	dcd test_ax_d16
dcd 0 ; i286a_rep_stosb	dcd i286a_rep_stosb
dcd 0 ; i286a_rep_stosw	dcd i286a_rep_stosw
dcd 0 ; i286a_rep_lodsb	dcd i286a_rep_lodsb
dcd 0 ; i286a_rep_lodsw	dcd i286a_rep_lodsw
dcd 0 ; i286a_repe_scasb	dcd i286a_repe_scasb
dcd 0 ; i286a_repe_scasw	dcd i286a_repe_scasw

dcd mov_al_imm ; b0	dcd mov_al_imm ; b0
dcd mov_cl_imm	dcd mov_cl_imm

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.8
changed lines
	Added in v.1.16