--- np2/i286a/i286a_mn.s	2004/01/05 15:47:18	1.20
+++ np2/i286a/i286a_mn.s	2004/01/07 12:51:29	1.22
@@ -9,7 +9,7 @@
 	IMPORT		iflags
 	IMPORT		i286a_localint
 	IMPORT		i286a_trapint
-	EXPORT		i286a_trapintr
+	IMPORT		i286a_selector
 	IMPORT		i286a_ea
 	IMPORT		i286a_lea
 	IMPORT		i286a_a
@@ -781,9 +781,12 @@ leareg			mov		r6, #6
 				sub		r8, r8, #(2 << 16)
 				b		i286a_localint
 
-mov_seg_ea		GETPCF8
+mov_seg_ea		ldrh	r6, [r9, #CPU_MSW]
+				GETPCF8
 				adr		r2, msegea_tbl
 				and		r1, r0, #(3 << 3)
+				tst		r6, #MSW_PE
+				orrne	r1, r1, #(4 << 3)
 				mov		r6, r8
 				ldr		r2, [r2, r1 lsr #1]
 				cmp		r0, #&c0
@@ -801,6 +804,10 @@ msegea_tbl		dcd		msegea_es
 				dcd		msegea_cs
 				dcd		msegea_ss
 				dcd		msegea_ds
+				dcd		msegea_es_p
+				dcd		msegea_cs
+				dcd		msegea_ss_p
+				dcd		msegea_ds_p
 msegea_es		mov		r1, r0 lsl #4
 				strh	r0, [r9, #CPU_ES]
 				str		r1, [r9, #CPU_ES_BASE]
@@ -815,10 +822,27 @@ msegea_ss		mov		r1, r0 lsl #4
 				str		r1, [r9, #CPU_SS_BASE]
 				str		r1, [r9, #CPU_SS_FIX]
 				NEXT_OPCODE
+
+msegea_es_p		strh	r0, [r9, #CPU_ES]
+				bl		i286a_selector
+				str		r0, [r9, #CPU_ES_BASE]
+				mov		pc, r11
+msegea_ds_p		strh	r0, [r9, #CPU_DS]
+				bl		i286a_selector
+				str		r0, [r9, #CPU_DS_BASE]
+				str		r0, [r9, #CPU_DS_FIX]
+				mov		pc, r11
+msegea_ss_p		strh	r0, [r9, #CPU_SS]
+				bl		i286a_selector
+				str		r0, [r9, #CPU_SS_BASE]
+				str		r0, [r9, #CPU_SS_FIX]
+				NEXT_OPCODE
+
 msegea_cs		sub		r8, r6, #(2 << 16)
 				mov		r6, #6
 				b		i286a_localint
 
+
 pop_ea			POP		#5
 				mov		r6, r0
 				GETPCF8
@@ -918,6 +942,14 @@ pushf			CPUWORK	#3
 				b		i286a_memorywrite_w
 
 popf			POP		#5
+		if 1
+				mov		r8, r8 lsr #16
+				bic		r1, r0, #&f000					; i286
+				and		r2, r0, #(I_FLAG + T_FLAG)
+				orr		r8, r1, r8 lsl #16
+				cmp		r2, #(I_FLAG + T_FLAG)
+				beq		popf_withirq
+		else
 				mov		r2, #3
 				mov		r8, r8 lsr #16
 				and		r2, r2, r0 lsr #8
@@ -926,6 +958,7 @@ popf			POP		#5
 				orr		r8, r1, r8 lsl #16
 				strb	r2, [r9, #CPU_TRAP]
 				bne		popf_withirq
+		endif
 				ldr		r0, popf_pic
 				NOINTREXIT
 popf_withirq	I286IRQCHECKTERM
@@ -1372,6 +1405,13 @@ iret			bl		extirq_pop
 				add		r4, r4, #2
 				bl		i286a_memoryread_w
 				strh	r4, [r9, #CPU_SP]
+		if 1
+				bic		r1, r0, #&f000
+				and		r2, r0, #(I_FLAG + T_FLAG)
+				orr		r8, r1, r8
+				cmp		r2, #(I_FLAG + T_FLAG)
+				beq		iret_withirq
+		else
 				mov		r2, #3
 				bic		r1, r0, #&f000					; i286
 				and		r2, r2, r0 lsr #8
@@ -1379,6 +1419,7 @@ iret			bl		extirq_pop
 				ands	r2, r2, r2 lsr #1
 				strb	r2, [r9, #CPU_TRAP]
 				bne		iret_withirq
+		endif
 				ldr		r0, iret_pic
 				NOINTREXIT
 iret_withirq	I286IRQCHECKTERM
@@ -1621,20 +1662,30 @@ stc				CPUWORK	#2
 				mov		pc, r11
 
 cli				CPUWORK	#2
+		if 1
+				bic		r8, r8, #I_FLAG
+		else
 				mov		r0, #0
 				bic		r8, r8, #I_FLAG
 				strb	r0, [r9, #CPU_TRAP]
+		endif
 				mov		pc, r11
 
 sti				CPUWORK	#2
 				tst		r8, #I_FLAG
 				bne		sti_noirq
 sti_set			orr		r8, r8, #I_FLAG
+		if 1
+				ldr		r0, sti_pic
+				tst		r8, #T_FLAG
+				bne		sti_withirq
+		else
 				mov		r1, #(T_FLAG >> 8)
 				ands	r1, r1, r8 lsr #8
 				ldr		r0, sti_pic
 				strneb	r1, [r9, #CPU_TRAP]
 				bne		sti_withirq
+		endif
 				PICEXISTINTR	sti_noirq
 				bne		sti_withirq
 sti_noirq		NEXT_OPCODE
@@ -1727,8 +1778,8 @@ i286awithtrap	adr		r4, optbl1
 				bl		dmap_i286
 				and		r0, r8, #(I_FLAG + T_FLAG)
 				cmp		r0, #(I_FLAG + T_FLAG)
-				beq		i286a_trapint
-i286a_trapintr	CPUSV
+				bleq	i286a_trapint
+				CPUSV
 				ldmia	sp!, {r4 - r11, pc}
 
 optbl1			dcd		add_ea_r8			; 00