--- np2/i286a/i286a_mn.s 2003/12/22 07:41:15 1.16 +++ np2/i286a/i286a_mn.s 2005/03/16 03:53:45 1.27 @@ -9,7 +9,7 @@ IMPORT iflags IMPORT i286a_localint IMPORT i286a_trapint - EXPORT i286a_trapintr + IMPORT i286a_selector IMPORT i286a_ea IMPORT i286a_lea IMPORT i286a_a @@ -24,7 +24,7 @@ IMPORT iocore_out8 IMPORT iocore_out16 - IMPORT dmap_i286 + IMPORT dmax86 IMPORT biosfunc IMPORT i286a_cts @@ -134,8 +134,8 @@ xor_ax_d16 OP_AX_D16 XOR16, #3 ; segprefix_ss ! ; aaa * -cmp_ea_r8 S_EA_R8 SUB8, #2, #7 -cmp_ea_r16 S_EA_R16 SUB16, #2, #7 +cmp_ea_r8 S_EA_R8 SUB8, #2, #6 +cmp_ea_r16 S_EA_R16 SUB16, #2, #6 cmp_r8_ea S_R8_EA SUB8, #2, #6 cmp_r16_ea S_R16_EA SUB16, #2, #6 cmp_al_d8 S_AL_D8 SUB8, #3 @@ -190,18 +190,18 @@ pop_di REGPOP #CPU_DI, #5 ; outsb * ; outsw * -jo_short JMPNE #O_FLAG, #2, #7 -jno_short JMPEQ #O_FLAG, #2, #7 -jc_short JMPNE #C_FLAG, #2, #7 -jnc_short JMPEQ #C_FLAG, #2, #7 -jz_short JMPNE #Z_FLAG, #2, #7 -jnz_short JMPEQ #Z_FLAG, #2, #7 -jna_short JMPNE #(Z_FLAG + C_FLAG), #2, #7 -ja_short JMPEQ #(Z_FLAG + C_FLAG), #2, #7 -js_short JMPNE #S_FLAG, #2, #7 -jns_short JMPEQ #S_FLAG, #2, #7 -jp_short JMPNE #P_FLAG, #2, #7 -jnp_short JMPEQ #P_FLAG, #2, #7 +jo_short JMPNE #O_FLAG, #3, #7 +jno_short JMPEQ #O_FLAG, #3, #7 +jc_short JMPNE #C_FLAG, #3, #7 +jnc_short JMPEQ #C_FLAG, #3, #7 +jz_short JMPNE #Z_FLAG, #3, #7 +jnz_short JMPEQ #Z_FLAG, #3, #7 +jna_short JMPNE #(Z_FLAG + C_FLAG), #3, #7 +ja_short JMPEQ #(Z_FLAG + C_FLAG), #3, #7 +js_short JMPNE #S_FLAG, #3, #7 +jns_short JMPEQ #S_FLAG, #3, #7 +jp_short JMPNE #P_FLAG, #3, #7 +jnp_short JMPEQ #P_FLAG, #3, #7 ; jl_short + ; jnl_short + ; jle_short + @@ -650,7 +650,7 @@ jle_short tst r8, #Z_FLAG jl_short eor r0, r8, r8 lsr #4 tst r0, #S_FLAG bne jmps -nojmps CPUWORK #2 +nojmps CPUWORK #3 add r8, r8, #(1 << 16) mov pc, r11 @@ -665,11 +665,11 @@ jmps JMPS #7 xchg_ea_r8 EAREG8 r6 cmp r0, #&c0 bcc xchgear8_1 - R8SRC r0, r5 + R8SRC r0, r2 ldrb r0, [r6, #CPU_REG] - ldrb r1, [r5, #CPU_REG] + ldrb r1, [r2, #CPU_REG] CPUWORK #3 - strb r0, [r5, #CPU_REG] + strb r0, [r2, #CPU_REG] strb r1, [r6, #CPU_REG] mov pc, r11 xchgear8_1 bl i286a_ea @@ -693,18 +693,15 @@ xchgear8_2 mov r5, r0 xchg_ea_r16 EAREG16 r6 cmp r0, #&c0 bcc xchgear16_1 - R16SRC r0, r5 + R16SRC r0, r2 ldrh r0, [r6, #CPU_REG] - ldrh r1, [r5, #CPU_REG] + ldrh r1, [r2, #CPU_REG] CPUWORK #3 - strh r0, [r5, #CPU_REG] + strh r0, [r2, #CPU_REG] strh r1, [r6, #CPU_REG] mov pc, r11 xchgear16_1 bl i286a_ea - tst r0, #1 - bne xchgear16_2 - cmp r0, #I286_MEMWRITEMAX - bcs xchgear16_2 + ACCWORD r0, xchgear16_2 ldrh r1, [r6, #CPU_REG] ldrh r4, [r9, r0] CPUWORK #5 @@ -724,9 +721,9 @@ mov_ea_r8 EAREG8 r6 cmp r0, #&c0 bcc movear8_1 ldrb r1, [r6, #CPU_REG] - R8SRC r0, r5 + R8SRC r0, r2 CPUWORK #3 - strb r1, [r5, #CPU_REG] + strb r1, [r2, #CPU_REG] mov pc, r11 movear8_1 CPUWORK #5 bl i286a_ea @@ -738,9 +735,9 @@ mov_ea_r16 EAREG16 r6 cmp r0, #&c0 bcc movear16_1 ldrh r1, [r6, #CPU_REG] - R16SRC r0, r5 + R16SRC r0, r2 CPUWORK #3 - strh r1, [r5, #CPU_REG] + strh r1, [r2, #CPU_REG] mov pc, r11 movear16_1 CPUWORK #5 bl i286a_ea @@ -784,25 +781,33 @@ leareg mov r6, #6 sub r8, r8, #(2 << 16) b i286a_localint -mov_seg_ea GETPCF8 - adr r6, msegea_tbl +mov_seg_ea ldrb r6, [r9, #CPU_MSW] + GETPCF8 + adr r2, msegea_tbl and r1, r0, #(3 << 3) - mov r5, r8 - ldr r6, [r6, r1 lsr #1] + tst r6, #MSW_PE + orrne r1, r1, #(4 << 3) + mov r6, r8 + ldr r2, [r2, r1 lsr #1] cmp r0, #&c0 bcc msegeam - CPUWORK #2 R16SRC r0, r4 + CPUWORK #2 ldrh r0, [r4, #CPU_REG] - mov pc, r6 -msegeam CPUWORK #5 + mov pc, r2 +msegeam str r2, [sp, #-4]! + CPUWORK #5 bl i286a_ea - bl i286a_memoryread_w - mov pc, r6 + ldr lr, [sp], #4 + b i286a_memoryread_w msegea_tbl dcd msegea_es dcd msegea_cs dcd msegea_ss dcd msegea_ds + dcd msegea_es_p + dcd msegea_cs + dcd msegea_ss_p + dcd msegea_ds_p msegea_es mov r1, r0 lsl #4 strh r0, [r9, #CPU_ES] str r1, [r9, #CPU_ES_BASE] @@ -817,10 +822,27 @@ msegea_ss mov r1, r0 lsl #4 str r1, [r9, #CPU_SS_BASE] str r1, [r9, #CPU_SS_FIX] NEXT_OPCODE -msegea_cs sub r8, r5, #(2 << 16) + +msegea_es_p strh r0, [r9, #CPU_ES] + bl i286a_selector + str r0, [r9, #CPU_ES_BASE] + mov pc, r11 +msegea_ds_p strh r0, [r9, #CPU_DS] + bl i286a_selector + str r0, [r9, #CPU_DS_BASE] + str r0, [r9, #CPU_DS_FIX] + mov pc, r11 +msegea_ss_p strh r0, [r9, #CPU_SS] + bl i286a_selector + str r0, [r9, #CPU_SS_BASE] + str r0, [r9, #CPU_SS_FIX] + NEXT_OPCODE + +msegea_cs sub r8, r6, #(2 << 16) mov r6, #6 b i286a_localint + pop_ea POP #5 mov r6, r0 GETPCF8 @@ -897,10 +919,13 @@ call_far CPUWORK #13 add r8, r8, #(2 << 16) mov r4, r0 lsl #16 add r0, r5, r8 lsr #16 + ldrb r5, [r9, #CPU_MSW] bl i286a_memoryread_w - mov r1, r0 lsl #4 strh r0, [r9, #CPU_CS] - str r1, [r9, #CPU_CS_BASE] + tst r5, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_CS_BASE] mov r0, r8 lsl #16 orr r8, r4, r0 lsr #16 mov pc, r11 @@ -920,6 +945,14 @@ pushf CPUWORK #3 b i286a_memorywrite_w popf POP #5 + if 1 + mov r8, r8 lsr #16 + bic r1, r0, #&f000 ; i286 + and r2, r0, #(I_FLAG + T_FLAG) + orr r8, r1, r8 lsl #16 + cmp r2, #(I_FLAG + T_FLAG) + beq popf_withirq + else mov r2, #3 mov r8, r8 lsr #16 and r2, r2, r0 lsr #8 @@ -928,6 +961,7 @@ popf POP #5 orr r8, r1, r8 lsl #16 strb r2, [r9, #CPU_TRAP] bne popf_withirq + endif ldr r0, popf_pic NOINTREXIT popf_withirq I286IRQCHECKTERM @@ -977,39 +1011,39 @@ mov_m16_ax CPUWORK #5 b i286a_memorywrite_w movsb CPUWORK #5 - ldrh r5, [r9, #CPU_SI] + ldrh r6, [r9, #CPU_SI] ldr r0, [r9, #CPU_DS_FIX] tst r8, #D_FLAG moveq r4, #1 movne r4, #-1 - add r0, r5, r0 + add r0, r6, r0 bl i286a_memoryread ldrh r3, [r9, #CPU_DI] ldr r2, [r9, #CPU_ES_BASE] - add r5, r5, r4 + add r6, r6, r4 mov r1, r0 add r0, r3, r2 add r3, r3, r4 - strh r5, [r9, #CPU_SI] + strh r6, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] mov lr, r11 b i286a_memorywrite movsw CPUWORK #5 - ldrh r5, [r9, #CPU_SI] + ldrh r6, [r9, #CPU_SI] ldr r0, [r9, #CPU_DS_FIX] tst r8, #D_FLAG moveq r4, #2 movne r4, #-2 - add r0, r5, r0 + add r0, r6, r0 bl i286a_memoryread_w ldrh r3, [r9, #CPU_DI] ldr r2, [r9, #CPU_ES_BASE] - add r5, r5, r4 + add r6, r6, r4 mov r1, r0 add r0, r3, r2 add r3, r3, r4 - strh r5, [r9, #CPU_SI] + strh r6, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] mov lr, r11 b i286a_memorywrite_w @@ -1167,10 +1201,13 @@ les_r16_ea GETPCF8 bl i286a_memoryread_w strh r0, [r5, #CPU_REG] add r0, r4, r6 + ldrb r4, [r9, #CPU_MSW] bl i286a_memoryread_w - mov r1, r0 lsl #4 strh r0, [r9, #CPU_ES] - str r1, [r9, #CPU_ES_BASE] + tst r4, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_ES_BASE] mov pc, r11 lr16_r mov r6, #6 sub r8, r8, #(2 << 16) @@ -1188,11 +1225,14 @@ lds_r16_ea GETPCF8 bl i286a_memoryread_w strh r0, [r5, #CPU_REG] add r0, r4, r6 + ldrb r4, [r9, #CPU_MSW] bl i286a_memoryread_w - mov r1, r0 lsl #4 strh r0, [r9, #CPU_DS] - str r1, [r9, #CPU_DS_BASE] - str r1, [r9, #CPU_DS_FIX] + tst r4, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_DS_BASE] + str r0, [r9, #CPU_DS_FIX] mov pc, r11 mov_ea8_d8 GETPCF8 @@ -1261,7 +1301,7 @@ enterlv1 cmp r0, #1 strh r2, [r9, #CPU_SP] bl i286a_memorywrite_w enterlv2 mov r1, r0, lsl #2 - add r1, r1, #12 + add r1, r1, #(12 + 4) CPUWORK r1 strh r4, [r9, #CPU_BP] str r11, [sp, #-4]! @@ -1314,10 +1354,13 @@ ret_far_d16 GETPC16 add r4, r4, #2 bl i286a_memoryread_w add r4, r6, r4 - mov r1, r0 lsl #4 + ldrb r1, [r9, #CPU_MSW] strh r4, [r9, #CPU_SP] strh r0, [r9, #CPU_CS] - str r1, [r9, #CPU_CS_BASE] + tst r1, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_CS_BASE] mov pc, r11 ret_far ldrh r1, [r9, #CPU_SP] @@ -1333,10 +1376,13 @@ ret_far ldrh r1, [r9, #CPU_SP] add r0, r4, r5 add r4, r4, #2 bl i286a_memoryread_w - mov r1, r0 lsl #4 + ldrb r1, [r9, #CPU_MSW] strh r4, [r9, #CPU_SP] strh r0, [r9, #CPU_CS] - str r1, [r9, #CPU_CS_BASE] + tst r1, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_CS_BASE] mov pc, r11 int_03 CPUWORK #3 @@ -1354,8 +1400,7 @@ into CPUWORK #4 mov r6, #4 b i286a_localint -iret bl extirq_pop - ldrh r1, [r9, #CPU_SP] +iret ldrh r1, [r9, #CPU_SP] ldr r5, [r9, #CPU_SS_BASE] CPUWORK #31 add r4, r1, #2 @@ -1374,6 +1419,13 @@ iret bl extirq_pop add r4, r4, #2 bl i286a_memoryread_w strh r4, [r9, #CPU_SP] + if 1 + bic r1, r0, #&f000 + and r2, r0, #(I_FLAG + T_FLAG) + orr r8, r1, r8 + cmp r2, #(I_FLAG + T_FLAG) + beq iret_withirq + else mov r2, #3 bic r1, r0, #&f000 ; i286 and r2, r2, r0 lsr #8 @@ -1381,6 +1433,7 @@ iret bl extirq_pop ands r2, r2, r2 lsr #1 strb r2, [r9, #CPU_TRAP] bne iret_withirq + endif ldr r0, iret_pic NOINTREXIT iret_withirq I286IRQCHECKTERM @@ -1498,9 +1551,9 @@ jcxz ldrh r0, [r9, #CPU_CX] mov pc, r11 jcxzj JMPS #8 -in_al_d8 CPUWORK #5 - GETPCF8 - add r3, r0, r8 lsr #16 +in_al_d8 GETPCF8 + CPUWORK #5 + add r3, r5, r8 lsr #16 CPUSV str r3, [r9, #CPU_INPUT] bl iocore_inp8 @@ -1564,10 +1617,13 @@ jmp_far CPUWORK #11 mov r8, r0 lsl #16 add r0, r4, r5 lsr #16 bl i286a_memoryread_w + ldrb r1, [r9, #CPU_MSW] add r8, r8, r6 lsr #16 - mov r1, r0 lsl #4 strh r0, [r9, #CPU_CS] - str r1, [r9, #CPU_CS_BASE] + tst r1, #MSW_PE + moveq r0, r0 lsl #4 + blne i286a_selector + str r0, [r9, #CPU_CS_BASE] mov pc, r11 in_al_dx CPUWORK #5 @@ -1623,21 +1679,31 @@ stc CPUWORK #2 mov pc, r11 cli CPUWORK #2 + if 1 + bic r8, r8, #I_FLAG + else mov r0, #0 bic r8, r8, #I_FLAG strb r0, [r9, #CPU_TRAP] + endif mov pc, r11 sti CPUWORK #2 tst r8, #I_FLAG bne sti_noirq sti_set orr r8, r8, #I_FLAG + if 1 + ldr r0, sti_pic + tst r8, #T_FLAG + bne sti_withirq + else mov r1, #(T_FLAG >> 8) ands r1, r1, r8 lsr #8 ldr r0, sti_pic strneb r1, [r9, #CPU_TRAP] bne sti_withirq - PICEXISTINTR sti_noirq + endif + PICEXISTINTR bne sti_withirq sti_noirq NEXT_OPCODE sti_pic dcd pic @@ -1669,7 +1735,7 @@ i286a_step stmdb sp!, {r4 - r11, lr} mov r11, pc mov pc, r1 - bl dmap_i286 + bl dmax86 CPUSV ldmia sp!, {r4 - r11, pc} @@ -1680,7 +1746,7 @@ i286a stmdb sp!, {r4 - r11, lr} ldr r10, ias_r10 CPULD ldr r5, [r9, #CPU_CS_BASE] - ldr r1, [r2, #DMAC_WORKING] + ldrb r1, [r2, #DMAC_WORKING] and r0, r8, #(I_FLAG + T_FLAG) cmp r0, #(I_FLAG + T_FLAG) beq i286awithtrap @@ -1711,7 +1777,7 @@ i286awithdma adr r4, optbl1 add r8, r8, #(1 << 16) mov r11, pc mov pc, r1 - bl dmap_i286 + bl dmax86 CPUDBGL cmp r7, #0 ldrgt r5, [r9, #CPU_CS_BASE] @@ -1726,11 +1792,11 @@ i286awithtrap adr r4, optbl1 add r8, r8, #(1 << 16) mov r11, pc mov pc, r1 - bl dmap_i286 + bl dmax86 and r0, r8, #(I_FLAG + T_FLAG) cmp r0, #(I_FLAG + T_FLAG) - beq i286a_trapint -i286a_trapintr CPUSV + bleq i286a_trapint + CPUSV ldmia sp!, {r4 - r11, pc} optbl1 dcd add_ea_r8 ; 00 @@ -1941,8 +2007,8 @@ optbl1 dcd add_ea_r8 ; 00 dcd i286asft16_d8 dcd ret_near_d16 dcd ret_near - dcd les_r16_ea ; (now testing i286a_a) - dcd lds_r16_ea ; (now testing i286a_a) + dcd les_r16_ea + dcd lds_r16_ea dcd mov_ea8_d8 dcd mov_ea16_d16 dcd enter