--- np2/i286a/i286a_mn.s 2003/12/18 19:14:08 1.8 +++ np2/i286a/i286a_mn.s 2003/12/20 10:27:55 1.14 @@ -3,30 +3,30 @@ INCLUDE i286aea.inc INCLUDE i286aalu.inc INCLUDE i286aop.inc - INCLUDE i286apic.inc + INCLUDE i286aio.inc IMPORT i286core - IMPORT _szpcflag8 + IMPORT iflags IMPORT i286a_localint + IMPORT i286a_trapint + EXPORT i286a_trapintr IMPORT i286a_ea IMPORT i286a_lea IMPORT i286a_a - IMPORT i286_memoryread - IMPORT i286_memoryread_w - IMPORT i286_memorywrite - IMPORT i286_memorywrite_w + IMPORT i286a_memoryread + IMPORT i286a_memoryread_w + IMPORT i286a_memorywrite + IMPORT i286a_memorywrite_w IMPORT iocore_inp8 IMPORT iocore_inp16 IMPORT iocore_out8 IMPORT iocore_out16 + IMPORT dmap_i286 IMPORT biosfunc - IMPORT pic - IMPORT extirq_pop - IMPORT i286a_cts IMPORT i286aop80 @@ -46,6 +46,26 @@ IMPORT i286aopfe IMPORT i286aopff + IMPORT i286a_rep_insb + IMPORT i286a_rep_insw + IMPORT i286a_rep_outsb + IMPORT i286a_rep_outsw + IMPORT i286a_rep_movsb + IMPORT i286a_rep_movsw + IMPORT i286a_rep_lodsb + IMPORT i286a_rep_lodsw + IMPORT i286a_rep_stosb + IMPORT i286a_rep_stosw + IMPORT i286a_repe_cmpsb + IMPORT i286a_repe_cmpsw + IMPORT i286a_repne_cmpsb + IMPORT i286a_repne_cmpsw + IMPORT i286a_repe_scasb + IMPORT i286a_repe_scasw + IMPORT i286a_repne_scasb + IMPORT i286a_repne_scasw + + EXPORT i286a EXPORT i286a_step EXPORT optbl1 @@ -412,35 +432,35 @@ pusha ldrh r4, [r9, #CPU_SP] sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_AX] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_CX] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_DX] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_BX] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w mov r1, r6 sub r4, r4, #(2 << 16) add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_BP] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_SI] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w sub r4, r4, #(2 << 16) ldrh r1, [r9, #CPU_DI] add r0, r5, r4 lsr #16 - bl i286_memorywrite_w + bl i286a_memorywrite_w mov r0, r4 lsr #16 strh r0, [r9, #CPU_SP] mov pc, r11 @@ -450,31 +470,31 @@ popa ldrh r4, [r9, #CPU_SP] CPUWORK #19 add r0, r5, r4 mov r4, r4 lsl #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_DI] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_SI] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(4 << 16) strh r0, [r9, #CPU_BP] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_BX] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_DX] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_CX] add r0, r5, r4 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r4, #(2 << 16) strh r0, [r9, #CPU_AX] mov r0, r4 lsr #16 @@ -490,12 +510,12 @@ bound GETPC8 bl i286a_a add r4, r0, #2 add r0, r0, r6 - bl i286_memoryread_w + bl i286a_memoryread_w cmp r5, r0 bcc bndout bic r4, r4, #(1 << 16) add r0, r4, r6 - bl i286_memoryread_w + bl i286a_memoryread_w cmp r5, r0 movls pc, r11 bndout mov r6, #5 @@ -514,7 +534,7 @@ push_d16 CPUWORK #3 strh r2, [r9, #CPU_SP] add r0, r2, r3 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w imul_r_ea_d16 REG16EA r5, #21, #24 mov r4, r0, lsl #16 @@ -543,7 +563,7 @@ push_d8 CPUWORK #3 strh r2, [r9, #CPU_SP] add r0, r2, r3 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w imul_r_ea_d8 REG16EA r5, #21, #24 mov r4, r0, lsl #16 @@ -575,7 +595,7 @@ insb CPUWORK #5 subne r2, r2, #1 mov lr, r11 strh r2, [r9, #CPU_DI] - b i286_memorywrite + b i286a_memorywrite insw CPUWORK #5 ldrh r0, [r9, #CPU_DX] @@ -591,7 +611,7 @@ insw CPUWORK #5 subne r2, r2, #2 mov lr, r11 strh r2, [r9, #CPU_DI] - b i286_memorywrite_w + b i286a_memorywrite_w outsb CPUWORK #3 ldrh r1, [r9, #CPU_SI] @@ -601,7 +621,7 @@ outsb CPUWORK #3 addeq r1, r1, #1 subne r1, r1, #1 strh r1, [r9, #CPU_SI] - bl i286_memoryread + bl i286a_memoryread mov r1, r0 ldr r0, [r9, #CPU_DX] CPUSV @@ -617,7 +637,7 @@ outsw CPUWORK #3 addeq r1, r1, #2 subne r1, r1, #2 strh r1, [r9, #CPU_SI] - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 ldr r0, [r9, #CPU_DX] CPUSV @@ -662,12 +682,12 @@ xchgear8_1 CPUWORK #5 strb r4, [r6, #CPU_REG] mov pc, r11 xchgear8_2 mov r5, r0 - bl i286_memoryread + bl i286a_memoryread ldrb r1, [r6, #CPU_REG] strb r0, [r6, #CPU_REG] mov r0, r5 mov lr, r11 - b i286_memorywrite + b i286a_memorywrite xchg_ea_r16 EAREG16 r6 cmp r0, #&c0 @@ -691,12 +711,12 @@ xchgear16_1 CPUWORK #5 strh r4, [r6, #CPU_REG] mov pc, r11 xchgear16_2 mov r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w ldrh r1, [r6, #CPU_REG] strh r0, [r6, #CPU_REG] mov r0, r5 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w mov_ea_r8 EAREG8 r6 cmp r0, #&c0 @@ -710,7 +730,7 @@ movear8_1 CPUWORK #5 bl i286a_ea ldrb r1, [r6, #CPU_REG] mov lr, r11 - b i286_memorywrite + b i286a_memorywrite mov_ea_r16 EAREG16 r6 cmp r0, #&c0 @@ -724,7 +744,7 @@ movear16_1 CPUWORK #5 bl i286a_ea ldrh r1, [r6, #CPU_REG] mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w mov_r8_ea REG8EA r5, #2, #5 strb r0, [r5, #CPU_REG] @@ -748,7 +768,7 @@ measegm CPUWORK #3 bl i286a_ea mov r1, r5 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w lea_r16_ea CPUWORK #3 GETPC8 @@ -775,7 +795,7 @@ mov_seg_ea GETPC8 mov pc, r6 msegeam CPUWORK #5 bl i286a_ea - bl i286_memoryread_w + bl i286a_memoryread_w mov pc, r6 msegea_tbl dcd msegea_es dcd msegea_cs @@ -807,7 +827,7 @@ pop_ea POP #5 bl i286a_ea mov r1, r5 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w popreg R16SRC r0, r1 strh r4, [r1, #CPU_REG] mov pc, r11 @@ -861,21 +881,21 @@ call_far CPUWORK #13 mov r4, r4 lsl #16 sub r4, r4, #(2 << 16) add r0, r5, r4 lsr #16 - bl i286_memorywrite_w ; cs + bl i286a_memorywrite_w ; cs sub r4, r4, #(2 << 16) add r12, r8, #(4 << 16) mov r4, r4, lsr #16 mov r1, r12 lsr #16 add r0, r4, r5 - bl i286_memorywrite_w ; ip + bl i286a_memorywrite_w ; ip ldr r5, [r9, #CPU_CS_BASE] strh r4, [r9, #CPU_SP] add r0, r5, r8 lsr #16 - bl i286_memoryread_w ; newip + bl i286a_memoryread_w ; newip add r8, r8, #(2 << 16) mov r4, r0 lsl #16 add r0, r5, r8 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 lsl #4 strh r0, [r9, #CPU_CS] str r1, [r9, #CPU_CS_BASE] @@ -895,7 +915,7 @@ pushf CPUWORK #3 strh r3, [r9, #CPU_SP] add r0, r3, r2 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w popf POP #5 mov r2, #3 @@ -907,10 +927,7 @@ popf POP #5 strb r2, [r9, #CPU_TRAP] bne popf_withirq ldr r0, popf_pic - tst r8, #I_FLAG - moveq pc, r11 - PICEXISTINTR - moveq pc, r11 + NOINTREXIT popf_withirq I286IRQCHECKTERM popf_pic dcd pic @@ -929,7 +946,7 @@ mov_al_m8 CPUWORK #5 ldr r5, [r9, #CPU_DS_FIX] GETPC16 add r0, r5, r0 - bl i286_memoryread + bl i286a_memoryread strb r0, [r9, #CPU_AL] mov pc, r11 @@ -937,7 +954,7 @@ mov_ax_m16 CPUWORK #5 ldr r5, [r9, #CPU_DS_FIX] GETPC16 add r0, r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w strh r0, [r9, #CPU_AX] mov pc, r11 @@ -947,7 +964,7 @@ mov_m8_al CPUWORK #5 ldrb r1, [r9, #CPU_AL] add r0, r5, r0 mov lr, r11 - b i286_memorywrite + b i286a_memorywrite mov_m16_ax CPUWORK #5 ldr r5, [r9, #CPU_DS_FIX] @@ -955,7 +972,7 @@ mov_m16_ax CPUWORK #5 ldrh r1, [r9, #CPU_AX] add r0, r5, r0 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w movsb CPUWORK #5 ldrh r5, [r9, #CPU_SI] @@ -964,7 +981,7 @@ movsb CPUWORK #5 moveq r4, #1 movne r4, #-1 add r0, r5, r0 - bl i286_memoryread + bl i286a_memoryread ldrh r3, [r9, #CPU_DI] ldr r2, [r9, #CPU_ES_BASE] add r5, r5, r4 @@ -974,7 +991,7 @@ movsb CPUWORK #5 strh r5, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] mov lr, r11 - b i286_memorywrite + b i286a_memorywrite movsw CPUWORK #5 ldrh r5, [r9, #CPU_SI] @@ -983,7 +1000,7 @@ movsw CPUWORK #5 moveq r4, #2 movne r4, #-2 add r0, r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w ldrh r3, [r9, #CPU_DI] ldr r2, [r9, #CPU_ES_BASE] add r5, r5, r4 @@ -993,7 +1010,7 @@ movsw CPUWORK #5 strh r5, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w cmpsb CPUWORK #8 ldrh r5, [r9, #CPU_SI] @@ -1001,7 +1018,7 @@ cmpsb CPUWORK #8 ; ; add r0, r5, r0 - bl i286_memoryread + bl i286a_memoryread ldr r2, [r9, #CPU_ES_BASE] ldrh r3, [r9, #CPU_DI] mov r6, r0 @@ -1013,7 +1030,7 @@ cmpsb CPUWORK #8 add r3, r2, r3 strh r5, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] - bl i286_memoryread + bl i286a_memoryread SUB8 r6, r0 mov pc, r11 @@ -1023,7 +1040,7 @@ cmpsw CPUWORK #8 ; ; add r0, r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w ldr r2, [r9, #CPU_ES_BASE] ldrh r3, [r9, #CPU_DI] mov r6, r0 @@ -1035,7 +1052,7 @@ cmpsw CPUWORK #8 add r3, r2, r3 strh r5, [r9, #CPU_SI] strh r3, [r9, #CPU_DI] - bl i286_memoryread_w + bl i286a_memoryread_w SUB16 r6, r0 mov pc, r11 @@ -1049,7 +1066,7 @@ stosb CPUWORK #3 add r0, r2, r0 strh r3, [r9, #CPU_DI] mov lr, r11 - b i286_memorywrite + b i286a_memorywrite stosw CPUWORK #3 ldrh r1, [r9, #CPU_AX] @@ -1061,7 +1078,7 @@ stosw CPUWORK #3 add r0, r2, r0 strh r3, [r9, #CPU_DI] mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w lodsb CPUWORK #5 ldrh r5, [r9, #CPU_SI] @@ -1070,7 +1087,7 @@ lodsb CPUWORK #5 addeq r6, r5, #1 subne r6, r5, #1 add r0, r5, r0 - bl i286_memoryread + bl i286a_memoryread strb r0, [r9, #CPU_AL] strh r6, [r9, #CPU_SI] mov pc, r11 @@ -1082,7 +1099,7 @@ lodsw CPUWORK #5 addeq r6, r5, #2 subne r6, r5, #2 add r0, r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w strh r0, [r9, #CPU_AX] strh r6, [r9, #CPU_SI] mov pc, r11 @@ -1094,7 +1111,7 @@ scasb CPUWORK #7 addeq r6, r5, #1 subne r6, r5, #1 add r0, r5, r0 - bl i286_memoryread + bl i286a_memoryread ldrb r5, [r9, #CPU_AL] strh r6, [r9, #CPU_DI] SUB8 r5, r0 @@ -1107,7 +1124,7 @@ scasw CPUWORK #7 addeq r6, r5, #2 subne r6, r5, #2 add r0, r5, r0 - bl i286_memoryread_w + bl i286a_memoryread_w ldrh r5, [r9, #CPU_AX] strh r6, [r9, #CPU_DI] SUB16 r5, r0 @@ -1122,7 +1139,7 @@ ret_near_d16 GETPC16 add r0, r1, r2 add r3, r3, #2 strh r3, [r9, #CPU_SP] - bl i286_memoryread_w + bl i286a_memoryread_w mov r8, r8 lsl #16 mov r8, r8 lsr #16 orr r8, r8, r0 lsl #16 @@ -1136,7 +1153,7 @@ ret_near CPUWORK #11 add r0, r1, r0 strh r2, [r9, #CPU_SP] mov r8, r8 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w orr r8, r8, r0 lsl #16 mov pc, r11 @@ -1149,10 +1166,10 @@ les_r16_ea GETPC8 add r4, r0, #2 add r0, r0, r6 bic r4, r4, #(1 << 16) - bl i286_memoryread_w + bl i286a_memoryread_w strh r0, [r5, #CPU_REG] add r0, r4, r6 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 lsl #4 strh r0, [r9, #CPU_ES] str r1, [r9, #CPU_ES_BASE] @@ -1170,10 +1187,10 @@ lds_r16_ea GETPC8 add r4, r0, #2 add r0, r0, r6 bic r4, r4, #(1 << 16) - bl i286_memoryread_w + bl i286a_memoryread_w strh r0, [r5, #CPU_REG] add r0, r4, r6 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 lsl #4 strh r0, [r9, #CPU_DS] str r1, [r9, #CPU_DS_BASE] @@ -1190,7 +1207,7 @@ mov_ea8_d8 GETPC8 mov r1, r0 mov r0, r4 mov lr, r11 - b i286_memorywrite + b i286a_memorywrite med8_r CPUWORK #2 R8DST r0, r4 GETPC8 @@ -1207,7 +1224,7 @@ mov_ea16_d16 GETPC8 mov r1, r0 mov r0, r4 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w med16_r CPUWORK #2 R16DST r0, r4 GETPC16 @@ -1221,7 +1238,7 @@ enter ldrh r4, [r9, #CPU_SP] addcc r4, r4, #&10000 mov r1, r5 add r0, r4, r0 - bl i286_memorywrite_w + bl i286a_memorywrite_w GETPC16 mov r6, r0 GETPC8 @@ -1244,7 +1261,7 @@ enterlv1 cmp r0, #1 sub r2, r4, r6 mov lr, r11 strh r2, [r9, #CPU_SP] - bl i286_memorywrite_w + bl i286a_memorywrite_w enterlv2 mov r1, r0, lsl #2 add r1, r1, #12 CPUWORK r1 @@ -1261,14 +1278,14 @@ enterlv2 mov r1, r0, lsl #2 mov r1, r5 mov r5, r5 lsl #16 add r0, r11, r2 - bl i286_memorywrite_w + bl i286a_memorywrite_w entlv2lp sub r5, r5, #(2 << 16) sub r4, r4, #(2 << 16) add r0, r11, r5 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 add r0, r11, r4 - bl i286_memorywrite_w + bl i286a_memorywrite_w subs r6, r6, #1 bne entlv2lp ldr pc, [sp], #4 @@ -1278,7 +1295,7 @@ leave ldrh r1, [r9, #CPU_BP] CPUWORK #5 add r4, r1, #2 add r0, r1, r0 - bl i286_memoryread_w + bl i286a_memoryread_w strh r4, [r9, #CPU_SP] strh r0, [r9, #CPU_BP] mov pc, r11 @@ -1292,14 +1309,14 @@ ret_far_d16 CPUWORK #15 ; add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w mov r8, r8 lsl #16 mov r8, r8 lsr #16 orr r8, r8, r0 lsl #16 bic r4, r4, #(1 << 16) add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w add r4, r6, r4 mov r1, r0 lsl #4 strh r4, [r9, #CPU_SP] @@ -1313,14 +1330,14 @@ ret_far CPUWORK #15 ; add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w mov r8, r8 lsl #16 mov r8, r8 lsr #16 orr r8, r8, r0 lsl #16 bic r4, r4, #(1 << 16) add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 lsl #4 strh r4, [r9, #CPU_SP] strh r0, [r9, #CPU_CS] @@ -1349,19 +1366,19 @@ iret bl extirq_pop ; add r4, r1, #2 add r0, r1, r5 - bl i286_memoryread_w + bl i286a_memoryread_w bic r4, r4, #(1 << 16) mov r8, r0 lsl #16 add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w mov r1, r0 lsl #4 strh r0, [r9, #CPU_CS] str r1, [r9, #CPU_CS_BASE] bic r4, r4, #(1 << 16) add r0, r4, r5 add r4, r4, #2 - bl i286_memoryread_w + bl i286a_memoryread_w strh r4, [r9, #CPU_SP] mov r2, #3 bic r1, r0, #&f000 ; i286 @@ -1371,17 +1388,14 @@ iret bl extirq_pop strb r2, [r9, #CPU_TRAP] bne iret_withirq ldr r0, iret_pic - tst r8, #I_FLAG - moveq pc, r11 - PICEXISTINTR - moveq pc, r11 + NOINTREXIT iret_withirq I286IRQCHECKTERM iret_pic dcd pic aam CPUWORK #16 GETPC8 - movs r0, r0, lsl #7 + movs r0, r0 lsl #7 beq aamzero ldrb r1, [r9, #CPU_AL] mov r2, #&80 @@ -1389,6 +1403,7 @@ aam CPUWORK #16 aamlp cmp r1, r0 subcs r1, r1, r0 orrcs r3, r2, r3 + mov r0, r0 lsr #1 movs r2, r2 lsr #1 bne aamlp ldrb r2, [r10, r1] @@ -1434,7 +1449,7 @@ xlat ldrb r0, [r9, #CPU_AL] add r0, r1, r0 bic r0, r0, #(1 << 16) add r0, r2, r0 - bl i286_memoryread + bl i286a_memoryread strb r0, [r9, #CPU_AL] mov pc, r11 @@ -1541,13 +1556,13 @@ call_near CPUWORK #7 add r8, r8, r0 lsl #16 add r0, r3, r2 lsr #16 mov lr, r11 - b i286_memorywrite_w + b i286a_memorywrite_w jmp_near ldr r4, [r9, #CPU_CS_BASE] add r5, r8, #(2 << 16) CPUWORK #7 add r0, r4, r8 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r8, r5, r0 lsl #16 mov pc, r11 @@ -1556,10 +1571,10 @@ jmp_far CPUWORK #11 add r5, r8, #(2 << 16) mov r6, r8 lsl #16 add r0, r4, r8 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w mov r8, r0 lsl #16 add r0, r4, r5 lsr #16 - bl i286_memoryread_w + bl i286a_memoryread_w add r8, r8, r6 lsr #16 mov r1, r0 lsl #4 strh r0, [r9, #CPU_CS] @@ -1633,7 +1648,7 @@ sti_set orr r8, r8, #I_FLAG ldr r0, sti_pic strneb r1, [r9, #CPU_TRAP] bne sti_withirq - PICEXISTINTR + PICEXISTINTR sti_noirq bne sti_withirq sti_noirq NEXT_OPCODE sti_pic dcd pic @@ -1648,48 +1663,6 @@ std CPUWORK #2 mov pc, r11 - MACRO -$label SEGPREFIX $b -$label ldr r1, [r9, $b] - ldrb r6, [r9, #CPU_PREFIX] - add r0, r5, r8 lsr #16 - str r1, [r9, #CPU_SS_FIX] - str r1, [r9, #CPU_DS_FIX] - adr r2, removeprefix - cmp r2, r11 - strne r11, [sp, #-4]! - movne r11, r2 - add r6, r6, #1 - cmp r6, #MAX_PREFIX - bcs prefix_segfault - bl i286_memoryread - ldr r1, [r4, r0 lsl #2] - add r8, r8, #(1 << 16) - strb r6, [r9, #CPU_PREFIX] - mov pc, r1 - MEND - -segprefix_es SEGPREFIX #CPU_ES_BASE -segprefix_cs SEGPREFIX #CPU_CS_BASE -segprefix_ss SEGPREFIX #CPU_SS_BASE -segprefix_ds SEGPREFIX #CPU_DS_BASE - -prefix_fault adr r1, removeprefix - cmp r1, r11 - strne r11, [sp, #-4]! -prefix_segfault sub r8, r8, #(MAX_PREFIX << 16) - mov r6, #6 - mov r11, pc - b i286a_localint -removeprefix ldr r0, [r9, #CPU_SS_BASE] - ldr r1, [r9, #CPU_DS_BASE] - mov r2, #0 - str r0, [r9, #CPU_SS_FIX] - str r1, [r9, #CPU_DS_FIX] - strb r2, [r9, #CPU_PREFIX] - ldr pc, [sp], #4 - - ; ---- cpu execute i286a_step stmdb sp!, {r4 - r11, lr} @@ -1697,22 +1670,81 @@ i286a_step stmdb sp!, {r4 - r11, lr} ldr r10, ias_r10 ; ldr r5, [r9, #CPU_CS_BASE] - ; ldr r7, [r9, #CPU_REMAINCLOCK] - ldr r8, [r9, #CPU_FLAG] + CPULD adr r4, optbl1 add r0, r5, r8 lsr #16 - bl i286_memoryread + bl i286a_memoryread + ldr r1, [r4, r0 lsl #2] + add r8, r8, #(1 << 16) + mov r11, pc + mov pc, r1 + + bl dmap_i286 + CPUSV + ldmia sp!, {r4 - r11, pc} + + +i286a stmdb sp!, {r4 - r11, lr} + ldr r9, ias_r9 + ldr r2, ias_r1 + ldr r10, ias_r10 + CPULD + ldr r5, [r9, #CPU_CS_BASE] + ldr r1, [r2, #DMAC_WORKING] + and r0, r8, #(I_FLAG + T_FLAG) + cmp r0, #(I_FLAG + T_FLAG) + beq i286awithtrap + cmp r1, #0 + bne i286awithdma + adr r4, optbl1 +i286a_lp add r0, r5, r8 lsr #16 + bl i286a_memoryread ldr r1, [r4, r0 lsl #2] add r8, r8, #(1 << 16) mov r11, pc mov pc, r1 + ldr r7, [r9, #CPU_REMAINCLOCK] + ldr r5, [r9, #CPU_CS_BASE] + adr r4, optbl1 + cmp r7, #0 + bgt i286a_lp + CPUSV + ldmia sp!, {r4 - r11, pc} - str r8, [r9, #CPU_FLAG] +ias_r9 dcd i286core + CPU_SIZE +ias_r1 dcd dmac +ias_r10 dcd iflags + +i286awithdma adr r4, optbl1 +i286awdma_lp add r0, r5, r8 lsr #16 + bl i286a_memoryread + ldr r1, [r4, r0 lsl #2] + add r8, r8, #(1 << 16) + mov r11, pc + mov pc, r1 + bl dmap_i286 + ldr r7, [r9, #CPU_REMAINCLOCK] + ldr r5, [r9, #CPU_CS_BASE] + adr r4, optbl1 + cmp r7, #0 + bgt i286awdma_lp + CPUSV ldmia sp!, {r4 - r11, pc} -ias_r9 dcd i286core - CPU_REG -ias_r10 dcd _szpcflag8 +i286awithtrap adr r4, optbl1 +i286awtrp_lp add r0, r5, r8 lsr #16 + bl i286a_memoryread + ldr r1, [r4, r0 lsl #2] + add r8, r8, #(1 << 16) + mov r11, pc + mov pc, r1 + bl dmap_i286 + and r0, r8, #(I_FLAG + T_FLAG) + cmp r0, #(I_FLAG + T_FLAG) + beq i286a_trapint +i286a_trapintr CPUSV + ldmia sp!, {r4 - r11, pc} optbl1 dcd add_ea_r8 ; 00 dcd add_ea_r16 @@ -1754,7 +1786,7 @@ optbl1 dcd add_ea_r8 ; 00 dcd and_r16_ea dcd and_al_d8 dcd and_ax_d16 - dcd 0 ; segprefix_es + dcd segprefix_es dcd daa dcd sub_ea_r8 dcd sub_ea_r16 @@ -1762,7 +1794,7 @@ optbl1 dcd add_ea_r8 ; 00 dcd sub_r16_ea dcd sub_al_d8 dcd sub_ax_d16 - dcd 0 ; segprefix_cs + dcd segprefix_cs dcd das dcd xor_ea_r8 ; 30 @@ -1771,7 +1803,7 @@ optbl1 dcd add_ea_r8 ; 00 dcd xor_r16_ea dcd xor_al_d8 dcd xor_ax_d16 - dcd 0 ; segprefix_ss + dcd segprefix_ss dcd aaa dcd cmp_ea_r8 dcd cmp_ea_r16 @@ -1779,7 +1811,7 @@ optbl1 dcd add_ea_r8 ; 00 dcd cmp_r16_ea dcd cmp_al_d8 dcd cmp_ax_d16 - dcd 0 ; segprefix_ds + dcd segprefix_ds dcd aas dcd inc_ax ; 40 @@ -1922,8 +1954,8 @@ optbl1 dcd add_ea_r8 ; 00 dcd i286asft16_d8 dcd ret_near_d16 dcd ret_near - dcd 0 ; les_r16_ea (now testing i286a_a) - dcd 0 ; lds_r16_ea (now testing i286a_a) + dcd les_r16_ea ; (now testing i286a_a) + dcd lds_r16_ea ; (now testing i286a_a) dcd mov_ea8_d8 dcd mov_ea16_d16 dcd enter @@ -1971,8 +2003,8 @@ optbl1 dcd add_ea_r8 ; 00 dcd lock ; f0 dcd lock - dcd 0 ; repne - dcd 0 ; repe + dcd repne + dcd repe dcd hlt dcd cmc dcd i286aopf6 @@ -1987,15 +2019,58 @@ optbl1 dcd add_ea_r8 ; 00 dcd i286aopff + MACRO +$label SEGPREFIX $b +$label ldr r1, [r9, $b] + ldrb r6, [r9, #CPU_PREFIX] + ;; ldr r5, [r9, #CPU_CS_BASE] + add r0, r5, r8 lsr #16 + str r1, [r9, #CPU_SS_FIX] + str r1, [r9, #CPU_DS_FIX] + cmp r6, #0 + streq r11, [sp, #-4]! + adreq r11, prefix1_remove + add r6, r6, #1 + cmp r6, #MAX_PREFIX + bcs prefix_fault + bl i286a_memoryread + ldr r1, [r4, r0 lsl #2] + add r8, r8, #(1 << 16) + strb r6, [r9, #CPU_PREFIX] + mov pc, r1 + MEND + +segprefix_es SEGPREFIX #CPU_ES_BASE +segprefix_cs SEGPREFIX #CPU_CS_BASE +segprefix_ss SEGPREFIX #CPU_SS_BASE +segprefix_ds SEGPREFIX #CPU_DS_BASE + +prefix_fault sub r8, r8, #((MAX_PREFIX - 1) << 16) + mov r6, #6 + mov r11, pc + b i286a_localint +prefix1_remove ldr r0, [r9, #CPU_SS_BASE] + ldr r1, [r9, #CPU_DS_BASE] + mov r2, #0 + str r0, [r9, #CPU_SS_FIX] + str r1, [r9, #CPU_DS_FIX] + strb r2, [r9, #CPU_PREFIX] + ldr pc, [sp], #4 + + ; ---- repne repne ldrb r6, [r9, #CPU_PREFIX] adr r4, optblne + ;; ldr r5, [r9, #CPU_CS_BASE] add r0, r5, r8 lsr #16 + cmp r6, #0 + streq r11, [sp, #-4]! + adreq r11, prefix1_remove add r6, r6, #1 cmp r6, #MAX_PREFIX bcs prefix_fault - bl i286_memoryread + bl i286a_memoryread ldr r1, [r4, r0 lsl #2] add r8, r8, #(1 << 16) strb r6, [r9, #CPU_PREFIX] @@ -2115,10 +2190,10 @@ optblne dcd add_ea_r8 ; 00 dcd imul_r_ea_d16 dcd push_d8 dcd imul_r_ea_d8 - dcd 0 ; i286a_rep_insb - dcd 0 ; i286a_rep_insw - dcd 0 ; i286a_rep_outsb - dcd 0 ; i286a_rep_outsw + dcd i286a_rep_insb + dcd i286a_rep_insw + dcd i286a_rep_outsb + dcd i286a_rep_outsw dcd jo_short ; 70 dcd jno_short @@ -2175,18 +2250,18 @@ optblne dcd add_ea_r8 ; 00 dcd mov_ax_m16 dcd mov_m8_al dcd mov_m16_ax - dcd 0 ; i286a_rep_movsb - dcd 0 ; i286a_rep_movsw - dcd 0 ; i286a_repne_cmpsb - dcd 0 ; i286a_repne_cmpsw + dcd i286a_rep_movsb + dcd i286a_rep_movsw + dcd i286a_repne_cmpsb + dcd i286a_repne_cmpsw dcd test_al_d8 dcd test_ax_d16 - dcd 0 ; i286a_rep_stosb - dcd 0 ; i286a_rep_stosw - dcd 0 ; i286a_rep_lodsb - dcd 0 ; i286a_rep_lodsw - dcd 0 ; i286a_repne_scasb - dcd 0 ; i286a_repne_scasw + dcd i286a_rep_stosb + dcd i286a_rep_stosw + dcd i286a_rep_lodsb + dcd i286a_rep_lodsw + dcd i286a_repne_scasb + dcd i286a_repne_scasw dcd mov_al_imm ; b0 dcd mov_cl_imm @@ -2277,16 +2352,28 @@ optblne dcd add_ea_r8 ; 00 repe ldrb r6, [r9, #CPU_PREFIX] adr r4, optble + ;; ldr r5, [r9, #CPU_CS_BASE] add r0, r5, r8 lsr #16 + cmp r6, #0 + streq r11, [sp, #-4]! + adreq r11, prefix2_remove add r6, r6, #1 cmp r6, #MAX_PREFIX bcs prefix_fault - bl i286_memoryread + bl i286a_memoryread ldr r1, [r4, r0 lsl #2] add r8, r8, #(1 << 16) strb r6, [r9, #CPU_PREFIX] mov pc, r1 +prefix2_remove ldr r0, [r9, #CPU_SS_BASE] + ldr r1, [r9, #CPU_DS_BASE] + mov r2, #0 + str r0, [r9, #CPU_SS_FIX] + str r1, [r9, #CPU_DS_FIX] + strb r2, [r9, #CPU_PREFIX] + ldr pc, [sp], #4 + optble dcd add_ea_r8 ; 00 dcd add_ea_r16 dcd add_r8_ea @@ -2401,10 +2488,10 @@ optble dcd add_ea_r8 ; 00 dcd imul_r_ea_d16 dcd push_d8 dcd imul_r_ea_d8 - dcd 0 ; i286a_rep_insb - dcd 0 ; i286a_rep_insw - dcd 0 ; i286a_rep_outsb - dcd 0 ; i286a_rep_outsw + dcd i286a_rep_insb + dcd i286a_rep_insw + dcd i286a_rep_outsb + dcd i286a_rep_outsw dcd jo_short ; 70 dcd jno_short @@ -2461,18 +2548,18 @@ optble dcd add_ea_r8 ; 00 dcd mov_ax_m16 dcd mov_m8_al dcd mov_m16_ax - dcd 0 ; i286a_rep_movsb - dcd 0 ; i286a_rep_movsw - dcd 0 ; i286a_repe_cmpsb - dcd 0 ; i286a_repe_cmpsw + dcd i286a_rep_movsb + dcd i286a_rep_movsw + dcd i286a_repe_cmpsb + dcd i286a_repe_cmpsw dcd test_al_d8 dcd test_ax_d16 - dcd 0 ; i286a_rep_stosb - dcd 0 ; i286a_rep_stosw - dcd 0 ; i286a_rep_lodsb - dcd 0 ; i286a_rep_lodsw - dcd 0 ; i286a_repe_scasb - dcd 0 ; i286a_repe_scasw + dcd i286a_rep_stosb + dcd i286a_rep_stosw + dcd i286a_rep_lodsb + dcd i286a_rep_lodsw + dcd i286a_repe_scasb + dcd i286a_repe_scasw dcd mov_al_imm ; b0 dcd mov_cl_imm