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| version 1.1, 2003/12/15 20:58:12 | version 1.4, 2003/12/17 14:04:43 |
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| Line 306 $label sub r1, $s, #1 | Line 306 $label sub r1, $s, #1 |
| orr r8, r8, r2 | orr r8, r8, r2 |
| MEND | MEND |
| MACRO | |
| $label NOT8 $s | |
| $label mvn r1, $s | |
| MEND | |
| MACRO | |
| $label NOT16 $s | |
| $label mvn r1, $s | |
| MEND | |
| MACRO | |
| $label NEG8 $s | |
| $label rsb r1, $s, #0 | |
| bic r8, r8, #O_FLAG | |
| and r12, r1, $s | |
| eor r2, r1, $s | |
| bic r8, r8, #&ff | |
| and r12, r12, #&80 | |
| and r2, r2, #A_FLAG | |
| orr r8, r8, r12 lsl #4 | |
| mov r12, r1 lsl #(32 - 9) | |
| orr r8, r8, r2 | |
| ldrb r2, [r10, r12 lsr #(32 - 9)] | |
| orr r8, r2, r8 | |
| MEND | |
| MACRO | |
| $label NEG16 $s | |
| $label bic r8, r8, #&ff | |
| rsbs r1, $s, #0 | |
| addmi r8, r8, #C_FLAG | |
| and r12, r1, $s | |
| bic r8, r8, #O_FLAG | |
| eor r2, r1, $s | |
| and r12, r12, #&8000 | |
| and r2, r2, #A_FLAG | |
| orr r8, r8, r12 lsr #4 | |
| and r12, r1, #&ff | |
| orr r8, r8, r2 | |
| ldrb r2, [r10, r12] | |
| and r2, r2, #P_FLAG | |
| orr r8, r2, r8 | |
| movs r12, r1, lsl #16 | |
| orreq r8, r8, #Z_FLAG | |
| orrmi r8, r8, #S_FLAG | |
| MEND | |
| MACRO | |
| $label MUL8 $d, $s | |
| mul r1, $d, $s | |
| movs r12, r1 lsr #8 | |
| biceq r8, r8, #O_FLAG | |
| biceq r8, r8, #C_FLAG | |
| orrne r8, r8, #O_FLAG | |
| orrne r8, r8, #C_FLAG | |
| MEND | |
| MACRO | |
| $label MUL16 $d, $s | |
| mul r1, $d, $s | |
| movs r12, r1 lsr #16 | |
| biceq r8, r8, #O_FLAG | |
| biceq r8, r8, #C_FLAG | |
| orrne r8, r8, #O_FLAG | |
| orrne r8, r8, #C_FLAG | |
| MEND | |
| MACRO | |
| $label IMUL8 $d, $s | |
| mov r1, $d lsl #24 | |
| mov r12, $s lsl #24 | |
| mov r1, r1 asr #24 | |
| mov r12, r12 asr #24 | |
| mul r1, r12, r1 | |
| add r12, r1, #&80 | |
| movs r12, r12 lsr #8 | |
| biceq r8, r8, #O_FLAG | |
| biceq r8, r8, #C_FLAG | |
| orrne r8, r8, #O_FLAG | |
| orrne r8, r8, #C_FLAG | |
| MEND | |
| MACRO | |
| $label IMUL16 $d, $s | |
| mov r1, $d lsl #16 | |
| mov r12, $s lsl #16 | |
| mov r1, r1 asr #16 | |
| mov r12, r12 asr #16 | |
| mul r1, r12, r1 | |
| add r12, r1, #&8000 | |
| movs r12, r12 lsr #16 | |
| biceq r8, r8, #O_FLAG | |
| biceq r8, r8, #C_FLAG | |
| orrne r8, r8, #O_FLAG | |
| orrne r8, r8, #C_FLAG | |
| MEND | |
| MACRO | |
| $label REGPUSH $r, $clk | |
| $label CPUWORK $clk | |
| ldrh r0, [r9, #CPU_SP] | |
| ldrh r1, [r9, $r] | |
| ldr r2, [r9, #CPU_SS_BASE] | |
| sub r0, r0, #2 | |
| mov r3, r0 lsl #16 | |
| strh r0, [r9, #CPU_SP] | |
| add r0, r2, r3 lsr #16 | |
| mov lr, r11 | |
| b i286_memorywrite_w | |
| MEND | |
| MACRO | |
| $label POP $clk | |
| $label CPUWORK $clk | |
| ldrh r1, [r9, #CPU_SP] | |
| ldr r0, [r9, #CPU_SS_BASE] | |
| add r0, r1, r0 | |
| add r1, r1, #2 | |
| strh r1, [r9, #CPU_SP] | |
| bl i286_memoryread_w | |
| MEND | |
| MACRO | |
| $label REGPOP $r, $clk | |
| $label POP $clk | |
| strh r0, [r9, $r] | |
| mov pc, r11 | |
| MEND | |
| END | END |