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| version 1.1, 2003/12/18 19:14:08 | version 1.2, 2003/12/19 00:25:49 |
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| Line 3 | Line 3 |
| $label GETPC8 | $label GETPC8 |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| add r8, r8, #(1 << 16) | add r8, r8, #(1 << 16) |
| MEND | MEND |
| Line 11 $label ldr r0, [r9, #CPU_CS_BASE] | Line 11 $label ldr r0, [r9, #CPU_CS_BASE] |
| $label GETPC16 | $label GETPC16 |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| add r8, r8, #(2 << 16) | add r8, r8, #(2 << 16) |
| MEND | MEND |
| Line 36 $label and $out, $op, #(6 << 2) | Line 36 $label and $out, $op, #(6 << 2) |
| $label EAREG8 $src | $label EAREG8 $src |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| add r8, r8, #(1 << 16) | add r8, r8, #(1 << 16) |
| and $src, r0, #(6 << 2) | and $src, r0, #(6 << 2) |
| add $src, r9, $src lsr #2 | add $src, r9, $src lsr #2 |
| Line 48 $label ldr r0, [r9, #CPU_CS_BASE] | Line 48 $label ldr r0, [r9, #CPU_CS_BASE] |
| $label REG8EA $dst, $regclk, $memclk | $label REG8EA $dst, $regclk, $memclk |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| add r8, r8, #(1 << 16) | add r8, r8, #(1 << 16) |
| R8DST r0, $dst | R8DST r0, $dst |
| cmp r0, #&c0 | cmp r0, #&c0 |
| Line 59 $label ldr r0, [r9, #CPU_CS_BASE] | Line 59 $label ldr r0, [r9, #CPU_CS_BASE] |
| b $label.2 | b $label.2 |
| $label.1 CPUWORK $memclk | $label.1 CPUWORK $memclk |
| bl i286a_ea | bl i286a_ea |
| bl i286_memoryread | bl i286a_memoryread |
| $label.2 | $label.2 |
| MEND | MEND |
| Line 80 $label and $out, $op, #(7 << 3) | Line 80 $label and $out, $op, #(7 << 3) |
| $label EAREG16 $src | $label EAREG16 $src |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| add r8, r8, #(1 << 16) | add r8, r8, #(1 << 16) |
| and $src, r0, #(7 << 3) | and $src, r0, #(7 << 3) |
| add $src, r9, $src lsr #2 | add $src, r9, $src lsr #2 |
| Line 90 $label ldr r0, [r9, #CPU_CS_BASE] | Line 90 $label ldr r0, [r9, #CPU_CS_BASE] |
| $label REG16EA $dst, $regclk, $memclk | $label REG16EA $dst, $regclk, $memclk |
| $label ldr r0, [r9, #CPU_CS_BASE] | $label ldr r0, [r9, #CPU_CS_BASE] |
| add r0, r0, r8 lsr #16 | add r0, r0, r8 lsr #16 |
| bl i286_memoryread | bl i286a_memoryread |
| add r8, r8, #(1 << 16) | add r8, r8, #(1 << 16) |
| R16DST r0, $dst | R16DST r0, $dst |
| cmp r0, #&c0 | cmp r0, #&c0 |
| Line 101 $label ldr r0, [r9, #CPU_CS_BASE] | Line 101 $label ldr r0, [r9, #CPU_CS_BASE] |
| b $label.2 | b $label.2 |
| $label.1 CPUWORK $memclk | $label.1 CPUWORK $memclk |
| bl i286a_ea | bl i286a_ea |
| bl i286_memoryread_w | bl i286a_memoryread_w |
| $label.2 | $label.2 |
| MEND | MEND |