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| version 1.1, 2003/12/15 20:58:12 | version 1.3, 2003/12/19 09:38:25 |
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| Line 16 | Line 16 |
| // ---- write byte | // ---- write byte |
| #if 0 // defined(ARM) | #if defined(ARM) |
| void MEMCALL i286_wt(UINT32 address, REG8 value); | void MEMCALL i286_wt(UINT32 address, REG8 value); |
| void MEMCALL i286_wtex(UINT32 address, REG8 value); | |
| #else | #else |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wt(UINT32 address, REG8 value) { |
| mem[address] = (BYTE)value; | |
| } | |
| static void MEMCALL i286_wtex(UINT32 address, REG8 value) { | |
| mem[address & CPU_ADRSMASK] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| #endif | #endif |
| #if 0 // defined(ARM) | #if defined(ARM) |
| void MEMCALL tram_wt(UINT32 address, REG8 value); | void MEMCALL tram_wt(UINT32 address, REG8 value); |
| #else | #else |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { |
| Line 214 static void MEMCALL i286_wn(UINT32 addre | Line 220 static void MEMCALL i286_wn(UINT32 addre |
| // ---- read byte | // ---- read byte |
| #if defined(ARM) | |
| REG8 MEMCALL i286_rd(UINT32 address); | |
| REG8 MEMCALL i286_rdex(UINT32 address); | |
| #else | |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { |
| return(mem[address]); | |
| } | |
| static REG8 MEMCALL i286_rdex(UINT32 address) { | |
| return(mem[address & CPU_ADRSMASK]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| #endif | |
| #if 0 // defined(ARM) | |
| REG8 MEMCALL tram_rd(UINT32 address); | |
| #else | |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= vramop.tramwait; |
| Line 235 static REG8 MEMCALL tram_rd(UINT32 addre | Line 254 static REG8 MEMCALL tram_rd(UINT32 addre |
| } | } |
| return(mem[address]); | return(mem[address]); |
| } | } |
| #endif | |
| #if 0 // defined(ARM) | |
| REG8 MEMCALL vram_r0(UINT32 address); | |
| REG8 MEMCALL vram_r1(UINT32 address); | |
| #else | |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| Line 247 static REG8 MEMCALL vram_r1(UINT32 addre | Line 271 static REG8 MEMCALL vram_r1(UINT32 addre |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| #endif | |
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) { |
| Line 315 static REG8 MEMCALL i286_itf(UINT32 addr | Line 340 static REG8 MEMCALL i286_itf(UINT32 addr |
| // ---- write word | // ---- write word |
| #if defined(ARM) | |
| void MEMCALL i286w_wt(UINT32 address, REG16 value); | |
| void MEMCALL i286w_wtex(UINT32 address, REG16 value); | |
| #else | |
| static void MEMCALL i286w_wt(UINT32 address, REG16 value) { | static void MEMCALL i286w_wt(UINT32 address, REG16 value) { |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + address; | |
| STOREINTELWORD(ptr, value); | |
| } | |
| static void MEMCALL i286w_wtex(UINT32 address, REG16 value) { | |
| BYTE *ptr; | |
| ptr = mem + (address & CPU_ADRSMASK); | ptr = mem + (address & CPU_ADRSMASK); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| #endif | |
| static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { |
| Line 506 static void MEMCALL i286w_wn(UINT32 addr | Line 544 static void MEMCALL i286w_wn(UINT32 addr |
| // ---- read word | // ---- read word |
| #if defined(ARM) | |
| REG16 MEMCALL i286w_rd(UINT32 address); | |
| REG16 MEMCALL i286w_rdex(UINT32 address); | |
| #else | |
| static REG16 MEMCALL i286w_rd(UINT32 address) { | static REG16 MEMCALL i286w_rd(UINT32 address) { |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + address; | |
| return(LOADINTELWORD(ptr)); | |
| } | |
| static REG16 MEMCALL i286w_rdex(UINT32 address) { | |
| BYTE *ptr; | |
| ptr = mem + (address & CPU_ADRSMASK); | ptr = mem + (address & CPU_ADRSMASK); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| #endif | |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| Line 543 static REG16 MEMCALL tramw_rd(UINT32 add | Line 594 static REG16 MEMCALL tramw_rd(UINT32 add |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| #if 0 // defined(ARM) | |
| REG16 MEMCALL vramw_r0(UINT32 address); | |
| REG16 MEMCALL vramw_r1(UINT32 address); | |
| #else | |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| Line 554 static REG16 MEMCALL vramw_r1(UINT32 add | Line 609 static REG16 MEMCALL vramw_r1(UINT32 add |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| #endif | |
| static REG16 MEMCALL grcgw_tcr0(UINT32 address) { | static REG16 MEMCALL grcgw_tcr0(UINT32 address) { |
| Line 673 MEMFN memfn = // -> memory.s | Line 729 MEMFN memfn = // -> memory.s |
| #else | #else |
| static MEMFN memfn = | static MEMFN memfn = |
| #endif | #endif |
| {{i286_rd, i286_rd, i286_rd, i286_rd, // 00 | {{i286_rdex, i286_rdex, i286_rd, i286_rd, // 00 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 20 | i286_rd, i286_rd, i286_rd, i286_rd, // 20 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 40 | i286_rd, i286_rd, i286_rd, i286_rd, // 40 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 60 | i286_rd, i286_rd, i286_rd, i286_rd, // 60 |
| Line 682 static MEMFN memfn = | Line 738 static MEMFN memfn = |
| emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 | emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 |
| vram_r0, i286_rd, i286_rd, i286_itf}, // f0 | vram_r0, i286_rd, i286_rd, i286_itf}, // f0 |
| {i286_wt, i286_wt, i286_wt, i286_wt, // 00 | {i286_wtex, i286_wtex, i286_wt, i286_wt, // 00 |
| i286_wt, i286_wt, i286_wt, i286_wt, // 20 | i286_wt, i286_wt, i286_wt, i286_wt, // 20 |
| i286_wt, i286_wt, i286_wt, i286_wt, // 40 | i286_wt, i286_wt, i286_wt, i286_wt, // 40 |
| i286_wt, i286_wt, i286_wt, i286_wt, // 60 | i286_wt, i286_wt, i286_wt, i286_wt, // 60 |
| Line 691 static MEMFN memfn = | Line 747 static MEMFN memfn = |
| emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 | emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 |
| vram_w0, i286_wn, i286_wn, i286_wn}, // e0 | vram_w0, i286_wn, i286_wn, i286_wn}, // e0 |
| {i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 | {i286w_rdex, i286w_rdex, i286w_rd, i286w_rd, // 00 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 |
| Line 700 static MEMFN memfn = | Line 756 static MEMFN memfn = |
| emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 | emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 |
| vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0 | vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0 |
| {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | {i286w_wtex, i286w_wtex, i286w_wt, i286w_wt, // 00 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 | i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 | i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 |