np2/i286a/memory.c - diff

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Diff for /np2/i286a/memory.c between versions 1.1 and 1.5

version 1.1, 2003/12/15 20:58:12	version 1.5, 2003/12/20 11:49:47
Line 16	Line 16

// ---- write byte	// ---- write byte

#if 0 // defined(ARM)	#if defined(ARM)
void MEMCALL i286_wt(UINT32 address, REG8 value);	void MEMCALL i286_wt(UINT32 address, REG8 value);
	void MEMCALL i286_wtex(UINT32 address, REG8 value);
#else	#else
static void MEMCALL i286_wt(UINT32 address, REG8 value) {	static void MEMCALL i286_wt(UINT32 address, REG8 value) {

	mem[address] = (BYTE)value;
	}

	static void MEMCALL i286_wtex(UINT32 address, REG8 value) {

mem[address & CPU_ADRSMASK] = (BYTE)value;	mem[address & CPU_ADRSMASK] = (BYTE)value;
}	}
#endif	#endif

#if 0 // defined(ARM)	#if defined(ARM)
void MEMCALL tram_wt(UINT32 address, REG8 value);	void MEMCALL tram_wt(UINT32 address, REG8 value);
#else	#else
static void MEMCALL tram_wt(UINT32 address, REG8 value) {	static void MEMCALL tram_wt(UINT32 address, REG8 value) {

CPU_REMCLOCK -= vramop.tramwait;	CPU_REMCLOCK -= MEMWAIT_TRAM;
if (address < 0xa2000) {	if (address < 0xa2000) {
mem[address] = (BYTE)value;	mem[address] = (BYTE)value;
tramupdate[LOW12(address >> 1)] = 1;	tramupdate[LOW12(address >> 1)] = 1;
Line 67 void MEMCALL vram_w1(UINT32 address, REG	Line 73 void MEMCALL vram_w1(UINT32 address, REG
#else	#else
static void MEMCALL vram_w0(UINT32 address, REG8 value) {	static void MEMCALL vram_w0(UINT32 address, REG8 value) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
mem[address] = (BYTE)value;	mem[address] = (BYTE)value;
vramupdate[LOW15(address)] \|= 1;	vramupdate[LOW15(address)] \|= 1;
gdcs.grphdisp \|= 1;	gdcs.grphdisp \|= 1;
Line 75 static void MEMCALL vram_w0(UINT32 addre	Line 81 static void MEMCALL vram_w0(UINT32 addre

static void MEMCALL vram_w1(UINT32 address, REG8 value) {	static void MEMCALL vram_w1(UINT32 address, REG8 value) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
mem[address + VRAM_STEP] = (BYTE)value;	mem[address + VRAM_STEP] = (BYTE)value;
vramupdate[LOW15(address)] \|= 2;	vramupdate[LOW15(address)] \|= 2;
gdcs.grphdisp \|= 2;	gdcs.grphdisp \|= 2;
Line 93 static void MEMCALL grcg_rmw0(UINT32 add	Line 99 static void MEMCALL grcg_rmw0(UINT32 add
REG8 mask;	REG8 mask;
BYTE *vram;	BYTE *vram;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
mask = ~value;	mask = ~value;
address = LOW15(address);	address = LOW15(address);
vramupdate[address] \|= 1;	vramupdate[address] \|= 1;
Line 122 static void MEMCALL grcg_rmw1(UINT32 add	Line 128 static void MEMCALL grcg_rmw1(UINT32 add
REG8 mask;	REG8 mask;
BYTE *vram;	BYTE *vram;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
mask = ~value;	mask = ~value;
address = LOW15(address);	address = LOW15(address);
vramupdate[address] \|= 2;	vramupdate[address] \|= 2;
Line 150 static void MEMCALL grcg_tdw0(UINT32 add	Line 156 static void MEMCALL grcg_tdw0(UINT32 add

BYTE *vram;	BYTE *vram;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
address = LOW15(address);	address = LOW15(address);
vramupdate[address] \|= 1;	vramupdate[address] \|= 1;
gdcs.grphdisp \|= 1;	gdcs.grphdisp \|= 1;
Line 174 static void MEMCALL grcg_tdw1(UINT32 add	Line 180 static void MEMCALL grcg_tdw1(UINT32 add

BYTE *vram;	BYTE *vram;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
address = LOW15(address);	address = LOW15(address);
vramupdate[address] \|= 2;	vramupdate[address] \|= 2;
gdcs.grphdisp \|= 2;	gdcs.grphdisp \|= 2;
Line 195 static void MEMCALL grcg_tdw1(UINT32 add	Line 201 static void MEMCALL grcg_tdw1(UINT32 add
}	}
#endif	#endif

	#if 0 // defined(ARM)
	void MEMCALL egc_wt(UINT32 address, REG8 value);
	#else
static void MEMCALL egc_wt(UINT32 address, REG8 value) {	static void MEMCALL egc_wt(UINT32 address, REG8 value) {

	CPU_REMCLOCK -= MEMWAIT_GRCG;
egc_write(address, value);	egc_write(address, value);
}	}
	#endif

	#if defined(ARM)
	void MEMCALL emmc_wt(UINT32 address, REG8 value);
	#else
static void MEMCALL emmc_wt(UINT32 address, REG8 value) {	static void MEMCALL emmc_wt(UINT32 address, REG8 value) {

extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value;	extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value;
}	}
	#endif

	#if defined(ARM)
	void MEMCALL i286_wn(UINT32 address, REG8 value);
	#else
static void MEMCALL i286_wn(UINT32 address, REG8 value) {	static void MEMCALL i286_wn(UINT32 address, REG8 value) {

(void)address;	(void)address;
(void)value;	(void)value;
}	}
	#endif


// ---- read byte	// ---- read byte

	#if defined(ARM)
	REG8 MEMCALL i286_rd(UINT32 address);
	REG8 MEMCALL i286_rdex(UINT32 address);
	#else
static REG8 MEMCALL i286_rd(UINT32 address) {	static REG8 MEMCALL i286_rd(UINT32 address) {

	return(mem[address]);
	}

	static REG8 MEMCALL i286_rdex(UINT32 address) {

return(mem[address & CPU_ADRSMASK]);	return(mem[address & CPU_ADRSMASK]);
}	}
	#endif

	#if defined(ARM)
	REG8 MEMCALL tram_rd(UINT32 address);
	#else
static REG8 MEMCALL tram_rd(UINT32 address) {	static REG8 MEMCALL tram_rd(UINT32 address) {

CPU_REMCLOCK -= vramop.tramwait;	CPU_REMCLOCK -= MEMWAIT_TRAM;
if (address < 0xa4000) {	if (address < 0xa4000) {
return(mem[address]);	return(mem[address]);
}	}
Line 235 static REG8 MEMCALL tram_rd(UINT32 addre	Line 267 static REG8 MEMCALL tram_rd(UINT32 addre
}	}
return(mem[address]);	return(mem[address]);
}	}
	#endif

	#if defined(ARM)
	REG8 MEMCALL vram_r0(UINT32 address);
	REG8 MEMCALL vram_r1(UINT32 address);
	#else
static REG8 MEMCALL vram_r0(UINT32 address) {	static REG8 MEMCALL vram_r0(UINT32 address) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
return(mem[address]);	return(mem[address]);
}	}

static REG8 MEMCALL vram_r1(UINT32 address) {	static REG8 MEMCALL vram_r1(UINT32 address) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
return(mem[address + VRAM_STEP]);	return(mem[address + VRAM_STEP]);
}	}
	#endif

	#if defined(ARM)
	REG8 MEMCALL grcg_tcr0(UINT32 address);
	REG8 MEMCALL grcg_tcr1(UINT32 address);
	#else
static REG8 MEMCALL grcg_tcr0(UINT32 address) {	static REG8 MEMCALL grcg_tcr0(UINT32 address) {

const BYTE *vram;	const BYTE *vram;
REG8 ret;	REG8 ret;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
vram = mem + LOW15(address);	vram = mem + LOW15(address);
ret = 0;	ret = 0;
if (!(grcg.modereg & 1)) {	if (!(grcg.modereg & 1)) {
Line 276 static REG8 MEMCALL grcg_tcr1(UINT32 add	Line 318 static REG8 MEMCALL grcg_tcr1(UINT32 add
const BYTE *vram;	const BYTE *vram;
REG8 ret;	REG8 ret;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
ret = 0;	ret = 0;
vram = mem + LOW15(address);	vram = mem + LOW15(address);
if (!(grcg.modereg & 1)) {	if (!(grcg.modereg & 1)) {
Line 293 const BYTE *vram;	Line 335 const BYTE *vram;
}	}
return(ret ^ 0xff);	return(ret ^ 0xff);
}	}
	#endif

static REG8 MEMCALL egc_rd(UINT32 address) {	static REG8 MEMCALL egc_rd(UINT32 address) {

	CPU_REMCLOCK -= MEMWAIT_GRCG;
return(egc_read(address));	return(egc_read(address));
}	}

	#if defined(ARM)
	REG8 MEMCALL emmc_rd(UINT32 address);
	#else
static REG8 MEMCALL emmc_rd(UINT32 address) {	static REG8 MEMCALL emmc_rd(UINT32 address) {

return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]);	return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]);
}	}
	#endif

	#if defined(ARM)
	REG8 MEMCALL i286_itf(UINT32 address);
	#else
static REG8 MEMCALL i286_itf(UINT32 address) {	static REG8 MEMCALL i286_itf(UINT32 address) {

if (CPU_ITFBANK) {	if (CPU_ITFBANK) {
Line 311 static REG8 MEMCALL i286_itf(UINT32 addr	Line 362 static REG8 MEMCALL i286_itf(UINT32 addr
}	}
return(mem[address]);	return(mem[address]);
}	}
	#endif


// ---- write word	// ---- write word

	#if defined(ARM)
	void MEMCALL i286w_wt(UINT32 address, REG16 value);
	void MEMCALL i286w_wtex(UINT32 address, REG16 value);
	#else
static void MEMCALL i286w_wt(UINT32 address, REG16 value) {	static void MEMCALL i286w_wt(UINT32 address, REG16 value) {

BYTE *ptr;	BYTE *ptr;

	ptr = mem + address;
	STOREINTELWORD(ptr, value);
	}

	static void MEMCALL i286w_wtex(UINT32 address, REG16 value) {

	BYTE *ptr;

ptr = mem + (address & CPU_ADRSMASK);	ptr = mem + (address & CPU_ADRSMASK);
STOREINTELWORD(ptr, value);	STOREINTELWORD(ptr, value);
}	}
	#endif

	#if defined(ARM)
	void MEMCALL tramw_wt(UINT32 address, REG16 value);
	#else
static void MEMCALL tramw_wt(UINT32 address, REG16 value) {	static void MEMCALL tramw_wt(UINT32 address, REG16 value) {

	CPU_REMCLOCK -= MEMWAIT_TRAM;
if (address < 0xa1fff) {	if (address < 0xa1fff) {
STOREINTELWORD(mem + address, value);	STOREINTELWORD(mem + address, value);
tramupdate[LOW12(address >> 1)] = 1;	tramupdate[LOW12(address >> 1)] = 1;
Line 367 static void MEMCALL tramw_wt(UINT32 addr	Line 436 static void MEMCALL tramw_wt(UINT32 addr
}	}
}	}
}	}
	#endif

#define GRCGW_NON(page) { \	#define GRCGW_NON(page) { \
CPU_REMCLOCK -= vramop.vramwait; \	CPU_REMCLOCK -= MEMWAIT_VRAM; \
STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \	STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \
vramupdate[LOW15(address)] \|= (1 << page); \	vramupdate[LOW15(address)] \|= (1 << page); \
vramupdate[LOW15(address + 1)] \|= (1 << page); \	vramupdate[LOW15(address + 1)] \|= (1 << page); \
Line 379 static void MEMCALL tramw_wt(UINT32 addr	Line 448 static void MEMCALL tramw_wt(UINT32 addr

#define GRCGW_RMW(page) { \	#define GRCGW_RMW(page) { \
BYTE *vram; \	BYTE *vram; \
CPU_REMCLOCK -= vramop.grcgwait; \	CPU_REMCLOCK -= MEMWAIT_GRCG; \
address = LOW15(address); \	address = LOW15(address); \
vramupdate[address] \|= (1 << page); \	vramupdate[address] \|= (1 << page); \
vramupdate[address + 1] \|= (1 << page); \	vramupdate[address + 1] \|= (1 << page); \
Line 425 static void MEMCALL tramw_wt(UINT32 addr	Line 494 static void MEMCALL tramw_wt(UINT32 addr

#define GRCGW_TDW(page) { \	#define GRCGW_TDW(page) { \
BYTE *vram; \	BYTE *vram; \
CPU_REMCLOCK -= vramop.grcgwait; \	CPU_REMCLOCK -= MEMWAIT_GRCG; \
address = LOW15(address); \	address = LOW15(address); \
vramupdate[address] \|= (1 << page); \	vramupdate[address] \|= (1 << page); \
vramupdate[address + 1] \|= (1 << page); \	vramupdate[address + 1] \|= (1 << page); \
Line 468 static void MEMCALL grcgw_tdw1(UINT32 ad	Line 537 static void MEMCALL grcgw_tdw1(UINT32 ad

static void MEMCALL egcw_wt(UINT32 address, REG16 value) {	static void MEMCALL egcw_wt(UINT32 address, REG16 value) {

	CPU_REMCLOCK -= MEMWAIT_GRCG;
if (!(address & 1)) {	if (!(address & 1)) {
egc_write_w(address, value);	egc_write_w(address, value);
}	}
Line 483 static void MEMCALL egcw_wt(UINT32 addre	Line 553 static void MEMCALL egcw_wt(UINT32 addre
}	}
}	}

	#if defined(ARM)
	void MEMCALL emmcw_wt(UINT32 address, REG16 value);
	#else
static void MEMCALL emmcw_wt(UINT32 address, REG16 value) {	static void MEMCALL emmcw_wt(UINT32 address, REG16 value) {

BYTE *ptr;	BYTE *ptr;
Line 496 static void MEMCALL emmcw_wt(UINT32 addr	Line 569 static void MEMCALL emmcw_wt(UINT32 addr
extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8);	extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8);
}	}
}	}
	#endif

	#if defined(ARM)
	void MEMCALL i286w_wn(UINT32 address, REG16 value);
	#else
static void MEMCALL i286w_wn(UINT32 address, REG16 value) {	static void MEMCALL i286w_wn(UINT32 address, REG16 value) {

(void)address;	(void)address;
(void)value;	(void)value;
}	}
	#endif


// ---- read word	// ---- read word

	#if defined(ARM)
	REG16 MEMCALL i286w_rd(UINT32 address);
	REG16 MEMCALL i286w_rdex(UINT32 address);
	#else
static REG16 MEMCALL i286w_rd(UINT32 address) {	static REG16 MEMCALL i286w_rd(UINT32 address) {

BYTE *ptr;	BYTE *ptr;

	ptr = mem + address;
	return(LOADINTELWORD(ptr));
	}

	static REG16 MEMCALL i286w_rdex(UINT32 address) {

	BYTE *ptr;

ptr = mem + (address & CPU_ADRSMASK);	ptr = mem + (address & CPU_ADRSMASK);
return(LOADINTELWORD(ptr));	return(LOADINTELWORD(ptr));
}	}
	#endif

	#if defined(ARM)
	REG16 MEMCALL tramw_rd(UINT32 address);
	#else
static REG16 MEMCALL tramw_rd(UINT32 address) {	static REG16 MEMCALL tramw_rd(UINT32 address) {

CPU_REMCLOCK -= vramop.tramwait;	CPU_REMCLOCK -= MEMWAIT_TRAM;
if (address < (0xa4000 - 1)) {	if (address < (0xa4000 - 1)) {
return(LOADINTELWORD(mem + address));	return(LOADINTELWORD(mem + address));
}	}
Line 542 static REG16 MEMCALL tramw_rd(UINT32 add	Line 636 static REG16 MEMCALL tramw_rd(UINT32 add
}	}
return(LOADINTELWORD(mem + address));	return(LOADINTELWORD(mem + address));
}	}
	#endif

	#if defined(ARM)
	REG16 MEMCALL vramw_r0(UINT32 address);
	REG16 MEMCALL vramw_r1(UINT32 address);
	#else
static REG16 MEMCALL vramw_r0(UINT32 address) {	static REG16 MEMCALL vramw_r0(UINT32 address) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
return(LOADINTELWORD(mem + address));	return(LOADINTELWORD(mem + address));
}	}

static REG16 MEMCALL vramw_r1(UINT32 address) {	static REG16 MEMCALL vramw_r1(UINT32 address) {

CPU_REMCLOCK -= vramop.vramwait;	CPU_REMCLOCK -= MEMWAIT_VRAM;
return(LOADINTELWORD(mem + address + VRAM_STEP));	return(LOADINTELWORD(mem + address + VRAM_STEP));
}	}
	#endif

	#if defined(ARM)
	REG16 MEMCALL grcgw_tcr0(UINT32 address);
	REG16 MEMCALL grcgw_tcr1(UINT32 address);
	#else
static REG16 MEMCALL grcgw_tcr0(UINT32 address) {	static REG16 MEMCALL grcgw_tcr0(UINT32 address) {

BYTE *vram;	BYTE *vram;
REG16 ret;	REG16 ret;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
ret = 0;	ret = 0;
vram = mem + LOW15(address);	vram = mem + LOW15(address);
if (!(grcg.modereg & 1)) {	if (!(grcg.modereg & 1)) {
Line 583 static REG16 MEMCALL grcgw_tcr1(UINT32 a	Line 687 static REG16 MEMCALL grcgw_tcr1(UINT32 a
BYTE *vram;	BYTE *vram;
REG16 ret;	REG16 ret;

CPU_REMCLOCK -= vramop.grcgwait;	CPU_REMCLOCK -= MEMWAIT_GRCG;
ret = 0;	ret = 0;
vram = mem + LOW15(address);	vram = mem + LOW15(address);
if (!(grcg.modereg & 1)) {	if (!(grcg.modereg & 1)) {
Line 600 static REG16 MEMCALL grcgw_tcr1(UINT32 a	Line 704 static REG16 MEMCALL grcgw_tcr1(UINT32 a
}	}
return((UINT16)(~ret));	return((UINT16)(~ret));
}	}
	#endif

static REG16 MEMCALL egcw_rd(UINT32 address) {	static REG16 MEMCALL egcw_rd(UINT32 address) {

REG16 ret;	REG16 ret;

	CPU_REMCLOCK -= MEMWAIT_GRCG;
if (!(address & 1)) {	if (!(address & 1)) {
return(egc_read_w(address));	return(egc_read_w(address));
}	}
Line 622 static REG16 MEMCALL egcw_rd(UINT32 addr	Line 728 static REG16 MEMCALL egcw_rd(UINT32 addr
}	}
}	}

	#if defined(ARM)
	REG16 MEMCALL emmcw_rd(UINT32 address);
	#else
static REG16 MEMCALL emmcw_rd(UINT32 address) {	static REG16 MEMCALL emmcw_rd(UINT32 address) {

const BYTE *ptr;	const BYTE *ptr;
Line 637 const BYTE *ptr;	Line 746 const BYTE *ptr;
return(ret);	return(ret);
}	}
}	}
	#endif

	#if defined(ARM)
	REG16 MEMCALL i286w_itf(UINT32 address);
	#else
static REG16 MEMCALL i286w_itf(UINT32 address) {	static REG16 MEMCALL i286w_itf(UINT32 address) {

if (CPU_ITFBANK) {	if (CPU_ITFBANK) {
Line 645 static REG16 MEMCALL i286w_itf(UINT32 ad	Line 758 static REG16 MEMCALL i286w_itf(UINT32 ad
}	}
return(LOADINTELWORD(mem + address));	return(LOADINTELWORD(mem + address));
}	}
	#endif


// ---- table	// ---- table

	#if 0

typedef void (MEMCALL * MEM8WRITE)(UINT32 address, REG8 value);	typedef void (MEMCALL * MEM8WRITE)(UINT32 address, REG8 value);
typedef REG8 (MEMCALL * MEM8READ)(UINT32 address);	typedef REG8 (MEMCALL * MEM8READ)(UINT32 address);
typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value);	typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value);
Line 673 MEMFN memfn = // -> memory.s	Line 789 MEMFN memfn = // -> memory.s
#else	#else
static MEMFN memfn =	static MEMFN memfn =
#endif	#endif
{{i286_rd, i286_rd, i286_rd, i286_rd, // 00	{{i286_rdex, i286_rdex, i286_rd, i286_rd, // 00
i286_rd, i286_rd, i286_rd, i286_rd, // 20	i286_rd, i286_rd, i286_rd, i286_rd, // 20
i286_rd, i286_rd, i286_rd, i286_rd, // 40	i286_rd, i286_rd, i286_rd, i286_rd, // 40
i286_rd, i286_rd, i286_rd, i286_rd, // 60	i286_rd, i286_rd, i286_rd, i286_rd, // 60
Line 682 static MEMFN memfn =	Line 798 static MEMFN memfn =
emmc_rd, emmc_rd, i286_rd, i286_rd, // c0	emmc_rd, emmc_rd, i286_rd, i286_rd, // c0
vram_r0, i286_rd, i286_rd, i286_itf}, // f0	vram_r0, i286_rd, i286_rd, i286_itf}, // f0

{i286_wt, i286_wt, i286_wt, i286_wt, // 00	{i286_wtex, i286_wtex, i286_wt, i286_wt, // 00
i286_wt, i286_wt, i286_wt, i286_wt, // 20	i286_wt, i286_wt, i286_wt, i286_wt, // 20
i286_wt, i286_wt, i286_wt, i286_wt, // 40	i286_wt, i286_wt, i286_wt, i286_wt, // 40
i286_wt, i286_wt, i286_wt, i286_wt, // 60	i286_wt, i286_wt, i286_wt, i286_wt, // 60
Line 691 static MEMFN memfn =	Line 807 static MEMFN memfn =
emmc_wt, emmc_wt, i286_wn, i286_wn, // c0	emmc_wt, emmc_wt, i286_wn, i286_wn, // c0
vram_w0, i286_wn, i286_wn, i286_wn}, // e0	vram_w0, i286_wn, i286_wn, i286_wn}, // e0

{i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00	{i286w_rdex, i286w_rdex, i286w_rd, i286w_rd, // 00
i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20	i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20
i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40	i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40
i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60	i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60
Line 700 static MEMFN memfn =	Line 816 static MEMFN memfn =
emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0	emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0
vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0	vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0

{i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00	{i286w_wtex, i286w_wtex, i286w_wt, i286w_wt, // 00
i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20	i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20
i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40	i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40
i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60	i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60
Line 778 const VACCTBL *vacc;	Line 894 const VACCTBL *vacc;
memfn.rd16[0xe0000 >> 15] = i286_nonram_rw;	memfn.rd16[0xe0000 >> 15] = i286_nonram_rw;
}	}
}	}
	#endif

#if !defined(ARM)	#if !defined(ARM)
REG8 MEMCALL i286_memoryread(UINT32 address) {	REG8 MEMCALL i286_memoryread(UINT32 address) {
Line 800 REG8 MEMCALL i286_memoryread(UINT32 addr	Line 917 REG8 MEMCALL i286_memoryread(UINT32 addr
return(memfn.rd8[(address >> 15) & 0x1f](address));	return(memfn.rd8[(address >> 15) & 0x1f](address));
}	}
}	}
#endif

#if !defined(ARM)
REG16 MEMCALL i286_memoryread_w(UINT32 address) {	REG16 MEMCALL i286_memoryread_w(UINT32 address) {

REG16 ret;	REG16 ret;
Line 842 REG16 MEMCALL i286_memoryread_w(UINT32 a	Line 957 REG16 MEMCALL i286_memoryread_w(UINT32 a
return(ret);	return(ret);
}	}
}	}
#endif

#if !defined(ARM)
void MEMCALL i286_memorywrite(UINT32 address, REG8 value) {	void MEMCALL i286_memorywrite(UINT32 address, REG8 value) {

if (address < I286_MEMWRITEMAX) {	if (address < I286_MEMWRITEMAX) {
Line 862 void MEMCALL i286_memorywrite(UINT32 add	Line 975 void MEMCALL i286_memorywrite(UINT32 add
memfn.wr8[(address >> 15) & 0x1f](address, value);	memfn.wr8[(address >> 15) & 0x1f](address, value);
}	}
}	}
#endif

#if !defined(ARM)
void MEMCALL i286_memorywrite_w(UINT32 address, REG16 value) {	void MEMCALL i286_memorywrite_w(UINT32 address, REG16 value) {

if (address < (I286_MEMWRITEMAX - 1)) {	if (address < (I286_MEMWRITEMAX - 1)) {

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.1
changed lines
	Added in v.1.5