--- np2/i286a/memory.c 2003/12/15 20:58:12 1.1 +++ np2/i286a/memory.c 2003/12/20 10:27:55 1.4 @@ -16,21 +16,27 @@ // ---- write byte -#if 0 // defined(ARM) +#if defined(ARM) void MEMCALL i286_wt(UINT32 address, REG8 value); +void MEMCALL i286_wtex(UINT32 address, REG8 value); #else static void MEMCALL i286_wt(UINT32 address, REG8 value) { + mem[address] = (BYTE)value; +} + +static void MEMCALL i286_wtex(UINT32 address, REG8 value) { + mem[address & CPU_ADRSMASK] = (BYTE)value; } #endif -#if 0 // defined(ARM) +#if defined(ARM) void MEMCALL tram_wt(UINT32 address, REG8 value); #else static void MEMCALL tram_wt(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa2000) { mem[address] = (BYTE)value; tramupdate[LOW12(address >> 1)] = 1; @@ -67,7 +73,7 @@ void MEMCALL vram_w1(UINT32 address, REG #else static void MEMCALL vram_w0(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; mem[address] = (BYTE)value; vramupdate[LOW15(address)] |= 1; gdcs.grphdisp |= 1; @@ -75,7 +81,7 @@ static void MEMCALL vram_w0(UINT32 addre static void MEMCALL vram_w1(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; mem[address + VRAM_STEP] = (BYTE)value; vramupdate[LOW15(address)] |= 2; gdcs.grphdisp |= 2; @@ -93,7 +99,7 @@ static void MEMCALL grcg_rmw0(UINT32 add REG8 mask; BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; mask = ~value; address = LOW15(address); vramupdate[address] |= 1; @@ -122,7 +128,7 @@ static void MEMCALL grcg_rmw1(UINT32 add REG8 mask; BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; mask = ~value; address = LOW15(address); vramupdate[address] |= 2; @@ -150,7 +156,7 @@ static void MEMCALL grcg_tdw0(UINT32 add BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; address = LOW15(address); vramupdate[address] |= 1; gdcs.grphdisp |= 1; @@ -174,7 +180,7 @@ static void MEMCALL grcg_tdw1(UINT32 add BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; address = LOW15(address); vramupdate[address] |= 2; gdcs.grphdisp |= 2; @@ -195,33 +201,59 @@ static void MEMCALL grcg_tdw1(UINT32 add } #endif +#if 0 // defined(ARM) +void MEMCALL egc_wt(UINT32 address, REG8 value); +#else static void MEMCALL egc_wt(UINT32 address, REG8 value) { + CPU_REMCLOCK -= MEMWAIT_GRCG; egc_write(address, value); } +#endif +#if defined(ARM) +void MEMCALL emmc_wt(UINT32 address, REG8 value); +#else static void MEMCALL emmc_wt(UINT32 address, REG8 value) { extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; } +#endif +#if defined(ARM) +void MEMCALL i286_wn(UINT32 address, REG8 value); +#else static void MEMCALL i286_wn(UINT32 address, REG8 value) { (void)address; (void)value; } +#endif // ---- read byte +#if defined(ARM) +REG8 MEMCALL i286_rd(UINT32 address); +REG8 MEMCALL i286_rdex(UINT32 address); +#else static REG8 MEMCALL i286_rd(UINT32 address) { + return(mem[address]); +} + +static REG8 MEMCALL i286_rdex(UINT32 address) { + return(mem[address & CPU_ADRSMASK]); } +#endif +#if defined(ARM) +REG8 MEMCALL tram_rd(UINT32 address); +#else static REG8 MEMCALL tram_rd(UINT32 address) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa4000) { return(mem[address]); } @@ -235,25 +267,35 @@ static REG8 MEMCALL tram_rd(UINT32 addre } return(mem[address]); } +#endif +#if defined(ARM) +REG8 MEMCALL vram_r0(UINT32 address); +REG8 MEMCALL vram_r1(UINT32 address); +#else static REG8 MEMCALL vram_r0(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(mem[address]); } static REG8 MEMCALL vram_r1(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(mem[address + VRAM_STEP]); } +#endif +#if defined(ARM) +REG8 MEMCALL grcg_tcr0(UINT32 address); +REG8 MEMCALL grcg_tcr1(UINT32 address); +#else static REG8 MEMCALL grcg_tcr0(UINT32 address) { const BYTE *vram; REG8 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; vram = mem + LOW15(address); ret = 0; if (!(grcg.modereg & 1)) { @@ -276,7 +318,7 @@ static REG8 MEMCALL grcg_tcr1(UINT32 add const BYTE *vram; REG8 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -293,17 +335,26 @@ const BYTE *vram; } return(ret ^ 0xff); } +#endif static REG8 MEMCALL egc_rd(UINT32 address) { + CPU_REMCLOCK -= MEMWAIT_GRCG; return(egc_read(address)); } +#if defined(ARM) +REG8 MEMCALL emmc_rd(UINT32 address); +#else static REG8 MEMCALL emmc_rd(UINT32 address) { return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); } +#endif +#if defined(ARM) +REG8 MEMCALL i286_itf(UINT32 address); +#else static REG8 MEMCALL i286_itf(UINT32 address) { if (CPU_ITFBANK) { @@ -311,20 +362,38 @@ static REG8 MEMCALL i286_itf(UINT32 addr } return(mem[address]); } +#endif // ---- write word +#if defined(ARM) +void MEMCALL i286w_wt(UINT32 address, REG16 value); +void MEMCALL i286w_wtex(UINT32 address, REG16 value); +#else static void MEMCALL i286w_wt(UINT32 address, REG16 value) { BYTE *ptr; + ptr = mem + address; + STOREINTELWORD(ptr, value); +} + +static void MEMCALL i286w_wtex(UINT32 address, REG16 value) { + + BYTE *ptr; + ptr = mem + (address & CPU_ADRSMASK); STOREINTELWORD(ptr, value); } +#endif +#if defined(ARM) +void MEMCALL tramw_wt(UINT32 address, REG16 value); +#else static void MEMCALL tramw_wt(UINT32 address, REG16 value) { + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa1fff) { STOREINTELWORD(mem + address, value); tramupdate[LOW12(address >> 1)] = 1; @@ -367,10 +436,10 @@ static void MEMCALL tramw_wt(UINT32 addr } } } - +#endif #define GRCGW_NON(page) { \ - CPU_REMCLOCK -= vramop.vramwait; \ + CPU_REMCLOCK -= MEMWAIT_VRAM; \ STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ vramupdate[LOW15(address)] |= (1 << page); \ vramupdate[LOW15(address + 1)] |= (1 << page); \ @@ -379,7 +448,7 @@ static void MEMCALL tramw_wt(UINT32 addr #define GRCGW_RMW(page) { \ BYTE *vram; \ - CPU_REMCLOCK -= vramop.grcgwait; \ + CPU_REMCLOCK -= MEMWAIT_GRCG; \ address = LOW15(address); \ vramupdate[address] |= (1 << page); \ vramupdate[address + 1] |= (1 << page); \ @@ -425,7 +494,7 @@ static void MEMCALL tramw_wt(UINT32 addr #define GRCGW_TDW(page) { \ BYTE *vram; \ - CPU_REMCLOCK -= vramop.grcgwait; \ + CPU_REMCLOCK -= MEMWAIT_GRCG; \ address = LOW15(address); \ vramupdate[address] |= (1 << page); \ vramupdate[address + 1] |= (1 << page); \ @@ -468,6 +537,7 @@ static void MEMCALL grcgw_tdw1(UINT32 ad static void MEMCALL egcw_wt(UINT32 address, REG16 value) { + CPU_REMCLOCK -= MEMWAIT_GRCG; if (!(address & 1)) { egc_write_w(address, value); } @@ -483,6 +553,9 @@ static void MEMCALL egcw_wt(UINT32 addre } } +#if defined(ARM) +void MEMCALL emmcw_wt(UINT32 address, REG16 value); +#else static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { BYTE *ptr; @@ -496,27 +569,48 @@ static void MEMCALL emmcw_wt(UINT32 addr extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); } } +#endif +#if defined(ARM) +void MEMCALL i286w_wn(UINT32 address, REG16 value); +#else static void MEMCALL i286w_wn(UINT32 address, REG16 value) { (void)address; (void)value; } +#endif // ---- read word +#if defined(ARM) +REG16 MEMCALL i286w_rd(UINT32 address); +REG16 MEMCALL i286w_rdex(UINT32 address); +#else static REG16 MEMCALL i286w_rd(UINT32 address) { BYTE *ptr; + ptr = mem + address; + return(LOADINTELWORD(ptr)); +} + +static REG16 MEMCALL i286w_rdex(UINT32 address) { + + BYTE *ptr; + ptr = mem + (address & CPU_ADRSMASK); return(LOADINTELWORD(ptr)); } +#endif +#if defined(ARM) +REG16 MEMCALL tramw_rd(UINT32 address); +#else static REG16 MEMCALL tramw_rd(UINT32 address) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < (0xa4000 - 1)) { return(LOADINTELWORD(mem + address)); } @@ -542,25 +636,35 @@ static REG16 MEMCALL tramw_rd(UINT32 add } return(LOADINTELWORD(mem + address)); } +#endif +#if defined(ARM) +REG16 MEMCALL vramw_r0(UINT32 address); +REG16 MEMCALL vramw_r1(UINT32 address); +#else static REG16 MEMCALL vramw_r0(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(LOADINTELWORD(mem + address)); } static REG16 MEMCALL vramw_r1(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(LOADINTELWORD(mem + address + VRAM_STEP)); } +#endif +#if defined(ARM) +REG16 MEMCALL grcgw_tcr0(UINT32 address); +REG16 MEMCALL grcgw_tcr1(UINT32 address); +#else static REG16 MEMCALL grcgw_tcr0(UINT32 address) { BYTE *vram; REG16 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -583,7 +687,7 @@ static REG16 MEMCALL grcgw_tcr1(UINT32 a BYTE *vram; REG16 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -600,11 +704,13 @@ static REG16 MEMCALL grcgw_tcr1(UINT32 a } return((UINT16)(~ret)); } +#endif static REG16 MEMCALL egcw_rd(UINT32 address) { REG16 ret; + CPU_REMCLOCK -= MEMWAIT_GRCG; if (!(address & 1)) { return(egc_read_w(address)); } @@ -622,6 +728,9 @@ static REG16 MEMCALL egcw_rd(UINT32 addr } } +#if defined(ARM) +REG16 MEMCALL emmcw_rd(UINT32 address); +#else static REG16 MEMCALL emmcw_rd(UINT32 address) { const BYTE *ptr; @@ -637,7 +746,11 @@ const BYTE *ptr; return(ret); } } +#endif +#if defined(ARM) +REG16 MEMCALL i286w_itf(UINT32 address); +#else static REG16 MEMCALL i286w_itf(UINT32 address) { if (CPU_ITFBANK) { @@ -645,6 +758,7 @@ static REG16 MEMCALL i286w_itf(UINT32 ad } return(LOADINTELWORD(mem + address)); } +#endif // ---- table @@ -673,7 +787,7 @@ MEMFN memfn = // -> memory.s #else static MEMFN memfn = #endif - {{i286_rd, i286_rd, i286_rd, i286_rd, // 00 + {{i286_rdex, i286_rdex, i286_rd, i286_rd, // 00 i286_rd, i286_rd, i286_rd, i286_rd, // 20 i286_rd, i286_rd, i286_rd, i286_rd, // 40 i286_rd, i286_rd, i286_rd, i286_rd, // 60 @@ -682,7 +796,7 @@ static MEMFN memfn = emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 vram_r0, i286_rd, i286_rd, i286_itf}, // f0 - {i286_wt, i286_wt, i286_wt, i286_wt, // 00 + {i286_wtex, i286_wtex, i286_wt, i286_wt, // 00 i286_wt, i286_wt, i286_wt, i286_wt, // 20 i286_wt, i286_wt, i286_wt, i286_wt, // 40 i286_wt, i286_wt, i286_wt, i286_wt, // 60 @@ -691,7 +805,7 @@ static MEMFN memfn = emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 vram_w0, i286_wn, i286_wn, i286_wn}, // e0 - {i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 + {i286w_rdex, i286w_rdex, i286w_rd, i286w_rd, // 00 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 @@ -700,7 +814,7 @@ static MEMFN memfn = emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0 - {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 + {i286w_wtex, i286w_wtex, i286w_wt, i286w_wt, // 00 i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 @@ -800,9 +914,7 @@ REG8 MEMCALL i286_memoryread(UINT32 addr return(memfn.rd8[(address >> 15) & 0x1f](address)); } } -#endif -#if !defined(ARM) REG16 MEMCALL i286_memoryread_w(UINT32 address) { REG16 ret; @@ -842,9 +954,7 @@ REG16 MEMCALL i286_memoryread_w(UINT32 a return(ret); } } -#endif -#if !defined(ARM) void MEMCALL i286_memorywrite(UINT32 address, REG8 value) { if (address < I286_MEMWRITEMAX) { @@ -862,9 +972,7 @@ void MEMCALL i286_memorywrite(UINT32 add memfn.wr8[(address >> 15) & 0x1f](address, value); } } -#endif -#if !defined(ARM) void MEMCALL i286_memorywrite_w(UINT32 address, REG16 value) { if (address < (I286_MEMWRITEMAX - 1)) {