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| version 1.1, 2003/12/15 20:58:12 | version 1.3, 2003/12/19 05:25:32 |
|---|---|
| Line 8 VRAM_E equ &0e0000 | Line 8 VRAM_E equ &0e0000 |
| FONT_ADRS equ &110000 | FONT_ADRS equ &110000 |
| ITF_ADRS equ &1f8000 | ITF_ADRS equ &1f8000 |
| ; cpu_reg equ 0 | |
| CPU_REMAINCLOCK equ 28 | |
| ; cpu_baseclock equ 32 | |
| ; cpu_clock equ 36 | |
| CPU_ADRSMASK equ 40 | |
| ; cpu_es_base equ 44 | |
| ; cpu_cs_base equ 48 | |
| ; cpu_ss_base equ 52 | |
| ; cpu_ds_base equ 56 | |
| ; cpu_ss_fix equ 60 | |
| ; cpu_ds_fix equ 64 | |
| ; cpu_prefix equ 68 | |
| ; cpu_trap equ 70 | |
| ; cpu_type equ 71 | |
| ; cpu_pf_semaphore equ 72 | |
| ; cpu_repbak equ 76 | |
| ; cpu_inport equ 80 | |
| ; cpu_ovflag equ 84 | |
| ; cpu_GDTR equ 88 | |
| ; cpu_IDTR equ 94 | |
| ; cpu_MSW equ 100 | |
| ; cpu_resetreq equ 102 | |
| ; cpu_itfbank equ 103 | |
| CPU_EXTMEM equ 104 | |
| CPU_EXTMEMSIZE equ 108 | |
| CPU_MAINMEM equ 112 | |
| ; gdcs_access equ 0 | ; gdcs_access equ 0 |
| ; gdcs_disp equ 1 | ; gdcs_disp equ 1 |
| GDCS_TEXTDISP equ 2 | GDCS_TEXTDISP equ 2 |
| Line 60 GW_HIGH equ 4 | Line 33 GW_HIGH equ 4 |
| GW_WRITABLE equ 8 | GW_WRITABLE equ 8 |
| INCLUDE i286a.inc | |
| ; IMPORT mem | ; IMPORT mem |
| IMPORT memfn | IMPORT memfn |
| IMPORT i286core | ; IMPORT i286core |
| IMPORT vramupdate | IMPORT vramupdate |
| IMPORT gdcs | IMPORT gdcs |
| IMPORT vramop | IMPORT vramop |
| Line 70 GW_WRITABLE equ 8 | Line 45 GW_WRITABLE equ 8 |
| IMPORT tramupdate | IMPORT tramupdate |
| IMPORT cgwindow | IMPORT cgwindow |
| ; EXPORT i286_wt | EXPORT i286_wt |
| ; EXPORT tram_wt | EXPORT i286_wtex |
| EXPORT tram_wt | |
| EXPORT vram_w0 | EXPORT vram_w0 |
| EXPORT vram_w1 | EXPORT vram_w1 |
| EXPORT grcg_rmw0 | EXPORT grcg_rmw0 |
| Line 79 GW_WRITABLE equ 8 | Line 55 GW_WRITABLE equ 8 |
| EXPORT grcg_tdw0 | EXPORT grcg_tdw0 |
| EXPORT grcg_tdw1 | EXPORT grcg_tdw1 |
| EXPORT i286_rd | |
| EXPORT i286_rdex | |
| ; EXPORT tram_rd | |
| ; EXPORT vram_r0 | |
| ; EXPORT vram_r1 | |
| EXPORT i286w_wt | |
| EXPORT i286w_wtex | |
| EXPORT vramw_w0 | EXPORT vramw_w0 |
| EXPORT vramw_w1 | EXPORT vramw_w1 |
| EXPORT grcgw_rmw0 | EXPORT grcgw_rmw0 |
| Line 86 GW_WRITABLE equ 8 | Line 70 GW_WRITABLE equ 8 |
| EXPORT grcgw_tdw0 | EXPORT grcgw_tdw0 |
| EXPORT grcgw_tdw1 | EXPORT grcgw_tdw1 |
| EXPORT i286w_rd | |
| EXPORT i286w_rdex | |
| ; EXPORT tramw_rd | |
| ; EXPORT vramw_r0 | |
| ; EXPORT vramw_r1 | |
| EXPORT i286_nonram_r | EXPORT i286_nonram_r |
| EXPORT i286_nonram_rw | EXPORT i286_nonram_rw |
| MACRO | |
| $label MEMADR $offset | |
| $label dcd (i286core + CPU_MAINMEM) $offset | |
| MEND | |
| AREA .text, CODE, READONLY | AREA .text, CODE, READONLY |
| ; ---- write byte | ; ---- write byte |
| if 0 | i286_wt strb r1, [r9, r0] |
| i286_wt ldr r2, iwt_cpu | mov pc, lr |
| ldr r3, iwt_mem | |
| ldr r2, [r2, #CPU_ADRSMASK] | i286_wtex ldr r2, [r9, #CPU_ADRSMASK] |
| and r0, r0, r2 | and r0, r2, r0 |
| strb r1, [r0, r3] | strb r1, [r9, r0] |
| mov pc, lr | mov pc, lr |
| iwt_cpu dcd i286core | |
| iwt_mem MEMADR | |
| endif | tram_wt ldr r3, twt_vramop |
| if 0 | |
| tram_wt ldr r2, twt_cpu | |
| ldr r3, twt_vramop | |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_TRAMWAIT] | ldr r3, [r3, #VRAMOP_TRAMWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| mov r12, r0, lsl #(31 - 12) | mov r12, r0, lsl #(31 - 12) |
| cmp r0, #&a2000 | cmp r0, #&a2000 |
| Line 137 tram_wt ldr r2, twt_cpu | Line 117 tram_wt ldr r2, twt_cpu |
| cmp r2, #0 | cmp r2, #0 |
| moveq pc, lr | moveq pc, lr |
| twt_write ldr r3, twt_mem | twt_write strb r1, [r9, r0] |
| strb r1, [r3, r0] | |
| ldr r2, twt_tramupd | ldr r2, twt_tramupd |
| mov r3, #1 | mov r3, #1 |
| strb r3, [r2, r12, lsr #(32 - 12)] | strb r3, [r2, r12, lsr #(32 - 12)] |
| Line 160 twt_nontram cmp r0, #&a5000 | Line 139 twt_nontram cmp r0, #&a5000 |
| strb r12, [r2, #GW_WRITABLE] | strb r12, [r2, #GW_WRITABLE] |
| and r0, r0, #(&f << 1) | and r0, r0, #(&f << 1) |
| ldr r3, [r2, #GW_HIGH] | ldr r3, [r2, #GW_HIGH] |
| ldr r12, twt_fontrom | add r12, r9, #FONT_ADRS |
| add r12, r12, r0 lsr #1 | add r12, r12, r0 lsr #1 |
| strb r1, [r3, r12] | strb r1, [r3, r12] |
| mov pc, lr | mov pc, lr |
| twt_cpu dcd i286core | |
| twt_vramop dcd vramop | twt_vramop dcd vramop |
| twt_mem MEMADR | |
| twt_tramupd dcd tramupdate | twt_tramupd dcd tramupdate |
| twt_gdcs dcd gdcs | twt_gdcs dcd gdcs |
| twt_cgwnd dcd cgwindow | twt_cgwnd dcd cgwindow |
| twt_fontrom MEMADR + FONT_ADRS | |
| endif | |
| vram_w0 ldr r2, vw0_cpu | vram_w0 ldr r3, vw0_vramop |
| ldr r3, vw0_vramop | |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | |
| sub r12, r12, r3 | |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r2, vw0_gdcs | ldr r2, vw0_gdcs |
| strb r1, [r0, r9] | |
| ldr r1, [r3, #VRAMOP_VRAMWAIT] | |
| ldr r3, vw0_vramupd | |
| mov r0, r0, lsl #(32 - 15) | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | ldrb r12, [r2, #GDCS_GRPHDISP] |
| CPUWORK r1 | |
| ldrb r1, [r3, r0, lsr #(32 - 15)] | |
| orr r12, r12, #1 | orr r12, r12, #1 |
| strb r12, [r2, #GDCS_GRPHDISP] | strb r12, [r2, #GDCS_GRPHDISP] |
| ldr r2, vw0_mem | orr r1, r1, #1 |
| strb r1, [r0, r2] | strb r1, [r3, r0, lsr #(32 - 15)] |
| ldr r2, vw0_vramupd | |
| mov r0, r0, lsl #(32 - 15) | |
| ldr r2, vw0_vramupd | |
| ldrb r12, [r2, r0, lsr #(32 - 15)] | |
| orr r12, r12, #1 | |
| strb r12, [r2, r0, lsr #(32 - 15)] | |
| mov pc, lr | mov pc, lr |
| vw0_cpu dcd i286core | |
| vw0_vramop dcd vramop | vw0_vramop dcd vramop |
| vw0_gdcs dcd gdcs | vw0_gdcs dcd gdcs |
| vw0_mem MEMADR | |
| vw0_vramupd dcd vramupdate | vw0_vramupd dcd vramupdate |
| vram_w1 ldr r2, vw1_cpu | vram_w1 add r0, r0, #VRAM_STEP |
| ldr r3, vw1_vramop | ldr r3, vw1_vramop |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | |
| sub r12, r12, r3 | |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r2, vw1_gdcs | ldr r2, vw1_gdcs |
| strb r1, [r0, r9] | |
| ldr r1, [r3, #VRAMOP_VRAMWAIT] | |
| ldr r3, vw1_vramupd | |
| mov r0, r0, lsl #(32 - 15) | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | ldrb r12, [r2, #GDCS_GRPHDISP] |
| CPUWORK r1 | |
| ldrb r1, [r3, r0, lsr #(32 - 15)] | |
| orr r12, r12, #2 | orr r12, r12, #2 |
| strb r12, [r2, #GDCS_GRPHDISP] | strb r12, [r2, #GDCS_GRPHDISP] |
| ldr r2, vw1_mem | orr r1, r1, #2 |
| strb r1, [r0, r2] | strb r1, [r3, r0, lsr #(32 - 15)] |
| ldr r2, vw1_vramupd | |
| mov r0, r0, lsl #(32 - 15) | |
| ldr r2, vw1_vramupd | |
| ldrb r12, [r2, r0, lsr #(32 - 15)] | |
| orr r12, r12, #2 | |
| strb r12, [r2, r0, lsr #(32 - 15)] | |
| mov pc, lr | mov pc, lr |
| vw1_cpu dcd i286core | |
| vw1_vramop dcd vramop | vw1_vramop dcd vramop |
| vw1_gdcs dcd gdcs | vw1_gdcs dcd gdcs |
| vw1_mem MEMADR + VRAM_STEP | |
| vw1_vramupd dcd vramupdate | vw1_vramupd dcd vramupdate |
| grcg_tdw0 mov r0, r0, lsl #(32 - 15) | grcg_tdw0 mov r0, r0, lsl #(32 - 15) |
| mov r0, r0, lsr #(32 - 15) | mov r0, r0, lsr #(32 - 15) |
| ldr r2, grw_vramupd | ldr r2, grw_vramupd |
| Line 250 grcg_tdw1 mov r0, r0, lsl #(32 - 15) | Line 211 grcg_tdw1 mov r0, r0, lsl #(32 - 15) |
| strb r12, [r2, #GDCS_GRPHDISP] | strb r12, [r2, #GDCS_GRPHDISP] |
| add r0, r0, #VRAM_STEP | add r0, r0, #VRAM_STEP |
| grcg_tdw ldr r2, grw_mem | grcg_tdw add r0, r0, #VRAM_B |
| ldr r3, grw_grcg | ldr r3, grw_grcg |
| add r0, r0, r2 | add r0, r0, r9 |
| ldrb r2, [r3, #GRCG_MODEREG] | ldrb r2, [r3, #GRCG_MODEREG] |
| orr r1, r1, r2 lsl #16 | orr r1, r1, r2 lsl #16 |
| Line 272 grcg_tdw ldr r2, grw_mem | Line 233 grcg_tdw ldr r2, grw_mem |
| ldreqb r2, [r3, #(GRCG_TILE + 6)] | ldreqb r2, [r3, #(GRCG_TILE + 6)] |
| streqb r2, [r0] | streqb r2, [r0] |
| ldr r2, grw_cpu | |
| ldr r3, grw_vramop | ldr r3, grw_vramop |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_GRCGWAIT] | ldr r3, [r3, #VRAMOP_GRCGWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| mov pc, lr | mov pc, lr |
| grcg_rmw0 cmp r1, #&ff | grcg_rmw0 cmp r1, #&ff |
| Line 312 grcg_rmw1 cmp r1, #&ff | Line 270 grcg_rmw1 cmp r1, #&ff |
| strb r12, [r2, #GDCS_GRPHDISP] | strb r12, [r2, #GDCS_GRPHDISP] |
| add r0, r0, #VRAM_STEP | add r0, r0, #VRAM_STEP |
| grcg_rmw ldr r2, grw_mem | grcg_rmw add r0, r0, #VRAM_B |
| ldr r3, grw_grcg | ldr r3, grw_grcg |
| add r0, r0, r2 | add r0, r0, r9 |
| ldrb r2, [r3, #GRCG_MODEREG] | ldrb r2, [r3, #GRCG_MODEREG] |
| orr r1, r1, r2 lsl #16 | orr r1, r1, r2 lsl #16 |
| tst r1, #(1 << 16) | tst r1, #(1 << 16) |
| Line 353 grmw_ged tst r1, #(8 << 16) | Line 311 grmw_ged tst r1, #(8 << 16) |
| orr r12, r12, r2 | orr r12, r12, r2 |
| strb r12, [r0] | strb r12, [r0] |
| grcg_clock ldr r2, grw_cpu | grcg_clock ldr r3, grw_vramop |
| ldr r3, grw_vramop | |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_GRCGWAIT] | ldr r3, [r3, #VRAMOP_GRCGWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| mov pc, lr | mov pc, lr |
| grw_vramupd dcd vramupdate | grw_vramupd dcd vramupdate |
| grw_gdcs dcd gdcs | grw_gdcs dcd gdcs |
| grw_mem MEMADR + VRAM_B | |
| grw_grcg dcd grcg | grw_grcg dcd grcg |
| grw_cpu dcd i286core | |
| grw_vramop dcd vramop | grw_vramop dcd vramop |
| ; ---- read word | |
| ; ---- write word | i286_rd ldrb r0, [r9, r0] |
| mov pc, lr | |
| vramw_w0 ldr r2, vww0_cpu | i286_rdex ldr r12, [r9, #CPU_ADRSMASK] |
| ldr r3, vww0_vramop | and r0, r12, r0 |
| ldr r12, [r2, #CPU_REMAINCLOCK] | ldrb r0, [r9, r0] |
| mov pc, lr | |
| tram_rd ldr r3, trd_vramop | |
| cmp r0, #&a4000 | |
| bcs trd_nontram | |
| ldr r12, [r3, #VRAMOP_TRAMWAIT] | |
| ldrb r0, [r9, r0] | |
| trd_wait CPUWORK r12 | |
| mov pc, lr | |
| trd_nontram ldr r12, [r3, #VRAMOP_TRAMWAIT] | |
| cmp r0, #&a5000 | |
| bcs trd_wait | |
| ldr r2, trd_cgwnd | |
| add r1, r9, #FONT_ADRS | |
| tst r0, #1 | |
| ldreq r3, [r2, #GW_LOW] | |
| ldrne r3, [r2, #GW_HIGH] | |
| and r0, r0, #(&f << 1) | |
| add r1, r0, r1 | |
| CPUWORK r12 | |
| ldrb r0, [r1, r0] | |
| mov pc, lr | |
| trd_vramop dcd vramop | |
| trd_cgwnd dcd cgwindow | |
| vram_r0 ldr r3, trd_vramop | |
| ldrb r0, [r9, r0] | |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | ldr r3, [r3, #VRAMOP_VRAMWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | mov pc, lr |
| ldr r2, vww0_gdcs | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | vram_r1 ldr r3, trd_vramop |
| orr r12, r12, #1 | add r0, r0, #VRAM_STEP |
| strb r12, [r2, #GDCS_GRPHDISP] | ldrb r0, [r0, r9] |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | |
| CPUWORK r3 | |
| mov pc, lr | |
| ; ---- write word | |
| i286w_wt add r2, r9, #1 | |
| mov r3, r1 lsr #8 | |
| strb r1, [r9, r0] | |
| strb r3, [r2, r0] | |
| mov pc, lr | |
| i286w_wtex ldr r12, [r9, #CPU_ADRSMASK] | |
| add r2, r9, #1 | |
| mov r3, r1 lsr #8 | |
| and r0, r12, r0 | |
| strb r1, [r9, r0] | |
| strb r3, [r2, r0] | |
| mov pc, lr | |
| ldr r2, vww0_mem | |
| ldr r3, vww0_vramupd | |
| mov r12, r0, lsl #(32 - 15) | |
| add r3, r3, r12, lsr #(32 - 15) | |
| vramw_w0 ldr r3, vww0_vramop | |
| ldr r2, vww0_gdcs | |
| tst r0, #1 | tst r0, #1 |
| bne vww0_odd | bne vww0_odd |
| strh r1, [r0, r2] | strh r1, [r0, r9] |
| ldr r1, [r3, #VRAMOP_VRAMWAIT] | |
| ldr r3, vww0_vramupd | |
| mov r0, r0 lsl #(32 - 15) | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | |
| add r3, r3, r0 lsr #(32 - 15) | |
| CPUWORK r1 | |
| ldrh r1, [r3] | ldrh r1, [r3] |
| orr r12, r12, #1 | |
| strb r12, [r2, #GDCS_GRPHDISP] | |
| orr r1, r1, #1 | orr r1, r1, #1 |
| orr r1, r1, #(1 << 8) | orr r1, r1, #(1 << 8) |
| strh r1, [r3] | strh r1, [r3] |
| mov pc, lr | mov pc, lr |
| vww0_odd add r2, r2, r0 | |
| strb r1, [r2] | |
| mov r1, r1, lsr #8 | |
| strb r1, [r2, #1] | |
| ldrb r12, [r3] | |
| orr r12, r12, #1 | |
| strb r12, [r3] | |
| ldrb r12, [r3, #1] | |
| orr r12, r12, #1 | |
| strb r12, [r3, #1] | |
| mov pc, lr | |
| vww0_cpu dcd i286core | |
| vww0_vramop dcd vramop | vww0_vramop dcd vramop |
| vww0_gdcs dcd gdcs | vww0_gdcs dcd gdcs |
| vww0_mem MEMADR | |
| vww0_vramupd dcd vramupdate | vww0_vramupd dcd vramupdate |
| vww0_odd add r12, r0, r9 | |
| vramw_w1 ldr r2, vww1_cpu | strb r1, [r0, r9] |
| ldr r3, vww1_vramop | mov r1, r1 lsr #8 |
| ldr r12, [r2, #CPU_REMAINCLOCK] | strb r1, [r12, #1] |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | ldr r1, [r3, #VRAMOP_VRAMWAIT] |
| sub r12, r12, r3 | ldr r3, vww0_vramupd |
| str r12, [r2, #CPU_REMAINCLOCK] | mov r0, r0, lsl #(32 - 15) |
| ldr r2, vww1_gdcs | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | ldrb r12, [r2, #GDCS_GRPHDISP] |
| orr r12, r12, #2 | add r3, r3, r0 lsr #(32 - 15) |
| CPUWORK r1 | |
| ldrb r0, [r3] | |
| ldrb r1, [r3, #1] | |
| orr r12, r12, #1 | |
| strb r12, [r2, #GDCS_GRPHDISP] | strb r12, [r2, #GDCS_GRPHDISP] |
| orr r0, r0, #1 | |
| orr r1, r1, #1 | |
| strb r0, [r3] | |
| strb r1, [r3, #1] | |
| mov pc, lr | |
| ldr r2, vww1_mem | vramw_w1 add r0, r0, #VRAM_STEP |
| ldr r3, vww1_vramupd | ldr r3, vww1_vramop |
| mov r12, r0, lsl #(32 - 15) | ldr r2, vww1_gdcs |
| add r3, r3, r12, lsr #(32 - 15) | |
| tst r0, #1 | tst r0, #1 |
| bne vww1_odd | bne vww1_odd |
| strh r1, [r0, r2] | strh r1, [r0, r9] |
| ldr r1, [r3, #VRAMOP_VRAMWAIT] | |
| ldr r3, vww1_vramupd | |
| mov r0, r0 lsl #(32 - 15) | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | |
| add r3, r3, r0 lsr #(32 - 15) | |
| CPUWORK r1 | |
| ldrh r1, [r3] | ldrh r1, [r3] |
| orr r12, r12, #2 | |
| strb r12, [r2, #GDCS_GRPHDISP] | |
| orr r1, r1, #2 | orr r1, r1, #2 |
| orr r1, r1, #(2 << 8) | orr r1, r1, #(2 << 8) |
| strh r1, [r3] | strh r1, [r3] |
| mov pc, lr | mov pc, lr |
| vww1_odd add r2, r2, r0 | |
| strb r1, [r2] | |
| mov r1, r1, lsr #8 | |
| strb r1, [r2, #1] | |
| ldrb r12, [r3] | |
| orr r12, r12, #2 | |
| strb r12, [r3] | |
| ldrb r12, [r3, #1] | |
| orr r12, r12, #2 | |
| strb r12, [r3, #1] | |
| mov pc, lr | |
| vww1_cpu dcd i286core | |
| vww1_vramop dcd vramop | vww1_vramop dcd vramop |
| vww1_gdcs dcd gdcs | vww1_gdcs dcd gdcs |
| vww1_mem MEMADR + VRAM_STEP | |
| vww1_vramupd dcd vramupdate | vww1_vramupd dcd vramupdate |
| vww1_odd add r12, r0, r9 | |
| strb r1, [r0, r9] | |
| mov r1, r1 lsr #8 | |
| strb r1, [r12, #1] | |
| ldr r1, [r3, #VRAMOP_VRAMWAIT] | |
| ldr r3, vww1_vramupd | |
| mov r0, r0, lsl #(32 - 15) | |
| ldrb r12, [r2, #GDCS_GRPHDISP] | |
| add r3, r3, r0 lsr #(32 - 15) | |
| CPUWORK r1 | |
| ldrb r0, [r3] | |
| ldrb r1, [r3, #1] | |
| orr r12, r12, #2 | |
| strb r12, [r2, #GDCS_GRPHDISP] | |
| orr r0, r0, #2 | |
| orr r1, r1, #2 | |
| strb r0, [r3] | |
| strb r1, [r3, #1] | |
| mov pc, lr | |
| grcgw_tdw0 ldr r2, grww_gdcs | grcgw_tdw0 ldr r2, grww_gdcs |
| Line 488 grcgw_tdw1 ldr r2, grww_gdcs | Line 502 grcgw_tdw1 ldr r2, grww_gdcs |
| orr r12, r12, #2 | orr r12, r12, #2 |
| strb r12, [r2, #1] | strb r12, [r2, #1] |
| add r0, r0, #VRAM_STEP | add r0, r0, #VRAM_STEP |
| grcgw_tdw ldr r2, grww_mem | grcgw_tdw add r2, r9, #VRAM_B |
| ldr r3, grww_grcg | ldr r3, grww_grcg |
| add r0, r0, r2 | add r0, r0, r2 |
| ldrb r2, [r3, #GRCG_MODEREG] | ldrb r2, [r3, #GRCG_MODEREG] |
| Line 512 grcgw_tdw ldr r2, grww_mem | Line 526 grcgw_tdw ldr r2, grww_mem |
| ldreqb r2, [r3, #(GRCG_TILE + 6)] | ldreqb r2, [r3, #(GRCG_TILE + 6)] |
| streqb r2, [r0] | streqb r2, [r0] |
| streqb r2, [r0, #1] | streqb r2, [r0, #1] |
| ldr r2, grww_cpu | |
| ldr r3, grww_vramop | ldr r3, grww_vramop |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_GRCGWAIT] | ldr r3, [r3, #VRAMOP_GRCGWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| mov pc, lr | mov pc, lr |
| grcgw_rmw0 add r2, r1, #1 | grcgw_rmw0 add r2, r1, #1 |
| Line 561 grcgw_rmw1 add r2, r1, #1 | Line 572 grcgw_rmw1 add r2, r1, #1 |
| strh r12, [r2, r0] | strh r12, [r2, r0] |
| add r0, r0, #VRAM_STEP | add r0, r0, #VRAM_STEP |
| grcge_rmw ldr r2, grww_mem | grcge_rmw add r2, r9, #VRAM_B |
| ldr r3, grww_grcg | ldr r3, grww_grcg |
| add r0, r0, r2 | add r0, r0, r2 |
| ldrb r2, [r3, #GRCG_MODEREG] | ldrb r2, [r3, #GRCG_MODEREG] |
| Line 601 grmwe_ged tst r1, #(8 << 16) | Line 612 grmwe_ged tst r1, #(8 << 16) |
| bic r12, r12, r1 | bic r12, r12, r1 |
| orr r12, r12, r2 | orr r12, r12, r2 |
| strh r12, [r0] | strh r12, [r0] |
| grmwe_eed ldr r2, grww_cpu | grmwe_eed ldr r3, grww_vramop |
| ldr r3, grww_vramop | |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_GRCGWAIT] | ldr r3, [r3, #VRAMOP_GRCGWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | |
| mov pc, lr | mov pc, lr |
| grww_gdcs dcd gdcs | grww_gdcs dcd gdcs |
| grww_vramupd dcd vramupdate | grww_vramupd dcd vramupdate |
| grww_mem MEMADR + VRAM_B | |
| grww_grcg dcd grcg | grww_grcg dcd grcg |
| grww_cpu dcd i286core | |
| grww_vramop dcd vramop | grww_vramop dcd vramop |
| grcgo_rmw0 add r2, r2, r0 | grcgo_rmw0 add r2, r2, r0 |
| Line 634 grcgo_rmw1 add r2, r2, r0 | Line 640 grcgo_rmw1 add r2, r2, r0 |
| strb r12, [r2, #1] | strb r12, [r2, #1] |
| add r0, r0, #VRAM_STEP | add r0, r0, #VRAM_STEP |
| grcgo_rmw ldr r2, grww_mem | grcgo_rmw add r2, r9, #VRAM_B |
| ldr r3, grww_grcg | ldr r3, grww_grcg |
| add r0, r0, r2 | add r0, r0, r2 |
| ldrb r2, [r3, #GRCG_MODEREG] | ldrb r2, [r3, #GRCG_MODEREG] |
| Line 698 grmwo_ged tst r1, #(8 << 16) | Line 704 grmwo_ged tst r1, #(8 << 16) |
| orr r12, r12, r2 lsr #8 | orr r12, r12, r2 lsr #8 |
| strb r12, [r0, #1] | strb r12, [r0, #1] |
| grcgw_clock ldr r2, grww_cpu | grcgw_clock ldr r3, grww_vramop |
| ldr r3, grww_vramop | |
| ldr r12, [r2, #CPU_REMAINCLOCK] | |
| ldr r3, [r3, #VRAMOP_GRCGWAIT] | ldr r3, [r3, #VRAMOP_GRCGWAIT] |
| sub r12, r12, r3 | CPUWORK r3 |
| str r12, [r2, #CPU_REMAINCLOCK] | mov pc, lr |
| ; ---- read word | |
| i286w_rd add r2, r9, #1 | |
| ldrb r1, [r9, r0] | |
| ldrb r3, [r2, r0] | |
| orr r0, r1, r3 lsl #8 | |
| mov pc, lr | |
| i286w_rdex ldr r12, [r9, #CPU_ADRSMASK] | |
| add r2, r9, #1 | |
| and r0, r12, r0 | |
| ldrb r1, [r9, r0] | |
| ldrb r3, [r2, r0] | |
| orr r0, r1, r3 lsl #8 | |
| mov pc, lr | |
| tramw_rd | |
| twrd_vramop dcd vramop | |
| vramw_r1 add r0, r0, #VRAM_STEP | |
| vramw_r0 ldr r3, twrd_vramop | |
| add r2, r9, r0 | |
| ldrb r0, [r9, r0] | |
| ldr r3, [r3, #VRAMOP_VRAMWAIT] | |
| ldrb r1, [r2, #1] | |
| CPUWORK r3 | |
| mov r0, r0, r1 lsl #1 | |
| mov pc, lr | mov pc, lr |
| Line 713 i286_nonram_r mov r0, #&ff | Line 746 i286_nonram_r mov r0, #&ff |
| mov pc, lr | mov pc, lr |
| i286_nonram_rw mov r0, #&ff | i286_nonram_rw mov r0, #&ff |
| add r0, r0, #&ff00 | orr r0, r0, #&ff00 |
| mov pc, lr | mov pc, lr |