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| version 1.7, 2003/12/20 11:49:47 | version 1.12, 2005/02/08 10:34:30 |
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| Line 6 | Line 6 |
| IMPORT vramupdate | IMPORT vramupdate |
| IMPORT tramupdate | IMPORT tramupdate |
| IMPORT egc_write | IMPORT memegc_wr8 |
| IMPORT egc_read | IMPORT memegc_rd8 |
| IMPORT egc_write_w | IMPORT memegc_wr16 |
| IMPORT egc_read_w | IMPORT memegc_rd16 |
| EXPORT memfn | EXPORT memfn |
| EXPORT i286_memorymap | |
| EXPORT i286_vram_dispatch | EXPORT i286_vram_dispatch |
| EXPORT i286_nonram_r | EXPORT i286_nonram_r |
| Line 50 memfn dcd i286_rdex ; 00 | Line 51 memfn dcd i286_rdex ; 00 |
| dcd vram_r0 ; e0 | dcd vram_r0 ; e0 |
| dcd i286_rd | dcd i286_rd |
| dcd i286_rd | dcd i286_rd |
| dcd i286_itf | dcd i286_rb |
| dcd i286_wtex ; 00 | dcd i286_wtex ; 00 |
| dcd i286_wtex | dcd i286_wtex |
| Line 116 memfn dcd i286_rdex ; 00 | Line 117 memfn dcd i286_rdex ; 00 |
| dcd vramw_r0 ; e0 | dcd vramw_r0 ; e0 |
| dcd i286w_rd | dcd i286w_rd |
| dcd i286w_rd | dcd i286w_rd |
| dcd i286w_itf | dcd i286w_rb |
| dcd i286w_wtex ; 00 | dcd i286w_wtex ; 00 |
| dcd i286w_wtex | dcd i286w_wtex |
| Line 993 grcgw_clock ;; ldr r3, grww_vramop | Line 994 grcgw_clock ;; ldr r3, grww_vramop |
| mov pc, lr | mov pc, lr |
| ; ---- egc | ; ---- egc |
| egc_rd ldrb r3, [r9, #MEMWAIT_GRCG] | egc_rd ldrb r3, [r9, #MEMWAIT_GRCG] |
| CPUWORK r3 | CPUWORK r3 |
| b egc_read | b memegc_rd8 |
| egcw_rd ldrb r3, [r9, #MEMWAIT_GRCG] | egcw_rd ldrb r3, [r9, #MEMWAIT_GRCG] |
| ldrb r2, egcwrd_egc | ldrb r2, egcwrd_egc |
| tst r0, #1 | tst r0, #1 |
| CPUWORK r3 | CPUWORK r3 |
| beq egc_read_w | beq memegc_rd16 |
| ldrh r12, [r2, #EGC_SFT] | ldrh r12, [r2, #EGC_SFT] |
| tst r12, #&1000 | tst r12, #&1000 |
| bne egcwrd_std | bne egcwrd_std |
| add r2, r0, #1 | add r2, r0, #1 |
| mov r3, r1 lsr #8 | mov r3, r1 lsr #8 |
| stmdb sp!, {r2, r3, lr} | stmdb sp!, {r2, r3, lr} |
| bl egc_write | bl memegc_wr8 |
| ldmia sp!, {r0, r1, lr} | ldmia sp!, {r0, r1, lr} |
| b egc_write | b memegc_wr8 |
| egcwrd_std stmdb sp!, {r0, r1, lr} | egcwrd_std stmdb sp!, {r0, r1, lr} |
| add r0, r0, #1 | add r0, r0, #1 |
| mov r1, r1 lsr #8 | mov r1, r1 lsr #8 |
| bl egc_write | bl memegc_wr8 |
| ldmia sp!, {r0, r1, lr} | ldmia sp!, {r0, r1, lr} |
| b egc_write | b memegc_wr8 |
| egcwrd_egc dcd egc | egcwrd_egc dcd egc |
| egc_wt ldrb r3, [r9, #MEMWAIT_GRCG] | egc_wt ldrb r3, [r9, #MEMWAIT_GRCG] |
| CPUWORK r3 | CPUWORK r3 |
| b egc_write | b memegc_wr8 |
| egcw_wt ldrb r3, [r9, #MEMWAIT_GRCG] | egcw_wt ldrb r3, [r9, #MEMWAIT_GRCG] |
| ldrb r2, egcwwt_egc | ldrb r2, egcwwt_egc |
| tst r0, #1 | tst r0, #1 |
| CPUWORK r3 | CPUWORK r3 |
| beq egc_write_w | beq memegc_wr16 |
| ldrh r12, [r2, #EGC_SFT] | ldrh r12, [r2, #EGC_SFT] |
| stmdb sp!, {r4, r5, lr} | stmdb sp!, {r4, r5, lr} |
| tst r12, #&1000 | tst r12, #&1000 |
| bne egcwwt_std | bne egcwwt_std |
| add r4, r0, #1 | add r4, r0, #1 |
| mov r5, r1 lsr #8 | mov r5, r1 lsr #8 |
| bl egc_read | bl memegc_rd8 |
| mov r1, r5 | mov r1, r5 |
| mov r5, r0 | mov r5, r0 |
| mov r0, r4 | mov r0, r4 |
| bl egc_read | bl memegc_rd8 |
| orr r0, r5, r0 lsl #8 | orr r0, r5, r0 lsl #8 |
| ldmia sp!, {r4, r5, lr} | ldmia sp!, {r4, r5, lr} |
| egcwwt_std mov r4, r0 | egcwwt_std mov r4, r0 |
| mov r5, r1 | mov r5, r1 |
| add r0, r0, #1 | add r0, r0, #1 |
| mov r1, r1 lsr #8 | mov r1, r1 lsr #8 |
| bl egc_read | bl memegc_rd8 |
| mov r1, r5 | mov r1, r5 |
| mov r5, r0 | mov r5, r0 |
| mov r0, r4 | mov r0, r4 |
| bl egc_read | bl memegc_rd8 |
| orr r0, r5, r0 lsl #8 | orr r0, r5, r0 lsl #8 |
| ldmia sp!, {r4, r5, lr} | ldmia sp!, {r4, r5, lr} |
| egcwwt_egc dcd egc | egcwwt_egc dcd egc |
| Line 1062 egcwwt_egc dcd egc | Line 1062 egcwwt_egc dcd egc |
| ; ---- emmc | ; ---- emmc |
| emmc_rd ldr r2, emrd_extmempp | emmc_rd add r2, r9, #CPU_EMS |
| and r3, r0, #(3 << 14) | and r3, r0, #(3 << 14) |
| ldr r2, [r2, r3 lsr #(14 - 2)] | ldr r2, [r2, r3 lsr #(14 - 2)] |
| mov r0, r0 lsl #(32 - 14) | mov r0, r0 lsl #(32 - 14) |
| ldrb r0, [r2, r0 lsr #(32 - 14)] | ldrb r0, [r2, r0 lsr #(32 - 14)] |
| mov pc, lr | mov pc, lr |
| emrd_extmempp dcd extmem + EM_PAGEPTR | |
| emmc_wt ldr r2, emwt_extmempp | emmc_wt add r2, r9, #CPU_EMS |
| and r3, r0, #(3 << 14) | and r3, r0, #(3 << 14) |
| ldr r2, [r2, r3 lsr #(14 - 2)] | ldr r2, [r2, r3 lsr #(14 - 2)] |
| mov r0, r0 lsl #(32 - 14) | mov r0, r0 lsl #(32 - 14) |
| strb r1, [r2, r0 lsr #(32 - 14)] | strb r1, [r2, r0 lsr #(32 - 14)] |
| mov pc, lr | mov pc, lr |
| emwt_extmempp dcd extmem + EM_PAGEPTR | |
| emmcw_rd ldr r2, emwrd_extmempp | emmcw_rd add r2, r9, #CPU_EMS |
| and r12, r0, #(3 << 14) | and r12, r0, #(3 << 14) |
| mov r0, r0 lsl #(32 - 14) | mov r0, r0 lsl #(32 - 14) |
| ldr r3, [r2, r12 lsr #(14 - 2)] | ldr r3, [r2, r12 lsr #(14 - 2)] |
| Line 1089 emmcw_rd ldr r2, emwrd_extmempp | Line 1086 emmcw_rd ldr r2, emwrd_extmempp |
| add r3, r3, r0 lsr #(32 - 14) | add r3, r3, r0 lsr #(32 - 14) |
| ldrh r0, [r3] | ldrh r0, [r3] |
| mov pc, lr | mov pc, lr |
| emwrd_extmempp dcd extmem + EM_PAGEPTR | |
| emmcw_rd_odd ldrb r1, [r3, r0 lsr #(32 - 14)] | emmcw_rd_odd ldrb r1, [r3, r0 lsr #(32 - 14)] |
| adds r0, r0, #(1 << (32 - 14)) | adds r0, r0, #(1 << (32 - 14)) |
| beq emmcw_rd_3fff | beq emmcw_rd_3fff |
| Line 1103 emmcw_rd_3fff eor r12, r12, #(1 << 14) | Line 1099 emmcw_rd_3fff eor r12, r12, #(1 << 14) |
| mov pc, lr | mov pc, lr |
| emmcw_wt add r2, r9, #CPU_EMS | |
| emmcw_wt ldr r2, emwwt_extmempp | |
| and r12, r0, #(3 << 14) | and r12, r0, #(3 << 14) |
| mov r0, r0 lsl #(32 - 14) | mov r0, r0 lsl #(32 - 14) |
| ldr r3, [r2, r12 lsr #(14 - 2)] | ldr r3, [r2, r12 lsr #(14 - 2)] |
| Line 1114 emmcw_wt ldr r2, emwwt_extmempp | Line 1108 emmcw_wt ldr r2, emwwt_extmempp |
| add r3, r3, r0 lsr #(32 - 14) | add r3, r3, r0 lsr #(32 - 14) |
| strh r1, [r3] | strh r1, [r3] |
| mov pc, lr | mov pc, lr |
| emwwt_extmempp dcd extmem + EM_PAGEPTR | |
| emmcw_wt_odd strb r1, [r3, r0 lsr #(32 - 14)] | emmcw_wt_odd strb r1, [r3, r0 lsr #(32 - 14)] |
| mov r1, r1 lsr #8 | mov r1, r1 lsr #8 |
| adds r0, r0, #(1 << (32 - 14)) | adds r0, r0, #(1 << (32 - 14)) |
| Line 1129 emmcw_wt_3fff eor r12, r12, #(1 << 14) | Line 1122 emmcw_wt_3fff eor r12, r12, #(1 << 14) |
| ; ---- itf | ; ---- itf |
| i286_itf ldrb r2, [r9, #CPU_ITFBANK] | i286_rb ldrb r2, [r9, #CPU_ITFBANK] |
| mov r3, r0 lsl #(32 - 15) | orr r12, r0, #VRAM_STEP |
| add r12, r9, #ITF_ADRS | cmp r2, #0 |
| ldreqb r0, [r0, r9] | |
| ldrneb r0, [r12, r9] | |
| mov pc, lr | |
| i286_wb ldrb r2, [r9, #CPU_ITFBANK] | |
| orr r12, r0, #(&1c8000 - &0e8000) | |
| cmp r2, #0 | cmp r2, #0 |
| ldreqb r0, [r9, r0] | streqb r1, [r0, r9] |
| ldrneb r0, [r12, r3 lsr #(32 - 15)] | strneb r1, [r12, r9] |
| mov pc, lr | mov pc, lr |
| i286w_itf ldrb r2, [r9, #CPU_ITFBANK] | i286w_rb ldrb r2, [r9, #CPU_ITFBANK] |
| tst r0, #1 | tst r0, #1 |
| bne i286w_itf_odd | bne i286w_rb_odd |
| cmp r2, #0 | cmp r2, #0 |
| orrne r0, r0, #VRAM_STEP | orrne r0, r0, #VRAM_STEP |
| ldrh r0, [r0, r9] | ldrh r0, [r0, r9] |
| mov pc, lr | mov pc, lr |
| i286w_itf_odd cmp r2, #0 | i286w_rb_odd cmp r2, #0 |
| orrne r0, r0, #VRAM_STEP | orrne r0, r0, #VRAM_STEP |
| add r2, r0, #1 | add r2, r0, #1 |
| ldrb r0, [r0, r9] | ldrb r0, [r0, r9] |
| Line 1154 i286w_itf_odd cmp r2, #0 | Line 1154 i286w_itf_odd cmp r2, #0 |
| mov pc, lr | mov pc, lr |
| i286w_wb ldrb r2, [r9, #CPU_ITFBANK] | |
| tst r0, #1 | |
| bne i286w_wb_odd | |
| cmp r2, #0 | |
| addne r0, r0, #(&1c8000 - &0e8000) | |
| strh r1, [r0, r9] | |
| mov pc, lr | |
| i286w_wb_odd cmp r2, #0 | |
| addne r0, r0, #(&1c8000 - &0e8000) | |
| mov r3, r1 lsr #8 | |
| add r2, r0, #1 | |
| strb r1, [r0, r9] | |
| strb r3, [r2, r9] | |
| mov pc, lr | |
| ; ---- other | ; ---- other |
| Line 1165 i286_wn mov pc, lr | Line 1181 i286_wn mov pc, lr |
| ; ---- dispatch | ; ---- dispatch |
| i286_memorymap | |
| ldr r3, i2mm_memfn | |
| and r1, r0, #1 | |
| adr r2, mmaptbl | |
| add r12, r2, r1 lsl #5 | |
| ldr r1, [r2, r1 lsl #5] | |
| ldr r2, [r12, #4] | |
| str r1, [r3, #((0 * 32) + (0xe8000 >> (15 - 2)))] | |
| str r1, [r3, #((0 * 32) + (0xf0000 >> (15 - 2)))] | |
| str r2, [r3, #((0 * 32) + (0xf8000 >> (15 - 2)))] | |
| ldr r1, [r12, #8] | |
| ldr r2, [r12, #12] | |
| str r1, [r3, #((4 * 32) + (0xd0000 >> (15 - 2)))] | |
| str r1, [r3, #((4 * 32) + (0xd8000 >> (15 - 2)))] | |
| str r2, [r3, #((4 * 32) + (0xe8000 >> (15 - 2)))] | |
| str r2, [r3, #((4 * 32) + (0xf0000 >> (15 - 2)))] | |
| str r2, [r3, #((4 * 32) + (0xf8000 >> (15 - 2)))] | |
| ldr r1, [r12, #16] | |
| ldr r2, [r12, #20] | |
| str r1, [r3, #((8 * 32) + (0xe8000 >> (15 - 2)))] | |
| str r1, [r3, #((8 * 32) + (0xf0000 >> (15 - 2)))] | |
| str r2, [r3, #((8 * 32) + (0xf8000 >> (15 - 2)))] | |
| ldr r1, [r12, #24] | |
| ldr r2, [r12, #28] | |
| str r1, [r3, #((12 * 32) + (0xd0000 >> (15 - 2)))] | |
| str r1, [r3, #((12 * 32) + (0xd8000 >> (15 - 2)))] | |
| str r2, [r3, #((12 * 32) + (0xe8000 >> (15 - 2)))] | |
| str r2, [r3, #((12 * 32) + (0xf0000 >> (15 - 2)))] | |
| str r2, [r3, #((12 * 32) + (0xf8000 >> (15 - 2)))] | |
| mov pc, lr | |
| i2mm_memfn dcd memfn | |
| mmaptbl dcd i286_rd ; NEC | |
| dcd i286_rb | |
| dcd i286_wn | |
| dcd i286_wn | |
| dcd i286w_rd | |
| dcd i286w_rb | |
| dcd i286_wn | |
| dcd i286_wn | |
| dcd i286_rb ; EPSON | |
| dcd i286_rb | |
| dcd i286_wt | |
| dcd i286_wb | |
| dcd i286w_rb | |
| dcd i286w_rb | |
| dcd i286w_wt | |
| dcd i286w_wb | |
| i286_vram_dispatch | i286_vram_dispatch |
| ldr r3, i2vd_memfn | ldr r3, i2vd_memfn |
| and r1, r0, #15 | and r1, r0, #15 |