| version 1.1, 2003/10/16 17:57:49 | version 1.3, 2003/11/29 00:36:00 | 
| Line 33  void dmap_i286(void) { | Line 33  void dmap_i286(void) { | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| ch->outproc(i286_memoryread(ch->adrs.d)); | ch->outproc((BYTE)i286_memoryread(ch->adrs.d)); | 
 | break; | break; | 
 | } | } | 
| ch->adrs.d += (((ch->mode) & 0x20)?-1:1); | ch->adrs.d += ((ch->mode & 0x20)?-1:1); | 
|  | } | 
|  | ch++; | 
|  | bit <<= 1; | 
|  | } while(bit & 0x0f); | 
|  | } | 
|  | } | 
|  |  | 
|  | void dmap_v30(void) { | 
|  |  | 
|  | DMACH   ch; | 
|  | int             bit; | 
|  |  | 
|  | if (dmac.working) { | 
|  | ch = dmac.dmach; | 
|  | bit = 1; | 
|  | do { | 
|  | if (dmac.working & bit) { | 
|  | // DMA working ! | 
|  | if (!ch->leng.w) { | 
|  | dmac.stat |= bit; | 
|  | dmac.working &= ~bit; | 
|  | ch->extproc(DMAEXT_END); | 
|  | } | 
|  | ch->leng.w--; | 
|  |  | 
|  | switch(ch->mode & 0x0c) { | 
|  | case 0x00:              // verifty | 
|  | ch->inproc(); | 
|  | break; | 
|  |  | 
|  | case 0x04:              // port->mem | 
|  | i286_memorywrite(ch->adrs.d, ch->inproc()); | 
|  | break; | 
|  |  | 
|  | default: | 
|  | ch->outproc((BYTE)i286_memoryread(ch->adrs.d)); | 
|  | break; | 
|  | } | 
|  | ch->adrs.w[DMA16_LOW] += ((ch->mode & 0x20)?-1:1); | 
 | } | } | 
 | ch++; | ch++; | 
 | bit <<= 1; | bit <<= 1; |