np2/i286c/egcmem.c - diff

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Diff for /np2/i286c/Attic/egcmem.c between versions 1.2 and 1.7

version 1.2, 2003/10/18 00:35:35	version 1.7, 2003/12/12 01:04:40
Line 1	Line 1
#include "compiler.h"	#include "compiler.h"
#include "memory.h"	#include "cpucore.h"
#include "egcmem.h"	#include "egcmem.h"
#include "pccore.h"	#include "pccore.h"
#include "iocore.h"	#include "iocore.h"
#include "vram.h"	#include "vram.h"


// エンディアン修正しる！

// C版EGCのみ ROPの回数を記録する	// C版EGCのみ ROPの回数を記録する
// #define LOG_EGCROP	// #define LOG_EGCROP


	enum {
	EGCADDR_L = 0,
	EGCADDR_H = 1
	};
	#define EGCADDR(a) (a)



static EGCQUAD egc_src;	static EGCQUAD egc_src;
static EGCQUAD data;	static EGCQUAD data;

Line 53 void egcshift(void) {	Line 59 void egcshift(void) {

BYTE src8, dst8;	BYTE src8, dst8;

egc.remain = (egc.leng & 0xfff) + 1;	egc.remain = LOW12(egc.leng) + 1;
egc.func = (egc.sft >> 12) & 1;	egc.func = (egc.sft >> 12) & 1;
if (!egc.func) {	if (!egc.func) {
egc.inptr = egc.buf;	egc.inptr = egc.buf;
Line 695 static void shiftinput_decw(void) {	Line 701 static void shiftinput_decw(void) {
}	}


static void gdc_ope(UINT32 ad, UINT16 value, int func) {	static void gdc_ope(UINT32 ad, REG16 value, int func) {

EGCQUAD pat;	EGCQUAD pat;
EGCQUAD dst;	EGCQUAD dst;
Line 794 static void gdc_ope(UINT32 ad, UINT16 va	Line 800 static void gdc_ope(UINT32 ad, UINT16 va
}	}
break;	break;
default:	default:
data.w[0] = value;	#if defined(BYTESEX_LITTLE)
data.w[1] = value;	data.w[0] = (UINT16)value;
data.w[2] = value;	data.w[1] = (UINT16)value;
data.w[3] = value;	data.w[2] = (UINT16)value;
	data.w[3] = (UINT16)value;
	#else
	data._b[0][0] = (BYTE)value;
	data._b[0][1] = (BYTE)(value >> 8);
	data.w[1] = data.w[0];
	data.w[2] = data.w[0];
	data.w[3] = data.w[0];
	#endif
break;	break;
}	}
}	}

BYTE MEMCALL egc_read(UINT32 addr) {	REG8 MEMCALL egc_read(UINT32 addr) {

UINT32 ad;	UINT32 ad;
UINT ext;	UINT ext;
Line 810 BYTE MEMCALL egc_read(UINT32 addr) {	Line 824 BYTE MEMCALL egc_read(UINT32 addr) {
if (gdcs.access) {	if (gdcs.access) {
addr += VRAM_STEP;	addr += VRAM_STEP;
}	}
ad = VRAM_POS(addr);	ad = VRAMADDRMASKEX(addr);
ext = EGCADDR(addr & 1);	ext = EGCADDR(addr & 1);
egc.lastvram._b[0][ext] = mem[ad + VRAM_B];	egc.lastvram._b[0][ext] = mem[ad + VRAM_B];
egc.lastvram._b[1][ext] = mem[ad + VRAM_R];	egc.lastvram._b[1][ext] = mem[ad + VRAM_R];
Line 845 BYTE MEMCALL egc_read(UINT32 addr) {	Line 859 BYTE MEMCALL egc_read(UINT32 addr) {
}	}


void MEMCALL egc_write(UINT32 addr, BYTE value) {	void MEMCALL egc_write(UINT32 addr, REG8 value) {

UINT ext;	UINT ext;
UINT16 wvalue;	REG16 wvalue;

addr &= 0x7fff;	addr = LOW15(addr);
ext = EGCADDR(addr & 1);	ext = EGCADDR(addr & 1);
if (!gdcs.access) {	if (!gdcs.access) {
gdcs.grphdisp \|= 1;	gdcs.grphdisp \|= 1;
Line 868 void MEMCALL egc_write(UINT32 addr, BYTE	Line 882 void MEMCALL egc_write(UINT32 addr, BYTE
egc.patreg._b[3][ext] = mem[addr + VRAM_E];	egc.patreg._b[3][ext] = mem[addr + VRAM_E];
}	}

wvalue = (value << 8) \| (value); // ver0.28/pr4	value = (BYTE)value;
	wvalue = (value << 8) + value;
if (!ext) {	if (!ext) {
gdc_ope(addr, wvalue, egc.func + 6);	gdc_ope(addr, wvalue, egc.func + 6);
}	}
Line 895 void MEMCALL egc_write(UINT32 addr, BYTE	Line 910 void MEMCALL egc_write(UINT32 addr, BYTE
}	}
}	}

UINT16 MEMCALL egc_read_w(UINT32 addr) {	REG16 MEMCALL egc_read_w(UINT32 addr) {

UINT32 ad;	UINT32 ad;

Line 903 UINT16 MEMCALL egc_read_w(UINT32 addr) {	Line 918 UINT16 MEMCALL egc_read_w(UINT32 addr) {
if (gdcs.access) {	if (gdcs.access) {
addr += VRAM_STEP;	addr += VRAM_STEP;
}	}
ad = VRAM_POS(addr);	ad = VRAMADDRMASKEX(addr);
egc.lastvram.w[0] = (UINT16 )(&mem[ad + VRAM_B]);	egc.lastvram.w[0] = (UINT16 )(&mem[ad + VRAM_B]);
egc.lastvram.w[1] = (UINT16 )(&mem[ad + VRAM_R]);	egc.lastvram.w[1] = (UINT16 )(&mem[ad + VRAM_R]);
egc.lastvram.w[2] = (UINT16 )(&mem[ad + VRAM_G]);	egc.lastvram.w[2] = (UINT16 )(&mem[ad + VRAM_G]);
Line 942 UINT16 MEMCALL egc_read_w(UINT32 addr) {	Line 957 UINT16 MEMCALL egc_read_w(UINT32 addr) {
if (!(egc.ope & 0x2000)) {	if (!(egc.ope & 0x2000)) {
int pl = (egc.fgbg >> 8) & 3;	int pl = (egc.fgbg >> 8) & 3;
if (!(egc.ope & 0x400)) {	if (!(egc.ope & 0x400)) {
return(egc_src.w[pl]);	return(LOADINTELWORD(egc_src._b[pl]));
}	}
else {	else {
return(LOADINTELWORD(mem + ad + planead[pl]));	return(LOADINTELWORD(mem + ad + planead[pl]));
Line 951 UINT16 MEMCALL egc_read_w(UINT32 addr) {	Line 966 UINT16 MEMCALL egc_read_w(UINT32 addr) {
return(LOADINTELWORD(mem + addr));	return(LOADINTELWORD(mem + addr));
}	}
else if (!(egc.sft & 0x1000)) {	else if (!(egc.sft & 0x1000)) {
UINT16 ret;	REG16 ret;
ret = egc_read(addr);	ret = egc_read(addr);
ret \|= egc_read(addr+1) << 8;	ret \|= egc_read(addr+1) << 8;
return(ret);	return(ret);
}	}
else {	else {
UINT16 ret;	REG16 ret;
ret = egc_read(addr+1) << 8;	ret = egc_read(addr+1) << 8;
ret \|= egc_read(addr);	ret \|= egc_read(addr);
return(ret);	return(ret);
}	}
}	}

void MEMCALL egc_write_w(UINT32 addr, UINT16 value) {	void MEMCALL egc_write_w(UINT32 addr, REG16 value) {

if (!(addr & 1)) { // word access	if (!(addr & 1)) { // word access
addr &= 0x7ffe;	addr = LOW15(addr);
if (!gdcs.access) {	if (!gdcs.access) {
gdcs.grphdisp \|= 1;	gdcs.grphdisp \|= 1;
(UINT16 )(vramupdate + addr) \|= 0x0101;	(UINT16 )(vramupdate + addr) \|= 0x0101;
Line 1004 void MEMCALL egc_write_w(UINT32 addr, UI	Line 1019 void MEMCALL egc_write_w(UINT32 addr, UI
}	}
}	}
else if (!(egc.sft & 0x1000)) {	else if (!(egc.sft & 0x1000)) {
egc_write(addr, (BYTE)value);	egc_write(addr, (REG8)value);
egc_write(addr+1, (BYTE)(value >> 8));	egc_write(addr+1, (REG8)(value >> 8));
}	}
else {	else {
egc_write(addr+1, (BYTE)(value >> 8));	egc_write(addr+1, (REG8)(value >> 8));
egc_write(addr, (BYTE)value);	egc_write(addr, (REG8)value);
}	}
}	}

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	Added in v.1.7