--- np2/i286c/cpucore.h 2003/12/21 16:05:25 1.5 +++ np2/i286c/cpucore.h 2004/01/05 06:50:15 1.12 @@ -37,6 +37,13 @@ enum { }; enum { + MSW_PE = 0x0001, + MSW_MP = 0x0002, + MSW_EM = 0x0004, + MSW_TS = 0x0008 +}; + +enum { CPUTYPE_V30 = 0x01 }; @@ -141,33 +148,38 @@ typedef struct { I286REG8 b; I286REG16 w; } r; - SINT32 remainclock; - SINT32 baseclock; - UINT32 clock; - UINT32 adrsmask; // ver0.72 UINT32 es_base; UINT32 cs_base; UINT32 ss_base; UINT32 ds_base; UINT32 ss_fix; UINT32 ds_fix; + UINT32 adrsmask; // ver0.72 UINT16 prefix; UINT8 trap; - UINT8 cpu_type; - UINT32 ____pf_semaphore; // ج¤؛بحر - UINT32 ____repbak; // ج¤؛بحر - UINT32 inport; + UINT8 resetreq; // ver0.72 UINT32 ovflag; I286DTR GDTR; - I286DTR IDTR; UINT16 MSW; - UINT8 resetreq; // ver0.72 + I286DTR IDTR; + UINT16 LDTR; // ver0.73 + I286DTR LDTRC; + UINT16 TR; + I286DTR TRC; + UINT8 padding[2]; + + UINT8 cpu_type; UINT8 itfbank; // ver0.72 + UINT16 ram_d0; + SINT32 remainclock; + SINT32 baseclock; + UINT32 clock; } I286STAT; typedef struct { // for ver0.73 BYTE *ext; UINT32 extsize; + UINT32 inport; #if defined(CPUSTRUC_MEMWAIT) UINT8 tramwait; UINT8 vramwait; @@ -191,6 +203,7 @@ extern const UINT8 iflags[]; void i286c_initialize(void); void i286c_reset(void); +void i286c_shut(void); void CPUCALL i286c_interrupt(REG8 vect); @@ -244,12 +257,13 @@ void v30c_step(void); #define CPU_BASECLOCK i286core.s.baseclock #define CPU_CLOCK i286core.s.clock #define CPU_ADRSMASK i286core.s.adrsmask +#define CPU_MSW i286core.s.MSW #define CPU_RESETREQ i286core.s.resetreq #define CPU_ITFBANK i286core.s.itfbank -#define CPU_INPADRS i286core.s.inport #define CPU_EXTMEM i286core.e.ext #define CPU_EXTMEMSIZE i286core.e.extsize +#define CPU_INPADRS i286core.e.inport #define CPU_TYPE i286core.s.cpu_type @@ -273,4 +287,5 @@ void v30c_step(void); #define CPU_INTERRUPT(v) i286c_interrupt(v) #define CPU_EXEC i286c #define CPU_EXECV30 v30c +#define CPU_SHUT i286c_shut