--- np2/i286c/cpucore.h	2003/12/26 00:11:51	1.7
+++ np2/i286c/cpucore.h	2003/12/26 22:24:06	1.9
@@ -37,6 +37,13 @@ enum {
 };
 
 enum {
+	MSW_PE			= 0x0001,
+	MSW_MP			= 0x0002,
+	MSW_EM			= 0x0004,
+	MSW_TS			= 0x0008
+};
+
+enum {
 	CPUTYPE_V30		= 0x01
 };
 
@@ -159,10 +166,12 @@ typedef struct {
 	UINT32	inport;
 	UINT32	ovflag;
 	I286DTR	GDTR;
+	UINT16	MSW;
 	I286DTR	IDTR;
-	I286DTR	LDTRC;							// ver0.73
 	UINT16	LDTR;							// ver0.73
-	UINT16	MSW;
+	I286DTR	LDTRC;
+	UINT16	TR;
+	I286DTR	TRC;
 	UINT8	resetreq;						// ver0.72
 	UINT8	itfbank;						// ver0.72
 } I286STAT;
@@ -247,6 +256,7 @@ void v30c_step(void);
 #define	CPU_BASECLOCK	i286core.s.baseclock
 #define	CPU_CLOCK		i286core.s.clock
 #define	CPU_ADRSMASK	i286core.s.adrsmask
+#define	CPU_MSW			i286core.s.MSW
 #define	CPU_RESETREQ	i286core.s.resetreq
 #define	CPU_ITFBANK		i286core.s.itfbank
 #define	CPU_INPADRS		i286core.s.inport