--- np2/i286c/i286c_mn.c	2003/12/17 01:57:41	1.25
+++ np2/i286c/i286c_mn.c	2005/02/04 05:32:23	1.36
@@ -147,8 +147,11 @@ I286FN _push_es(void) {							// 06: pus
 
 I286FN _pop_es(void) {							// 07: pop es
 
-	REGPOP(I286_ES, 5)
-	ES_BASE = (UINT32)I286_ES << 4;
+	UINT	tmp;
+
+	REGPOP(tmp, 5)
+	I286_ES = tmp;
+	ES_BASE = SEGSELECT(tmp);
 }
 
 I286FN _or_ea_r8(void) {						// 08: or EA, REG8
@@ -381,8 +384,11 @@ I286FN _push_ss(void) {							// 16: pus
 
 I286FN _pop_ss(void) {							// 17: pop ss
 
-	REGPOP(I286_SS, 5)
-	SS_BASE = I286_SS << 4;
+	UINT	tmp;
+
+	REGPOP(tmp, 5)
+	I286_SS = tmp;
+	SS_BASE = SEGSELECT(tmp);
 	SS_FIX = SS_BASE;
 	NEXT_OPCODE
 }
@@ -504,8 +510,11 @@ I286FN _push_ds(void) {							// 1e: pus
 
 I286FN _pop_ds(void) {							// 1f: pop ds
 
-	REGPOP(I286_DS, 5)
-	DS_BASE = I286_DS << 4;
+	UINT	tmp;
+
+	REGPOP(tmp, 5)
+	I286_DS = tmp;
+	DS_BASE = SEGSELECT(tmp);
 	DS_FIX = DS_BASE;
 }
 
@@ -1658,6 +1667,7 @@ I286FN _mov_seg_ea(void) {					// 8E:	mo
 
 	UINT	op;
 	UINT	tmp;
+	UINT32	base;
 	UINT16	ipbak;
 
 	ipbak = I286_IP;
@@ -1670,23 +1680,24 @@ I286FN _mov_seg_ea(void) {					// 8E:	mo
 		I286_WORKCLOCK(5);
 		tmp = i286_memoryread_w(CALC_EA(op));
 	}
+	base = SEGSELECT(tmp);
 	switch(op & 0x18) {
 		case 0x00:			// es
 			I286_ES = (UINT16)tmp;
-			ES_BASE = tmp << 4;
+			ES_BASE = base;
 			break;
 
 		case 0x10:			// ss
 			I286_SS = (UINT16)tmp;
-			SS_BASE = tmp << 4;
-			SS_FIX = SS_BASE;
+			SS_BASE = base;
+			SS_FIX = base;
 			NEXT_OPCODE
 			break;
 
 		case 0x18:			// ds
 			I286_DS = (UINT16)tmp;
-			DS_BASE = tmp << 4;
-			DS_FIX = DS_BASE;
+			DS_BASE = base;
+			DS_FIX = base;
 			break;
 
 		default:			// cs
@@ -1793,7 +1804,7 @@ I286FN _call_far(void) {					// 9A:	call
 	REGPUSH0(I286_CS)
 	GET_PCWORD(newip)
 	GET_PCWORD(I286_CS)
-	CS_BASE = I286_CS << 4;
+	CS_BASE = SEGSELECT(I286_CS);
 	REGPUSH0(I286_IP)
 	I286_IP = newip;
 }
@@ -2101,7 +2112,7 @@ I286FN _les_r16_ea(void) {					// C4:	le
 		ad = GET_EA(op, &seg);
 		*(REG16_B53(op)) = i286_memoryread_w(seg + ad);
 		I286_ES = i286_memoryread_w(seg + LOW16(ad + 2));
-		ES_BASE = I286_ES << 4;
+		ES_BASE = SEGSELECT(I286_ES);
 	}
 	else {
 		INT_NUM(6, I286_IP - 2);
@@ -2120,7 +2131,7 @@ I286FN _lds_r16_ea(void) {					// C5:	ld
 		ad = GET_EA(op, &seg);
 		*(REG16_B53(op)) = i286_memoryread_w(seg + ad);
 		I286_DS = i286_memoryread_w(seg + LOW16(ad + 2));
-		DS_BASE = I286_DS << 4;
+		DS_BASE = SEGSELECT(I286_DS);
 		DS_FIX = DS_BASE;
 	}
 	else {
@@ -2231,7 +2242,7 @@ I286FN _ret_far_data16(void) {				// CA:
 	REGPOP0(I286_IP)
 	REGPOP0(I286_CS)
 	I286_SP += ad;
-	CS_BASE = I286_CS << 4;
+	CS_BASE = SEGSELECT(I286_CS);
 }
 
 I286FN _ret_far(void) {						// CB:	ret far
@@ -2239,7 +2250,7 @@ I286FN _ret_far(void) {						// CB:	ret 
 	I286_WORKCLOCK(15);
 	REGPOP0(I286_IP)
 	REGPOP0(I286_CS)
-	CS_BASE = I286_CS << 4;
+	CS_BASE = SEGSELECT(I286_CS);
 }
 
 I286FN _int_03(void) {						// CC:	int		3
@@ -2254,6 +2265,232 @@ I286FN _int_data8(void) {					// CD:	int
 
 	I286_WORKCLOCK(3);
 	GET_PCBYTE(vect)
+#if 0
+	if ((vect == 0x42) && (CPU_AL != 6)) {
+		TRACEOUT(("%.4x:%.4x INT-42 AL=%.2x", CPU_CS, CPU_IP, CPU_AL));
+	}
+#endif
+#if 0
+	if (vect == 0x2f) {
+		TRACEOUT(("%.4x:%.4x INT-2f BX=%.4x/DX=%.4x", CPU_CS, CPU_IP, CPU_BX, CPU_DX));
+	}
+#endif
+#if 1
+	if (vect == 0xd2) {
+		TRACEOUT(("%.4x:%.4x INT-d2 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+#endif
+#if 0
+	if (vect == 0x60) {
+		TRACEOUT(("%.4x:%.4x INT-60 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+#endif
+#if 0
+	if (vect == 0xa0) {
+		TRACEOUT(("%.4x:%.4x INT-a0 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+	if (vect == 0xa2) {
+		TRACEOUT(("%.4x:%.4x INT-a2", CPU_CS, CPU_IP));
+	}
+	if (vect == 0xa4) {
+		TRACEOUT(("%.4x:%.4x INT-a4", CPU_CS, CPU_IP));
+	}
+#endif
+#if 0
+	if (vect == 0x60) {
+		TRACEOUT(("%.4x:%.4x INT-60 AH=%.2x", CPU_CS, CPU_IP, CPU_AH));
+		if (CPU_AH == 1) {
+			TRACEOUT(("->%.4x:%.4x", CPU_ES, CPU_BX));
+		}
+	}
+#endif
+#if 0
+	if (vect == 0x40) {
+		TRACEOUT(("%.4x:%.4x INT-40 AH=%.2x", CPU_CS, CPU_IP, CPU_AH));
+	}
+	if (vect == 0x66) {
+		switch(CPU_AL) {
+			case 1:
+				TRACEOUT(("%.4x:%.4x INT-66:01 play", CPU_CS, CPU_IP));
+				break;
+			case 2:
+				TRACEOUT(("%.4x:%.4x INT-66:02 stop", CPU_CS, CPU_IP));
+				break;
+			case 9:
+				TRACEOUT(("%.4x:%.4x INT-66:09 setdata AH=%.2x ES:BX=%.4x:%.4x DX=%.4x", CPU_CS, CPU_IP, CPU_AH, CPU_ES, CPU_BX, CPU_DX));
+				break;
+			case 0x0d:
+				TRACEOUT(("%.4x:%.4x INT-66:0d setdata ES:BX=%.4x:%.4x", CPU_CS, CPU_IP, CPU_ES, CPU_BX));
+				break;
+
+			default:
+				TRACEOUT(("%.4x:%.4x INT-66 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+				break;
+		}
+	}
+#endif
+#if 0
+	if (vect == 0x40) {
+		TRACEOUT(("%.4x:%.4x INT-40 AX=%.4x DS=%.4x DI=%.4x", CPU_CS, CPU_IP, CPU_AX, CPU_DS, CPU_DI));
+	}
+	if (vect == 0x41) {
+		TRACEOUT(("%.4x:%.4x INT-41 AX=%.4x DX=%.4x", CPU_CS, CPU_IP, CPU_AX, CPU_DX));
+	}
+#endif
+#if 0
+	if (vect == 0x41) {
+		TRACEOUT(("%.4x:%.4x INT-41 AX=%.4x %.4x:%.4x",
+							CPU_CS, CPU_IP, CPU_AX, CPU_DS, CPU_SI));
+	}
+	if (vect == 0x42) {
+		switch(CPU_AH) {
+			case 0xd3:
+			case 0xd0:
+				break;
+
+			case 0xfd:
+			case 0xfc:
+			case 0xfa:
+			case 0xf8:
+			case 0xe3:
+				TRACEOUT(("%.4x:%.4x INT-42 AX=%.4x %.4x:%.4x",
+							CPU_CS, CPU_IP, CPU_AX, CPU_BX, CPU_BP));
+				break;
+
+			default:
+				TRACEOUT(("%.4x:%.4x INT-42 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+				break;
+		}
+	}
+#endif
+#if 0
+	if (vect == 0x40) {
+		TRACEOUT(("%.4x:%.4x INT-40 SI=%.4x %.4x:%.4x:%.4x",
+									CPU_CS, CPU_IP, CPU_SI,
+									MEML_READ16(CPU_DS, CPU_SI + 0),
+									MEML_READ16(CPU_DS, CPU_SI + 2),
+									MEML_READ16(CPU_DS, CPU_SI + 4)));
+	}
+	if (vect == 0xd2) {
+		TRACEOUT(("%.4x:%.4x INT-D2 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+#endif
+#if 0
+	if (vect == 0x40) {
+		TRACEOUT(("INT 40H - AL=%.2x", CPU_AL));
+	}
+#endif
+#if defined(TRACE)
+	if (vect == 0x21) {
+		char f[128];
+		UINT i;
+		char c;
+		switch(CPU_AH) {
+			case 0x3d:
+				for (i=0; i<127; i++) {
+					c = MEML_READ8(CPU_DS, CPU_DX + i);
+					if (c == '\0') break;
+					f[i] = c;
+				}
+				f[i] = 0;
+				TRACEOUT(("DOS: %.4x:%.4x Open Handle AL=%.2x DS:DX=%.4x:%.4x[%s]", CPU_CS, CPU_IP, CPU_AL, CPU_DS, CPU_DX, f));
+				break;
+
+			case 0x3f:
+				TRACEOUT(("DOS: %.4x:%.4x Read Handle BX=%.4x DS:DX=%.4x:%.4x CX=%.4x", CPU_CS, CPU_IP, CPU_BX, CPU_DS, CPU_DX, CPU_CX));
+				break;
+
+			case 0x42:
+				TRACEOUT(("DOS: %.4x:%.4x Move File Pointer BX=%.4x CX:DX=%.4x:%.4x AL=%.2x", CPU_CS, CPU_IP, CPU_BX, CPU_CX, CPU_DX, CPU_AL));
+				break;
+		}
+	}
+#endif
+#if 0
+	if (vect == 0xf5) {
+		TRACEOUT(("%.4x:%.4x INT-F5 AH=%.2x STACK=%.4x", CPU_CS, CPU_IP, 
+								CPU_AH, MEML_READ16(CPU_SS, CPU_SP + 2)));
+	}
+#endif
+#if 0
+	if (vect == 0x69) {
+		TRACEOUT(("%.4x:%.4x INT-69 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+#endif
+#if 0
+	if ((vect == 0x40) && (CPU_AX != 4)) {
+		TRACEOUT(("%.4x:%.4x INT-40 AX=%.4x", CPU_CS, CPU_IP, CPU_AX));
+	}
+#endif
+#if 0
+	if (vect == 0x7f) {
+		switch(CPU_AH) {
+			case 0:
+				TRACEOUT(("INT-7F AH=00 Load data DS:DX = %.4x:%.4x", CPU_DS, CPU_DX));
+				break;
+
+			case 1:
+				TRACEOUT(("INT-7F AH=01 Play data AL=%.2x", CPU_AL));
+				break;
+
+			case 2:
+				TRACEOUT(("INT-7F AH=02 Stop Data"));
+				break;
+
+			case 3:
+				TRACEOUT(("INT-7F AH=03 Get Status"));
+				break;
+
+			case 4:
+				TRACEOUT(("INT-7F AH=04 Set Parameter AL=%.2x", CPU_AL));
+				break;
+		}
+	}
+#endif
+#if defined(TRACE)
+	if (vect == 0x7f) {
+		UINT i, j;
+		switch(CPU_AH) {
+			case 0:
+				TRACEOUT(("INT-7F AH=00 Load data DS:DX = %.4x:%.4x", CPU_DS, CPU_DX));
+				for (i=0; i<16; i+=4) {
+					char buf[256];
+					for (j=0; j<4; j++) {
+						sprintf(buf + (j * 6), "0x%.2x, ",
+										MEML_READ8(CPU_DS, CPU_DX + i + j));
+					}
+					TRACEOUT(("%s", buf));
+				}
+				break;
+
+			case 1:
+				TRACEOUT(("INT-7F AH=01 Play data AL=%.2x", CPU_AL));
+				break;
+
+			case 2:
+				TRACEOUT(("INT-7F AH=02 Stop Data"));
+				break;
+
+			case 3:
+//				TRACEOUT(("INT-7F AH=03 Get Status"));
+				break;
+
+			case 4:
+				TRACEOUT(("INT-7F AH=04 Set Parameter AL=%.2x", CPU_AL));
+				break;
+
+			default:
+				TRACEOUT(("INT-7F AH=%.2x", CPU_AH));
+				break;
+		}
+	}
+#endif
+#if 0 // defined(TRACE)
+	if ((vect >= 0xa0) && (vect < 0xb0)) {
+extern void lio_look(UINT vect);
+		lio_look(vect);
+	}
+#endif
 	INT_NUM(vect, I286_IP);
 }
 
@@ -2269,7 +2506,6 @@ I286FN _iret(void) {						// CF:	iret
 
 	UINT	flag;
 
-	extirq_pop();
 	REGPOP0(I286_IP)
 	REGPOP0(I286_CS)
 	REGPOP0(flag)
@@ -2277,6 +2513,7 @@ I286FN _iret(void) {						// CF:	iret
 	I286_FLAG = flag & (0xfff ^ O_FLAG);
 	I286_TRAP = ((flag & 0x300) == 0x300);
 	CS_BASE = I286_CS << 4;
+//	CS_BASE = SEGSELECT(I286_CS);
 	I286_WORKCLOCK(31);
 #if defined(INTR_FAST)
 	if ((I286_TRAP) || ((flag & I_FLAG) && (PICEXISTINTR))) {
@@ -2530,8 +2767,8 @@ I286FN _jmp_far(void) {						// EA:	jmp 
 	I286_WORKCLOCK(11);
 	GET_PCWORD(ad);
 	GET_PCWORD(I286_CS);
-	CS_BASE = I286_CS << 4;
 	I286_IP = ad;
+	CS_BASE = SEGSELECT(I286_CS);
 }
 
 I286FN _jmp_short(void) {					// EB:	jmp short